1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016 BayLibre, Inc.
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
11 model = "DA850/AM1808/OMAP-L138 LCDK";
12 compatible = "ti,da850-lcdk", "ti,da850";
20 stdout-path = "serial2:115200n8";
24 /* 128 MB DDR2 SDRAM @ 0xc0000000 */
25 reg = <0xc0000000 0x08000000>;
33 dsp_memory_region: dsp-memory@c3000000 {
34 compatible = "shared-dma-pool";
35 reg = <0xc3000000 0x1000000>;
41 vcc_5vd: fixedregulator-vcc_5vd {
42 compatible = "regulator-fixed";
43 regulator-name = "vcc_5vd";
44 regulator-min-microvolt = <5000000>;
45 regulator-max-microvolt = <5000000>;
49 vcc_3v3d: fixedregulator-vcc_3v3d {
50 /* TPS650250 - VDCDC1 */
51 compatible = "regulator-fixed";
52 regulator-name = "vcc_3v3d";
53 regulator-min-microvolt = <3300000>;
54 regulator-max-microvolt = <3300000>;
55 vin-supply = <&vcc_5vd>;
60 vcc_1v8d: fixedregulator-vcc_1v8d {
61 /* TPS650250 - VDCDC2 */
62 compatible = "regulator-fixed";
63 regulator-name = "vcc_1v8d";
64 regulator-min-microvolt = <1800000>;
65 regulator-max-microvolt = <1800000>;
66 vin-supply = <&vcc_5vd>;
72 compatible = "simple-audio-card";
73 simple-audio-card,name = "DA850-OMAPL138 LCDK";
74 simple-audio-card,widgets =
77 "Microphone", "Mic Jack";
78 simple-audio-card,routing =
85 "Mic Jack", "Mic Bias";
86 simple-audio-card,format = "dsp_b";
87 simple-audio-card,bitclock-master = <&link0_codec>;
88 simple-audio-card,frame-master = <&link0_codec>;
89 simple-audio-card,bitclock-inversion;
91 simple-audio-card,cpu {
92 sound-dai = <&mcasp0>;
93 system-clock-frequency = <24576000>;
96 link0_codec: simple-audio-card,codec {
97 sound-dai = <&tlv320aic3106>;
98 system-clock-frequency = <24576000>;
103 compatible = "gpio-keys";
107 label = "GPIO Key USER1";
108 linux,code = <BTN_0>;
109 gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
113 label = "GPIO Key USER2";
114 linux,code = <BTN_1>;
115 gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
120 compatible = "ti,ths8135";
121 #address-cells = <1>;
125 #address-cells = <1>;
131 vga_bridge_in: endpoint {
132 remote-endpoint = <&lcdc_out_vga>;
139 vga_bridge_out: endpoint {
140 remote-endpoint = <&vga_con_in>;
147 compatible = "vga-connector";
149 ddc-i2c-bus = <&i2c0>;
152 vga_con_in: endpoint {
153 remote-endpoint = <&vga_bridge_out>;
160 clock-frequency = <24000000>;
166 mcasp0_pins: pinmux_mcasp0_pins {
167 pinctrl-single,bits = <
168 /* AHCLKX AFSX ACLKX */
169 0x00 0x00101010 0x00f0f0f0
171 0x04 0x00000110 0x00000ff0
175 nand_pins: nand_pins {
176 pinctrl-single,bits = <
177 /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3] */
178 0x1c 0x10110010 0xf0ff00f0
180 * EMA_D[0], EMA_D[1], EMA_D[2],
181 * EMA_D[3], EMA_D[4], EMA_D[5],
184 0x24 0x11111111 0xffffffff
186 * EMA_D[8], EMA_D[9], EMA_D[10],
187 * EMA_D[11], EMA_D[12], EMA_D[13],
188 * EMA_D[14], EMA_D[15]
190 0x20 0x11111111 0xffffffff
191 /* EMA_A[1], EMA_A[2] */
192 0x30 0x01100000 0x0ff00000
198 pinctrl-names = "default";
199 pinctrl-0 = <&serial2_rxtx_pins>;
217 clock-frequency = <100000000>;
225 pinctrl-names = "default";
226 pinctrl-0 = <&mdio_pins>;
227 bus_freq = <2200000>;
232 pinctrl-names = "default";
233 pinctrl-0 = <&mii_pins>;
238 max-frequency = <50000000>;
240 pinctrl-names = "default";
241 pinctrl-0 = <&mmc0_pins>;
242 cd-gpios = <&gpio 64 GPIO_ACTIVE_LOW>;
247 pinctrl-names = "default";
248 pinctrl-0 = <&i2c0_pins>;
249 clock-frequency = <100000>;
252 tlv320aic3106: tlv320aic3106@18 {
253 #sound-dai-cells = <0>;
254 compatible = "ti,tlv320aic3106";
256 adc-settle-ms = <40>;
257 ai3x-micbias-vg = <1>; /* 2.0V */
261 IOVDD-supply = <&vcc_3v3d>;
262 AVDD-supply = <&vcc_3v3d>;
263 DRVDD-supply = <&vcc_3v3d>;
264 DVDD-supply = <&vcc_1v8d>;
269 #sound-dai-cells = <0>;
270 pinctrl-names = "default";
271 pinctrl-0 = <&mcasp0_pins>;
274 op-mode = <0>; /* DAVINCI_MCASP_IIS_MODE */
276 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
299 pinctrl-names = "default";
300 pinctrl-0 = <&nand_pins>;
303 #address-cells = <2>;
308 ti,cs-chipselect = <3>;
311 compatible = "ti,davinci-nand";
312 #address-cells = <1>;
314 reg = <0 0x02000000 0x02000000
315 1 0x00000000 0x00008000>;
317 ti,davinci-chipselect = <1>;
318 ti,davinci-mask-ale = <0>;
319 ti,davinci-mask-cle = <0>;
320 ti,davinci-mask-chipsel = <0>;
322 ti,davinci-nand-buswidth = <16>;
323 ti,davinci-ecc-mode = "hw";
324 ti,davinci-ecc-bits = <4>;
325 ti,davinci-nand-use-bbt;
328 * The OMAP-L132/L138 Bootloader doc SPRAB41E reads:
329 * "To boot from NAND Flash, the AIS should be written
330 * to NAND block 1 (NAND block 0 is not used by default)".
331 * The same doc mentions that for ROM "Silicon Revision 2.1",
332 * "Updated NAND boot mode to offer boot from block 0 or block 1".
333 * However the limitaion is left here by default for compatibility
334 * with older silicon and because it needs new boot pin settings
335 * not possible in stock LCDK.
338 compatible = "fixed-partitions";
339 #address-cells = <1>;
343 label = "u-boot env";
347 /* The LCDK defaults to booting from this partition */
349 reg = <0x020000 0x080000>;
352 label = "free space";
370 pinctrl-names = "default";
371 pinctrl-0 = <&lcd_pins>;
374 lcdc_out_vga: endpoint {
375 remote-endpoint = <&vga_bridge_in>;
381 pinctrl-names = "default";
382 pinctrl-0 = <&vpif_capture_pins>;
387 memory-region = <&dsp_memory_region>;