arch/arm/boot/dts/da850-lcdk.dts

   1 /*
   2  * Copyright (c) 2016 BayLibre, Inc.
   3  *
   4  * Licensed under GPLv2.
   5  */
   6 /dts-v1/;
   7 #include "da850.dtsi"
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/input/input.h>
  10
  11 / {
  12         model = "DA850/AM1808/OMAP-L138 LCDK";
  13         compatible = "ti,da850-lcdk", "ti,da850";
  14
  15         aliases {
  16                 serial2 = &serial2;
  17                 ethernet0 = &eth0;
  18         };
  19
  20         chosen {
  21                 stdout-path = "serial2:115200n8";
  22         };
  23
  24         memory@c0000000 {
  25                 /* 128 MB DDR2 SDRAM @ 0xc0000000 */
  26                 reg = <0xc0000000 0x08000000>;
  27         };
  28
  29         reserved-memory {
  30                 #address-cells = <1>;
  31                 #size-cells = <1>;
  32                 ranges;
  33
  34                 dsp_memory_region: dsp-memory@c3000000 {
  35                         compatible = "shared-dma-pool";
  36                         reg = <0xc3000000 0x1000000>;
  37                         reusable;
  38                         status = "okay";
  39                 };
  40         };
  41
  42         sound {
  43                 compatible = "simple-audio-card";
  44                 simple-audio-card,name = "DA850/OMAP-L138 LCDK";
  45                 simple-audio-card,widgets =
  46                         "Line", "Line In",
  47                         "Line", "Line Out";
  48                 simple-audio-card,routing =
  49                         "LINE1L", "Line In",
  50                         "LINE1R", "Line In",
  51                         "Line Out", "LLOUT",
  52                         "Line Out", "RLOUT";
  53                 simple-audio-card,format = "dsp_b";
  54                 simple-audio-card,bitclock-master = <&link0_codec>;
  55                 simple-audio-card,frame-master = <&link0_codec>;
  56                 simple-audio-card,bitclock-inversion;
  57
  58                 simple-audio-card,cpu {
  59                         sound-dai = <&mcasp0>;
  60                         system-clock-frequency = <24576000>;
  61                 };
  62
  63                 link0_codec: simple-audio-card,codec {
  64                         sound-dai = <&tlv320aic3106>;
  65                         system-clock-frequency = <24576000>;
  66                 };
  67         };
  68
  69         gpio-keys {
  70                 compatible = "gpio-keys";
  71                 autorepeat;
  72
  73                 user1 {
  74                         label = "GPIO Key USER1";
  75                         linux,code = <BTN_0>;
  76                         gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
  77                 };
  78
  79                 user2 {
  80                         label = "GPIO Key USER2";
  81                         linux,code = <BTN_1>;
  82                         gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
  83                 };
  84         };
  85
  86         vga-bridge {
  87                 compatible = "ti,ths8135";
  88                 #address-cells = <1>;
  89                 #size-cells = <0>;
  90
  91                 ports {
  92                         #address-cells = <1>;
  93                         #size-cells = <0>;
  94
  95                         port@0 {
  96                                 reg = <0>;
  97
  98                                 vga_bridge_in: endpoint {
  99                                         remote-endpoint = <&lcdc_out_vga>;
 100                                 };
 101                         };
 102
 103                         port@1 {
 104                                 reg = <1>;
 105
 106                                 vga_bridge_out: endpoint {
 107                                         remote-endpoint = <&vga_con_in>;
 108                                 };
 109                         };
 110                 };
 111         };
 112
 113         vga {
 114                 compatible = "vga-connector";
 115
 116                 ddc-i2c-bus = <&i2c0>;
 117
 118                 port {
 119                         vga_con_in: endpoint {
 120                                 remote-endpoint = <&vga_bridge_out>;
 121                         };
 122                 };
 123         };
 124 };
 125
 126 &ref_clk {
 127         clock-frequency = <24000000>;
 128 };
 129
 130 &pmx_core {
 131         status = "okay";
 132
 133         mcasp0_pins: pinmux_mcasp0_pins {
 134                 pinctrl-single,bits = <
 135                         /* AHCLKX AFSX ACLKX */
 136                         0x00 0x00101010 0x00f0f0f0
 137                         /* ARX13 ARX14 */
 138                         0x04 0x00000110 0x00000ff0
 139                 >;
 140         };
 141
 142         nand_pins: nand_pins {
 143                 pinctrl-single,bits = <
 144                         /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3] */
 145                         0x1c 0x10110010  0xf0ff00f0
 146                         /*
 147                          * EMA_D[0], EMA_D[1], EMA_D[2],
 148                          * EMA_D[3], EMA_D[4], EMA_D[5],
 149                          * EMA_D[6], EMA_D[7]
 150                          */
 151                         0x24 0x11111111  0xffffffff
 152                         /*
 153                          * EMA_D[8],  EMA_D[9],  EMA_D[10],
 154                          * EMA_D[11], EMA_D[12], EMA_D[13],
 155                          * EMA_D[14], EMA_D[15]
 156                          */
 157                         0x20 0x11111111  0xffffffff
 158                         /* EMA_A[1], EMA_A[2] */
 159                         0x30 0x01100000  0x0ff00000
 160                 >;
 161         };
 162 };
 163
 164 &serial2 {
 165         pinctrl-names = "default";
 166         pinctrl-0 = <&serial2_rxtx_pins>;
 167         status = "okay";
 168 };
 169
 170 &wdt {
 171         status = "okay";
 172 };
 173
 174 &rtc0 {
 175         status = "okay";
 176 };
 177
 178 &gpio {
 179         status = "okay";
 180 };
 181
 182 &sata_refclk {
 183         status = "okay";
 184         clock-frequency = <100000000>;
 185 };
 186
 187 &sata {
 188         status = "okay";
 189 };
 190
 191 &mdio {
 192         pinctrl-names = "default";
 193         pinctrl-0 = <&mdio_pins>;
 194         bus_freq = <2200000>;
 195         status = "okay";
 196 };
 197
 198 &eth0 {
 199         pinctrl-names = "default";
 200         pinctrl-0 = <&mii_pins>;
 201         status = "okay";
 202 };
 203
 204 &mmc0 {
 205         max-frequency = <50000000>;
 206         bus-width = <4>;
 207         pinctrl-names = "default";
 208         pinctrl-0 = <&mmc0_pins>;
 209         cd-gpios = <&gpio 64 GPIO_ACTIVE_LOW>;
 210         status = "okay";
 211 };
 212
 213 &i2c0 {
 214         pinctrl-names = "default";
 215         pinctrl-0 = <&i2c0_pins>;
 216         clock-frequency = <100000>;
 217         status = "okay";
 218
 219         tlv320aic3106: tlv320aic3106@18 {
 220                 #sound-dai-cells = <0>;
 221                 compatible = "ti,tlv320aic3106";
 222                 reg = <0x18>;
 223                 status = "okay";
 224         };
 225 };
 226
 227 &mcasp0 {
 228         #sound-dai-cells = <0>;
 229         pinctrl-names = "default";
 230         pinctrl-0 = <&mcasp0_pins>;
 231         status = "okay";
 232
 233         op-mode = <0>;   /* DAVINCI_MCASP_IIS_MODE */
 234         tdm-slots = <2>;
 235         serial-dir = <   /* 0: INACTIVE, 1: TX, 2: RX */
 236                 0 0 0 0
 237                 0 0 0 0
 238                 0 0 0 0
 239                 0 1 2 0
 240         >;
 241         tx-num-evt = <32>;
 242         rx-num-evt = <32>;
 243 };
 244
 245 &usb_phy {
 246         status = "okay";
 247 };
 248
 249 &usb0 {
 250         status = "okay";
 251 };
 252
 253 &usb1 {
 254         status = "okay";
 255 };
 256
 257 &aemif {
 258         pinctrl-names = "default";
 259         pinctrl-0 = <&nand_pins>;
 260         status = "okay";
 261         cs3 {
 262                 #address-cells = <2>;
 263                 #size-cells = <1>;
 264                 clock-ranges;
 265                 ranges;
 266
 267                 ti,cs-chipselect = <3>;
 268
 269                 nand@2000000,0 {
 270                         compatible = "ti,davinci-nand";
 271                         #address-cells = <1>;
 272                         #size-cells = <1>;
 273                         reg = <0 0x02000000 0x02000000
 274                                1 0x00000000 0x00008000>;
 275
 276                         ti,davinci-chipselect = <1>;
 277                         ti,davinci-mask-ale = <0>;
 278                         ti,davinci-mask-cle = <0>;
 279                         ti,davinci-mask-chipsel = <0>;
 280
 281                         ti,davinci-nand-buswidth = <16>;
 282                         ti,davinci-ecc-mode = "hw";
 283                         ti,davinci-ecc-bits = <4>;
 284                         ti,davinci-nand-use-bbt;
 285
 286                         /*
 287                          * The OMAP-L132/L138 Bootloader doc SPRAB41E reads:
 288                          * "To boot from NAND Flash, the AIS should be written
 289                          * to NAND block 1 (NAND block 0 is not used by default)".
 290                          * The same doc mentions that for ROM "Silicon Revision 2.1",
 291                          * "Updated NAND boot mode to offer boot from block 0 or block 1".
 292                          * However the limitaion is left here by default for compatibility
 293                          * with older silicon and because it needs new boot pin settings
 294                          * not possible in stock LCDK.
 295                          */
 296                         partitions {
 297                                 compatible = "fixed-partitions";
 298                                 #address-cells = <1>;
 299                                 #size-cells = <1>;
 300
 301                                 partition@0 {
 302                                         label = "u-boot env";
 303                                         reg = <0 0x020000>;
 304                                 };
 305                                 partition@20000 {
 306                                         /* The LCDK defaults to booting from this partition */
 307                                         label = "u-boot";
 308                                         reg = <0x020000 0x080000>;
 309                                 };
 310                                 partition@a0000 {
 311                                         label = "free space";
 312                                         reg = <0x0a0000 0>;
 313                                 };
 314                         };
 315                 };
 316         };
 317 };
 318
 319 &prictrl {
 320         status = "okay";
 321 };
 322
 323 &memctrl {
 324         status = "okay";
 325 };
 326
 327 &lcdc {
 328         status = "okay";
 329         pinctrl-names = "default";
 330         pinctrl-0 = <&lcd_pins>;
 331
 332         port {
 333                 lcdc_out_vga: endpoint {
 334                         remote-endpoint = <&vga_bridge_in>;
 335                 };
 336         };
 337 };
 338
 339 &vpif {
 340         pinctrl-names = "default";
 341         pinctrl-0 = <&vpif_capture_pins>;
 342         status = "okay";
 343 };
 344
 345 &dsp {
 346         memory-region = <&dsp_memory_region>;
 347         status = "okay";
 348 };