arch/arm/boot/dts/bcm5301x.dtsi

   1 /*
   2  * Broadcom BCM470X / BCM5301X ARM platform code.
   3  * Generic DTS part for all BCM53010, BCM53011, BCM53012, BCM53014, BCM53015,
   4  * BCM53016, BCM53017, BCM53018, BCM4707, BCM4708 and BCM4709 SoCs
   5  *
   6  * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
   7  *
   8  * Licensed under the GNU/GPL. See COPYING for details.
   9  */
  10
  11 #include <dt-bindings/clock/bcm-nsp.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/input/input.h>
  14 #include <dt-bindings/interrupt-controller/irq.h>
  15 #include <dt-bindings/interrupt-controller/arm-gic.h>
  16 #include "skeleton.dtsi"
  17
  18 / {
  19         interrupt-parent = <&gic>;
  20
  21         chipcommonA {
  22                 compatible = "simple-bus";
  23                 ranges = <0x00000000 0x18000000 0x00001000>;
  24                 #address-cells = <1>;
  25                 #size-cells = <1>;
  26
  27                 uart0: serial@300 {
  28                         compatible = "ns16550";
  29                         reg = <0x0300 0x100>;
  30                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
  31                         clocks = <&iprocslow>;
  32                         status = "disabled";
  33                 };
  34
  35                 uart1: serial@400 {
  36                         compatible = "ns16550";
  37                         reg = <0x0400 0x100>;
  38                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
  39                         clocks = <&iprocslow>;
  40                         pinctrl-names = "default";
  41                         pinctrl-0 = <&pinmux_uart1>;
  42                         status = "disabled";
  43                 };
  44         };
  45
  46         mpcore {
  47                 compatible = "simple-bus";
  48                 ranges = <0x00000000 0x19000000 0x00023000>;
  49                 #address-cells = <1>;
  50                 #size-cells = <1>;
  51
  52                 a9pll: arm_clk@0 {
  53                         #clock-cells = <0>;
  54                         compatible = "brcm,nsp-armpll";
  55                         clocks = <&osc>;
  56                         reg = <0x00000 0x1000>;
  57                 };
  58
  59                 scu@20000 {
  60                         compatible = "arm,cortex-a9-scu";
  61                         reg = <0x20000 0x100>;
  62                 };
  63
  64                 timer@20200 {
  65                         compatible = "arm,cortex-a9-global-timer";
  66                         reg = <0x20200 0x100>;
  67                         interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
  68                         clocks = <&periph_clk>;
  69                 };
  70
  71                 timer@20600 {
  72                         compatible = "arm,cortex-a9-twd-timer";
  73                         reg = <0x20600 0x20>;
  74                         interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
  75                                                   IRQ_TYPE_EDGE_RISING)>;
  76                         clocks = <&periph_clk>;
  77                 };
  78
  79                 watchdog@20620 {
  80                         compatible = "arm,cortex-a9-twd-wdt";
  81                         reg = <0x20620 0x20>;
  82                         interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
  83                                                   IRQ_TYPE_EDGE_RISING)>;
  84                         clocks = <&periph_clk>;
  85                 };
  86
  87                 gic: interrupt-controller@21000 {
  88                         compatible = "arm,cortex-a9-gic";
  89                         #interrupt-cells = <3>;
  90                         #address-cells = <0>;
  91                         interrupt-controller;
  92                         reg = <0x21000 0x1000>,
  93                               <0x20100 0x100>;
  94                 };
  95
  96                 L2: cache-controller@22000 {
  97                         compatible = "arm,pl310-cache";
  98                         reg = <0x22000 0x1000>;
  99                         cache-unified;
 100                         arm,shared-override;
 101                         prefetch-data = <1>;
 102                         prefetch-instr = <1>;
 103                         cache-level = <2>;
 104                 };
 105         };
 106
 107         pmu {
 108                 compatible = "arm,cortex-a9-pmu";
 109                 interrupts =
 110                         <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
 111                         <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 112         };
 113
 114         clocks {
 115                 #address-cells = <1>;
 116                 #size-cells = <1>;
 117                 ranges;
 118
 119                 osc: oscillator {
 120                         #clock-cells = <0>;
 121                         compatible = "fixed-clock";
 122                         clock-frequency = <25000000>;
 123                 };
 124
 125                 iprocmed: iprocmed {
 126                         #clock-cells = <0>;
 127                         compatible = "fixed-factor-clock";
 128                         clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
 129                         clock-div = <2>;
 130                         clock-mult = <1>;
 131                 };
 132
 133                 iprocslow: iprocslow {
 134                         #clock-cells = <0>;
 135                         compatible = "fixed-factor-clock";
 136                         clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
 137                         clock-div = <4>;
 138                         clock-mult = <1>;
 139                 };
 140
 141                 periph_clk: periph_clk {
 142                         #clock-cells = <0>;
 143                         compatible = "fixed-factor-clock";
 144                         clocks = <&a9pll>;
 145                         clock-div = <2>;
 146                         clock-mult = <1>;
 147                 };
 148         };
 149
 150         usb2_phy: usb2-phy {
 151                 compatible = "brcm,ns-usb2-phy";
 152                 reg = <0x1800c000 0x1000>;
 153                 reg-names = "dmu";
 154                 #phy-cells = <0>;
 155                 clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
 156                 clock-names = "phy-ref-clk";
 157         };
 158
 159         axi@18000000 {
 160                 compatible = "brcm,bus-axi";
 161                 reg = <0x18000000 0x1000>;
 162                 ranges = <0x00000000 0x18000000 0x00100000>;
 163                 #address-cells = <1>;
 164                 #size-cells = <1>;
 165
 166                 #interrupt-cells = <1>;
 167                 interrupt-map-mask = <0x000fffff 0xffff>;
 168                 interrupt-map =
 169                         /* ChipCommon */
 170                         <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 171
 172                         /* Switch Register Access Block */
 173                         <0x00007000 0 &gic GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
 174                         <0x00007000 1 &gic GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
 175                         <0x00007000 2 &gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
 176                         <0x00007000 3 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
 177                         <0x00007000 4 &gic GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
 178                         <0x00007000 5 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
 179                         <0x00007000 6 &gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
 180                         <0x00007000 7 &gic GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
 181                         <0x00007000 8 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
 182                         <0x00007000 9 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
 183                         <0x00007000 10 &gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
 184                         <0x00007000 11 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
 185                         <0x00007000 12 &gic GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
 186
 187                         /* PCIe Controller 0 */
 188                         <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 189                         <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
 190                         <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 191                         <0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 192                         <0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
 193                         <0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 194
 195                         /* PCIe Controller 1 */
 196                         <0x00013000 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 197                         <0x00013000 1 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
 198                         <0x00013000 2 &gic GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
 199                         <0x00013000 3 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
 200                         <0x00013000 4 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 201                         <0x00013000 5 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 202
 203                         /* PCIe Controller 2 */
 204                         <0x00014000 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
 205                         <0x00014000 1 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
 206                         <0x00014000 2 &gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
 207                         <0x00014000 3 &gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
 208                         <0x00014000 4 &gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 209                         <0x00014000 5 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
 210
 211                         /* USB 2.0 Controller */
 212                         <0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
 213
 214                         /* USB 3.0 Controller */
 215                         <0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
 216
 217                         /* Ethernet Controller 0 */
 218                         <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
 219
 220                         /* Ethernet Controller 1 */
 221                         <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
 222
 223                         /* Ethernet Controller 2 */
 224                         <0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
 225
 226                         /* Ethernet Controller 3 */
 227                         <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
 228
 229                         /* NAND Controller */
 230                         <0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
 231                         <0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
 232                         <0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
 233                         <0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 234                         <0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 235                         <0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
 236                         <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
 237                         <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 238
 239                 chipcommon: chipcommon@0 {
 240                         reg = <0x00000000 0x1000>;
 241
 242                         gpio-controller;
 243                         #gpio-cells = <2>;
 244                 };
 245
 246                 pcie0: pcie@12000 {
 247                         reg = <0x00012000 0x1000>;
 248                 };
 249
 250                 pcie1: pcie@13000 {
 251                         reg = <0x00013000 0x1000>;
 252                 };
 253
 254                 usb2: usb2@21000 {
 255                         reg = <0x00021000 0x1000>;
 256
 257                         #address-cells = <1>;
 258                         #size-cells = <1>;
 259                         ranges;
 260
 261                         interrupt-parent = <&gic>;
 262
 263                         ehci: ehci@21000 {
 264                                 #usb-cells = <0>;
 265
 266                                 compatible = "generic-ehci";
 267                                 reg = <0x00021000 0x1000>;
 268                                 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
 269                                 phys = <&usb2_phy>;
 270
 271                                 #address-cells = <1>;
 272                                 #size-cells = <0>;
 273
 274                                 ehci_port1: port@1 {
 275                                         reg = <1>;
 276                                         #trigger-source-cells = <0>;
 277                                 };
 278
 279                                 ehci_port2: port@2 {
 280                                         reg = <2>;
 281                                         #trigger-source-cells = <0>;
 282                                 };
 283                         };
 284
 285                         ohci: ohci@22000 {
 286                                 #usb-cells = <0>;
 287
 288                                 compatible = "generic-ohci";
 289                                 reg = <0x00022000 0x1000>;
 290                                 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
 291
 292                                 #address-cells = <1>;
 293                                 #size-cells = <0>;
 294
 295                                 ohci_port1: port@1 {
 296                                         reg = <1>;
 297                                         #trigger-source-cells = <0>;
 298                                 };
 299
 300                                 ohci_port2: port@2 {
 301                                         reg = <2>;
 302                                         #trigger-source-cells = <0>;
 303                                 };
 304                         };
 305                 };
 306
 307                 usb3: usb3@23000 {
 308                         reg = <0x00023000 0x1000>;
 309
 310                         #address-cells = <1>;
 311                         #size-cells = <1>;
 312                         ranges;
 313
 314                         interrupt-parent = <&gic>;
 315
 316                         xhci: xhci@23000 {
 317                                 #usb-cells = <0>;
 318
 319                                 compatible = "generic-xhci";
 320                                 reg = <0x00023000 0x1000>;
 321                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 322                                 phys = <&usb3_phy>;
 323                                 phy-names = "usb";
 324
 325                                 #address-cells = <1>;
 326                                 #size-cells = <0>;
 327
 328                                 xhci_port1: port@1 {
 329                                         reg = <1>;
 330                                         #trigger-source-cells = <0>;
 331                                 };
 332                         };
 333                 };
 334
 335                 gmac0: ethernet@24000 {
 336                         reg = <0x24000 0x800>;
 337                 };
 338
 339                 gmac1: ethernet@25000 {
 340                         reg = <0x25000 0x800>;
 341                 };
 342
 343                 gmac2: ethernet@26000 {
 344                         reg = <0x26000 0x800>;
 345                 };
 346
 347                 gmac3: ethernet@27000 {
 348                         reg = <0x27000 0x800>;
 349                 };
 350         };
 351
 352         mdio: mdio@18003000 {
 353                 compatible = "brcm,iproc-mdio";
 354                 reg = <0x18003000 0x8>;
 355                 #size-cells = <1>;
 356                 #address-cells = <0>;
 357         };
 358
 359         mdio-bus-mux {
 360                 compatible = "mdio-mux-mmioreg";
 361                 mdio-parent-bus = <&mdio>;
 362                 #address-cells = <1>;
 363                 #size-cells = <0>;
 364                 reg = <0x18003000 0x4>;
 365                 mux-mask = <0x200>;
 366
 367                 mdio@0 {
 368                         reg = <0x0>;
 369                         #address-cells = <1>;
 370                         #size-cells = <0>;
 371
 372                         usb3_phy: usb3-phy@10 {
 373                                 compatible = "brcm,ns-ax-usb3-phy";
 374                                 reg = <0x10>;
 375                                 usb3-dmp-syscon = <&usb3_dmp>;
 376                                 #phy-cells = <0>;
 377                                 status = "disabled";
 378                         };
 379                 };
 380         };
 381
 382         usb3_dmp: syscon@18105000 {
 383                 reg = <0x18105000 0x1000>;
 384         };
 385
 386         i2c0: i2c@18009000 {
 387                 compatible = "brcm,iproc-i2c";
 388                 reg = <0x18009000 0x50>;
 389                 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 390                 #address-cells = <1>;
 391                 #size-cells = <0>;
 392                 clock-frequency = <100000>;
 393                 status = "disabled";
 394         };
 395
 396         dmu@1800c000 {
 397                 compatible = "simple-bus";
 398                 ranges = <0 0x1800c000 0x1000>;
 399                 #address-cells = <1>;
 400                 #size-cells = <1>;
 401
 402                 cru@100 {
 403                         compatible = "simple-bus";
 404                         reg = <0x100 0x1a4>;
 405                         ranges;
 406                         #address-cells = <1>;
 407                         #size-cells = <1>;
 408
 409                         pin-controller@1c0 {
 410                                 compatible = "brcm,bcm4708-pinmux";
 411                                 reg = <0x1c0 0x24>;
 412                                 reg-names = "cru_gpio_control";
 413
 414                                 spi-pins {
 415                                         groups = "spi_grp";
 416                                         function = "spi";
 417                                 };
 418
 419                                 i2c {
 420                                         groups = "i2c_grp";
 421                                         function = "i2c";
 422                                 };
 423
 424                                 pwm {
 425                                         groups = "pwm0_grp", "pwm1_grp",
 426                                                  "pwm2_grp", "pwm3_grp";
 427                                         function = "pwm";
 428                                 };
 429
 430                                 pinmux_uart1: uart1 {
 431                                         groups = "uart1_grp";
 432                                         function = "uart1";
 433                                 };
 434                         };
 435                 };
 436         };
 437
 438         lcpll0: lcpll0@1800c100 {
 439                 #clock-cells = <1>;
 440                 compatible = "brcm,nsp-lcpll0";
 441                 reg = <0x1800c100 0x14>;
 442                 clocks = <&osc>;
 443                 clock-output-names = "lcpll0", "pcie_phy", "sdio",
 444                                      "ddr_phy";
 445         };
 446
 447         genpll: genpll@1800c140 {
 448                 #clock-cells = <1>;
 449                 compatible = "brcm,nsp-genpll";
 450                 reg = <0x1800c140 0x24>;
 451                 clocks = <&osc>;
 452                 clock-output-names = "genpll", "phy", "ethernetclk",
 453                                      "usbclk", "iprocfast", "sata1",
 454                                      "sata2";
 455         };
 456
 457         thermal: thermal@1800c2c0 {
 458                 compatible = "brcm,ns-thermal";
 459                 reg = <0x1800c2c0 0x10>;
 460                 #thermal-sensor-cells = <0>;
 461         };
 462
 463         srab: srab@18007000 {
 464                 compatible = "brcm,bcm5301x-srab";
 465                 reg = <0x18007000 0x1000>;
 466                 #address-cells = <1>;
 467                 #size-cells = <0>;
 468
 469                 status = "disabled";
 470
 471                 /* ports are defined in board DTS */
 472         };
 473
 474         rng: rng@18004000 {
 475                 compatible = "brcm,bcm5301x-rng";
 476                 reg = <0x18004000 0x14>;
 477         };
 478
 479         nand: nand@18028000 {
 480                 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
 481                 reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
 482                 reg-names = "nand", "iproc-idm", "iproc-ext";
 483                 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 484
 485                 #address-cells = <1>;
 486                 #size-cells = <0>;
 487
 488                 brcm,nand-has-wp;
 489         };
 490
 491         spi@18029200 {
 492                 compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
 493                 reg = <0x18029200 0x184>,
 494                       <0x18029000 0x124>,
 495                       <0x1811b408 0x004>,
 496                       <0x180293a0 0x01c>;
 497                 reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg";
 498                 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 499                              <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 500                              <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 501                              <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
 502                              <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
 503                              <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
 504                              <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 505                 interrupt-names = "spi_lr_fullness_reached",
 506                                   "spi_lr_session_aborted",
 507                                   "spi_lr_impatient",
 508                                   "spi_lr_session_done",
 509                                   "spi_lr_overhead",
 510                                   "mspi_done",
 511                                   "mspi_halted";
 512                 clocks = <&iprocmed>;
 513                 clock-names = "iprocmed";
 514                 num-cs = <2>;
 515                 #address-cells = <1>;
 516                 #size-cells = <0>;
 517
 518                 spi_nor: spi-nor@0 {
 519                         compatible = "jedec,spi-nor";
 520                         reg = <0>;
 521                         spi-max-frequency = <20000000>;
 522                         status = "disabled";
 523
 524                         partitions {
 525                                 compatible = "brcm,bcm947xx-cfe-partitions";
 526                         };
 527                 };
 528         };
 529
 530         thermal-zones {
 531                 cpu_thermal: cpu-thermal {
 532                         polling-delay-passive = <0>;
 533                         polling-delay = <1000>;
 534                         coefficients = <(-556) 418000>;
 535                         thermal-sensors = <&thermal>;
 536
 537                         trips {
 538                                 cpu-crit {
 539                                         temperature     = <125000>;
 540                                         hysteresis      = <0>;
 541                                         type            = "critical";
 542                                 };
 543                         };
 544
 545                         cooling-maps {
 546                         };
 547                 };
 548         };
 549 };