arch/arm/boot/dts/bcm-cygnus.dtsi

   1 /*
   2  *  BSD LICENSE
   3  *
   4  *  Copyright(c) 2014 Broadcom Corporation.  All rights reserved.
   5  *
   6  *  Redistribution and use in source and binary forms, with or without
   7  *  modification, are permitted provided that the following conditions
   8  *  are met:
   9  *
  10  *    * Redistributions of source code must retain the above copyright
  11  *      notice, this list of conditions and the following disclaimer.
  12  *    * Redistributions in binary form must reproduce the above copyright
  13  *      notice, this list of conditions and the following disclaimer in
  14  *      the documentation and/or other materials provided with the
  15  *      distribution.
  16  *    * Neither the name of Broadcom Corporation nor the names of its
  17  *      contributors may be used to endorse or promote products derived
  18  *      from this software without specific prior written permission.
  19  *
  20  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 #include <dt-bindings/interrupt-controller/arm-gic.h>
  34 #include <dt-bindings/interrupt-controller/irq.h>
  35 #include <dt-bindings/clock/bcm-cygnus.h>
  36
  37 #include "skeleton.dtsi"
  38
  39 / {
  40         compatible = "brcm,cygnus";
  41         model = "Broadcom Cygnus SoC";
  42         interrupt-parent = <&gic>;
  43
  44         aliases {
  45                 ethernet0 = &eth0;
  46         };
  47
  48         cpus {
  49                 #address-cells = <1>;
  50                 #size-cells = <0>;
  51
  52                 cpu@0 {
  53                         device_type = "cpu";
  54                         compatible = "arm,cortex-a9";
  55                         next-level-cache = <&L2>;
  56                         reg = <0x0>;
  57                 };
  58         };
  59
  60         /include/ "bcm-cygnus-clock.dtsi"
  61
  62         pmu {
  63                 compatible = "arm,cortex-a9-pmu";
  64                 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
  65         };
  66
  67         core {
  68                 compatible = "simple-bus";
  69                 ranges = <0x00000000 0x19000000 0x1000000>;
  70                 #address-cells = <1>;
  71                 #size-cells = <1>;
  72
  73                 timer@20200 {
  74                         compatible = "arm,cortex-a9-global-timer";
  75                         reg = <0x20200 0x100>;
  76                         interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
  77                         clocks = <&periph_clk>;
  78                 };
  79
  80                 gic: interrupt-controller@21000 {
  81                         compatible = "arm,cortex-a9-gic";
  82                         #interrupt-cells = <3>;
  83                         #address-cells = <0>;
  84                         interrupt-controller;
  85                         reg = <0x21000 0x1000>,
  86                               <0x20100 0x100>;
  87                 };
  88
  89                 L2: l2-cache {
  90                         compatible = "arm,pl310-cache";
  91                         reg = <0x22000 0x1000>;
  92                         cache-unified;
  93                         cache-level = <2>;
  94                 };
  95         };
  96
  97         axi {
  98                 compatible = "simple-bus";
  99                 ranges;
 100                 #address-cells = <1>;
 101                 #size-cells = <1>;
 102
 103                 otp: otp@301c800 {
 104                         compatible = "brcm,ocotp";
 105                         reg = <0x0301c800 0x2c>;
 106                         brcm,ocotp-size = <2048>;
 107                         status = "disabled";
 108                 };
 109
 110                 pcie_phy: phy@301d0a0 {
 111                         compatible = "brcm,cygnus-pcie-phy";
 112                         reg = <0x0301d0a0 0x14>;
 113                         #address-cells = <1>;
 114                         #size-cells = <0>;
 115
 116                         pcie0_phy: phy@0 {
 117                                 reg = <0>;
 118                                 #phy-cells = <0>;
 119                         };
 120
 121                         pcie1_phy: phy@1 {
 122                                 reg = <1>;
 123                                 #phy-cells = <0>;
 124                         };
 125                 };
 126
 127                 pinctrl: pinctrl@301d0c8 {
 128                         compatible = "brcm,cygnus-pinmux";
 129                         reg = <0x0301d0c8 0x30>,
 130                               <0x0301d24c 0x2c>;
 131
 132                         spi_0: spi_0 {
 133                                 function = "spi0";
 134                                 groups = "spi0_grp";
 135                         };
 136
 137                         spi_1: spi_1 {
 138                                 function = "spi1";
 139                                 groups = "spi1_grp";
 140                         };
 141
 142                         spi_2: spi_2 {
 143                                 function = "spi2";
 144                                 groups = "spi2_grp";
 145                         };
 146                 };
 147
 148                 mailbox: mailbox@3024024 {
 149                         compatible = "brcm,iproc-mailbox";
 150                         reg = <0x03024024 0x40>;
 151                         interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 152                         #interrupt-cells = <1>;
 153                         interrupt-controller;
 154                         #mbox-cells = <1>;
 155                 };
 156
 157                 gpio_crmu: gpio@3024800 {
 158                         compatible = "brcm,cygnus-crmu-gpio";
 159                         reg = <0x03024800 0x50>,
 160                               <0x03024008 0x18>;
 161                         ngpios = <6>;
 162                         #gpio-cells = <2>;
 163                         gpio-controller;
 164                         interrupt-controller;
 165                         interrupt-parent = <&mailbox>;
 166                         interrupts = <0>;
 167                 };
 168
 169                 mdio: mdio@18002000 {
 170                         compatible = "brcm,iproc-mdio";
 171                         reg = <0x18002000 0x8>;
 172                         #size-cells = <1>;
 173                         #address-cells = <0>;
 174                         status = "disabled";
 175
 176                         gphy0: ethernet-phy@0 {
 177                                 reg = <0>;
 178                         };
 179
 180                         gphy1: ethernet-phy@1 {
 181                                 reg = <1>;
 182                         };
 183                 };
 184
 185                 switch: switch@18007000 {
 186                         compatible = "brcm,bcm11360-srab", "brcm,cygnus-srab";
 187                         reg = <0x18007000 0x1000>;
 188                         status = "disabled";
 189
 190                         ports {
 191                                 #address-cells = <1>;
 192                                 #size-cells = <0>;
 193
 194                                 port@0 {
 195                                         reg = <0>;
 196                                         phy-handle = <&gphy0>;
 197                                         phy-mode = "rgmii";
 198                                 };
 199
 200                                 port@1 {
 201                                         reg = <1>;
 202                                         phy-handle = <&gphy1>;
 203                                         phy-mode = "rgmii";
 204                                 };
 205
 206                                 port@8 {
 207                                         reg = <8>;
 208                                         label = "cpu";
 209                                         ethernet = <&eth0>;
 210                                         fixed-link {
 211                                                 speed = <1000>;
 212                                                 full-duplex;
 213                                         };
 214                                 };
 215                         };
 216                 };
 217
 218                 i2c0: i2c@18008000 {
 219                         compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
 220                         reg = <0x18008000 0x100>;
 221                         #address-cells = <1>;
 222                         #size-cells = <0>;
 223                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 224                         clock-frequency = <100000>;
 225                         status = "disabled";
 226                 };
 227
 228                 wdt0: wdt@18009000 {
 229                         compatible = "arm,sp805" , "arm,primecell";
 230                         reg = <0x18009000 0x1000>;
 231                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
 232                         clocks = <&axi81_clk>;
 233                         clock-names = "apb_pclk";
 234                 };
 235
 236                 gpio_ccm: gpio@1800a000 {
 237                         compatible = "brcm,cygnus-ccm-gpio";
 238                         reg = <0x1800a000 0x50>,
 239                               <0x0301d164 0x20>;
 240                         ngpios = <24>;
 241                         #gpio-cells = <2>;
 242                         gpio-controller;
 243                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 244                         interrupt-controller;
 245                 };
 246
 247                 i2c1: i2c@1800b000 {
 248                         compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
 249                         reg = <0x1800b000 0x100>;
 250                         #address-cells = <1>;
 251                         #size-cells = <0>;
 252                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 253                         clock-frequency = <100000>;
 254                         status = "disabled";
 255                 };
 256
 257                 pcie0: pcie@18012000 {
 258                         compatible = "brcm,iproc-pcie";
 259                         reg = <0x18012000 0x1000>;
 260
 261                         #interrupt-cells = <1>;
 262                         interrupt-map-mask = <0 0 0 0>;
 263                         interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 264
 265                         linux,pci-domain = <0>;
 266
 267                         bus-range = <0x00 0xff>;
 268
 269                         #address-cells = <3>;
 270                         #size-cells = <2>;
 271                         device_type = "pci";
 272                         ranges = <0x81000000 0 0          0x28000000 0 0x00010000
 273                                   0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
 274
 275                         phys = <&pcie0_phy>;
 276                         phy-names = "pcie-phy";
 277
 278                         status = "disabled";
 279
 280                         msi-parent = <&msi0>;
 281                         msi0: msi-controller {
 282                                 compatible = "brcm,iproc-msi";
 283                                 msi-controller;
 284                                 interrupt-parent = <&gic>;
 285                                 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
 286                                              <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
 287                                              <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
 288                                              <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
 289                         };
 290                 };
 291
 292                 pcie1: pcie@18013000 {
 293                         compatible = "brcm,iproc-pcie";
 294                         reg = <0x18013000 0x1000>;
 295
 296                         #interrupt-cells = <1>;
 297                         interrupt-map-mask = <0 0 0 0>;
 298                         interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
 299
 300                         linux,pci-domain = <1>;
 301
 302                         bus-range = <0x00 0xff>;
 303
 304                         #address-cells = <3>;
 305                         #size-cells = <2>;
 306                         device_type = "pci";
 307                         ranges = <0x81000000 0 0          0x48000000 0 0x00010000
 308                                   0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
 309
 310                         phys = <&pcie1_phy>;
 311                         phy-names = "pcie-phy";
 312
 313                         status = "disabled";
 314
 315                         msi-parent = <&msi1>;
 316                         msi1: msi-controller {
 317                                 compatible = "brcm,iproc-msi";
 318                                 msi-controller;
 319                                 interrupt-parent = <&gic>;
 320                                 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
 321                                              <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
 322                                              <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
 323                                              <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
 324                         };
 325                 };
 326
 327                 dma0: dma@18018000 {
 328                         compatible = "arm,pl330", "arm,primecell";
 329                         reg = <0x18018000 0x1000>;
 330                         interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 331                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 332                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 333                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 334                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 335                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 336                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 337                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 338                                      <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 339                         clocks = <&apb_clk>;
 340                         clock-names = "apb_pclk";
 341                         #dma-cells = <1>;
 342                 };
 343
 344                 uart0: serial@18020000 {
 345                         compatible = "snps,dw-apb-uart";
 346                         reg = <0x18020000 0x100>;
 347                         reg-shift = <2>;
 348                         reg-io-width = <4>;
 349                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 350                         clocks = <&axi81_clk>;
 351                         clock-frequency = <100000000>;
 352                         status = "disabled";
 353                 };
 354
 355                 uart1: serial@18021000 {
 356                         compatible = "snps,dw-apb-uart";
 357                         reg = <0x18021000 0x100>;
 358                         reg-shift = <2>;
 359                         reg-io-width = <4>;
 360                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 361                         clocks = <&axi81_clk>;
 362                         clock-frequency = <100000000>;
 363                         status = "disabled";
 364                 };
 365
 366                 uart2: serial@18022000 {
 367                         compatible = "snps,dw-apb-uart";
 368                         reg = <0x18022000 0x100>;
 369                         reg-shift = <2>;
 370                         reg-io-width = <4>;
 371                         interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 372                         clocks = <&axi81_clk>;
 373                         clock-frequency = <100000000>;
 374                         status = "disabled";
 375                 };
 376
 377                 uart3: serial@18023000 {
 378                         compatible = "snps,dw-apb-uart";
 379                         reg = <0x18023000 0x100>;
 380                         reg-shift = <2>;
 381                         reg-io-width = <4>;
 382                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 383                         clocks = <&axi81_clk>;
 384                         clock-frequency = <100000000>;
 385                         status = "disabled";
 386                 };
 387
 388                 spi0: spi@18028000 {
 389                         compatible = "arm,pl022", "arm,primecell";
 390                         reg = <0x18028000 0x1000>;
 391                         #address-cells = <1>;
 392                         #size-cells = <0>;
 393                         interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 394                         pinctrl-0 = <&spi_0>;
 395                         clocks = <&axi81_clk>;
 396                         clock-names = "apb_pclk";
 397                         status = "disabled";
 398                 };
 399
 400                 spi1: spi@18029000 {
 401                         compatible = "arm,pl022", "arm,primecell";
 402                         reg = <0x18029000 0x1000>;
 403                         #address-cells = <1>;
 404                         #size-cells = <0>;
 405                         interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
 406                         pinctrl-0 = <&spi_1>;
 407                         clocks = <&axi81_clk>;
 408                         clock-names = "apb_pclk";
 409                         status = "disabled";
 410                 };
 411
 412                 spi2: spi@1802a000 {
 413                         compatible = "arm,pl022", "arm,primecell";
 414                         reg = <0x1802a000 0x1000>;
 415                         #address-cells = <1>;
 416                         #size-cells = <0>;
 417                         interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 418                         pinctrl-0 = <&spi_2>;
 419                         clocks = <&axi81_clk>;
 420                         clock-names = "apb_pclk";
 421                         status = "disabled";
 422                 };
 423
 424                 rng: rng@18032000 {
 425                         compatible = "brcm,iproc-rng200";
 426                         reg = <0x18032000 0x28>;
 427                 };
 428
 429                 sdhci0: sdhci@18041000 {
 430                         compatible = "brcm,sdhci-iproc-cygnus";
 431                         reg = <0x18041000 0x100>;
 432                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 433                         clocks = <&lcpll0 BCM_CYGNUS_LCPLL0_SDIO_CLK>;
 434                         bus-width = <4>;
 435                         sdhci,auto-cmd12;
 436                         status = "disabled";
 437                 };
 438
 439                 eth0: ethernet@18042000 {
 440                         compatible = "brcm,amac";
 441                         reg = <0x18042000 0x1000>,
 442                               <0x18110000 0x1000>;
 443                         reg-names = "amac_base", "idm_base";
 444                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 445                         status = "disabled";
 446                 };
 447
 448                 sdhci1: sdhci@18043000 {
 449                         compatible = "brcm,sdhci-iproc-cygnus";
 450                         reg = <0x18043000 0x100>;
 451                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 452                         clocks = <&lcpll0 BCM_CYGNUS_LCPLL0_SDIO_CLK>;
 453                         bus-width = <4>;
 454                         sdhci,auto-cmd12;
 455                         status = "disabled";
 456                 };
 457
 458                 nand: nand@18046000 {
 459                         compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
 460                         reg = <0x18046000 0x600>, <0xf8105408 0x600>,
 461                               <0x18046f00 0x20>;
 462                         reg-names = "nand", "iproc-idm", "iproc-ext";
 463                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 464
 465                         #address-cells = <1>;
 466                         #size-cells = <0>;
 467
 468                         brcm,nand-has-wp;
 469                 };
 470
 471                 ehci0: usb@18048000 {
 472                         compatible = "generic-ehci";
 473                         reg = <0x18048000 0x100>;
 474                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
 475                         status = "disabled";
 476                 };
 477
 478                 ohci0: usb@18048800 {
 479                         compatible = "generic-ohci";
 480                         reg = <0x18048800 0x100>;
 481                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
 482                         status = "disabled";
 483                 };
 484
 485                 clcd: clcd@180a0000 {
 486                         compatible = "arm,pl111", "arm,primecell";
 487                         reg = <0x180a0000 0x1000>;
 488                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 489                         interrupt-names = "combined";
 490                         clocks = <&axi41_clk>, <&apb_clk>;
 491                         clock-names = "clcdclk", "apb_pclk";
 492                         status = "disabled";
 493                 };
 494
 495                 v3d: v3d@180a2000 {
 496                         compatible = "brcm,cygnus-v3d";
 497                         reg = <0x180a2000 0x1000>;
 498                         clocks = <&mipipll BCM_CYGNUS_MIPIPLL_CH2_V3D>;
 499                         clock-names = "v3d_clk";
 500                         interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
 501                         status = "disabled";
 502                 };
 503
 504                 vc4: gpu {
 505                         compatible = "brcm,cygnus-vc4";
 506                 };
 507
 508                 gpio_asiu: gpio@180a5000 {
 509                         compatible = "brcm,cygnus-asiu-gpio";
 510                         reg = <0x180a5000 0x668>;
 511                         ngpios = <146>;
 512                         #gpio-cells = <2>;
 513                         gpio-controller;
 514
 515                         interrupt-controller;
 516                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 517                         gpio-ranges = <&pinctrl 0 42 1>,
 518                                         <&pinctrl 1 44 3>,
 519                                         <&pinctrl 4 48 1>,
 520                                         <&pinctrl 5 50 3>,
 521                                         <&pinctrl 8 126 1>,
 522                                         <&pinctrl 9 155 1>,
 523                                         <&pinctrl 10 152 1>,
 524                                         <&pinctrl 11 154 1>,
 525                                         <&pinctrl 12 153 1>,
 526                                         <&pinctrl 13 127 3>,
 527                                         <&pinctrl 16 140 1>,
 528                                         <&pinctrl 17 145 7>,
 529                                         <&pinctrl 24 130 10>,
 530                                         <&pinctrl 34 141 4>,
 531                                         <&pinctrl 38 54 1>,
 532                                         <&pinctrl 39 56 3>,
 533                                         <&pinctrl 42 60 3>,
 534                                         <&pinctrl 45 64 3>,
 535                                         <&pinctrl 48 68 2>,
 536                                         <&pinctrl 50 84 6>,
 537                                         <&pinctrl 56 94 6>,
 538                                         <&pinctrl 62 72 1>,
 539                                         <&pinctrl 63 70 1>,
 540                                         <&pinctrl 64 80 1>,
 541                                         <&pinctrl 65 74 3>,
 542                                         <&pinctrl 68 78 1>,
 543                                         <&pinctrl 69 82 1>,
 544                                         <&pinctrl 70 156 17>,
 545                                         <&pinctrl 87 104 12>,
 546                                         <&pinctrl 99 102 2>,
 547                                         <&pinctrl 101 90 4>,
 548                                         <&pinctrl 105 116 6>,
 549                                         <&pinctrl 111 100 2>,
 550                                         <&pinctrl 113 122 4>,
 551                                         <&pinctrl 123 11 1>,
 552                                         <&pinctrl 124 38 4>,
 553                                         <&pinctrl 128 43 1>,
 554                                         <&pinctrl 129 47 1>,
 555                                         <&pinctrl 130 49 1>,
 556                                         <&pinctrl 131 53 1>,
 557                                         <&pinctrl 132 55 1>,
 558                                         <&pinctrl 133 59 1>,
 559                                         <&pinctrl 134 63 1>,
 560                                         <&pinctrl 135 67 1>,
 561                                         <&pinctrl 136 71 1>,
 562                                         <&pinctrl 137 73 1>,
 563                                         <&pinctrl 138 77 1>,
 564                                         <&pinctrl 139 79 1>,
 565                                         <&pinctrl 140 81 1>,
 566                                         <&pinctrl 141 83 1>,
 567                                         <&pinctrl 142 10 1>;
 568                 };
 569
 570                 ts_adc_syscon: ts_adc_syscon@180a6000 {
 571                         compatible = "brcm,iproc-ts-adc-syscon", "syscon";
 572                         reg = <0x180a6000 0xc30>;
 573                 };
 574
 575                 touchscreen: touchscreen@180a6000 {
 576                         compatible = "brcm,iproc-touchscreen";
 577                         #address-cells = <1>;
 578                         #size-cells = <1>;
 579                         ts_syscon = <&ts_adc_syscon>;
 580                         clocks = <&asiu_clks BCM_CYGNUS_ASIU_ADC_CLK>;
 581                         clock-names = "tsc_clk";
 582                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 583                         status = "disabled";
 584                 };
 585
 586                 adc: adc@180a6000 {
 587                         compatible = "brcm,iproc-static-adc";
 588                         #io-channel-cells = <1>;
 589                         io-channel-ranges;
 590                         adc-syscon = <&ts_adc_syscon>;
 591                         clocks = <&asiu_clks BCM_CYGNUS_ASIU_ADC_CLK>;
 592                         clock-names = "tsc_clk";
 593                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 594                         status = "disabled";
 595                 };
 596
 597                 pwm: pwm@180aa500 {
 598                         compatible = "brcm,kona-pwm";
 599                         reg = <0x180aa500 0xc4>;
 600                         #pwm-cells = <3>;
 601                         clocks = <&asiu_clks BCM_CYGNUS_ASIU_PWM_CLK>;
 602                         status = "disabled";
 603                 };
 604
 605                 keypad: keypad@180ac000 {
 606                         compatible = "brcm,bcm-keypad";
 607                         reg = <0x180ac000 0x14c>;
 608                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 609                         clocks = <&asiu_clks BCM_CYGNUS_ASIU_KEYPAD_CLK>;
 610                         clock-names = "peri_clk";
 611                         clock-frequency = <31250>;
 612                         pull-up-enabled;
 613                         col-debounce-filter-period = <0>;
 614                         status-debounce-filter-period = <0>;
 615                         row-output-enabled;
 616                         status = "disabled";
 617                 };
 618         };
 619 };