1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
4 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
5 * AT91SAM9X25, AT91SAM9X35 SoC
7 * Copyright (C) 2012 Atmel,
8 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
20 model = "Atmel AT91SAM9x5 family SoC";
21 compatible = "atmel,at91sam9x5";
22 interrupt-parent = <&aic>;
46 compatible = "arm,arm926ej-s";
52 device_type = "memory";
53 reg = <0x20000000 0x10000000>;
57 slow_xtal: slow_xtal {
58 compatible = "fixed-clock";
60 clock-frequency = <0>;
63 main_xtal: main_xtal {
64 compatible = "fixed-clock";
66 clock-frequency = <0>;
69 adc_op_clk: adc_op_clk{
70 compatible = "fixed-clock";
72 clock-frequency = <1000000>;
77 compatible = "mmio-sram";
78 reg = <0x00300000 0x8000>;
82 compatible = "simple-bus";
88 compatible = "simple-bus";
93 aic: interrupt-controller@fffff000 {
94 #interrupt-cells = <3>;
95 compatible = "atmel,at91rm9200-aic";
97 reg = <0xfffff000 0x200>;
98 atmel,external-irqs = <31>;
101 matrix: matrix@ffffde00 {
102 compatible = "atmel,at91sam9x5-matrix", "syscon";
103 reg = <0xffffde00 0x100>;
106 pmecc: ecc-engine@ffffe000 {
107 compatible = "atmel,at91sam9g45-pmecc";
108 reg = <0xffffe000 0x600>,
112 ramc0: ramc@ffffe800 {
113 compatible = "atmel,at91sam9g45-ddramc";
114 reg = <0xffffe800 0x200>;
115 clocks = <&pmc PMC_TYPE_SYSTEM 2>;
116 clock-names = "ddrck";
120 compatible = "atmel,at91sam9260-smc", "syscon";
121 reg = <0xffffea00 0x200>;
125 compatible = "atmel,at91sam9x5-pmc", "syscon";
126 reg = <0xfffffc00 0x200>;
127 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
129 clocks = <&clk32k>, <&main_xtal>;
130 clock-names = "slow_clk", "main_xtal";
133 reset_controller: rstc@fffffe00 {
134 compatible = "atmel,at91sam9g45-rstc";
135 reg = <0xfffffe00 0x10>;
139 shutdown_controller: shdwc@fffffe10 {
140 compatible = "atmel,at91sam9x5-shdwc";
141 reg = <0xfffffe10 0x10>;
145 pit: timer@fffffe30 {
146 compatible = "atmel,at91sam9260-pit";
147 reg = <0xfffffe30 0xf>;
148 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
149 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
153 compatible = "atmel,at91sam9x5-sckc";
154 reg = <0xfffffe50 0x4>;
157 compatible = "atmel,at91sam9x5-clk-slow-osc";
159 clocks = <&slow_xtal>;
162 slow_rc_osc: slow_rc_osc {
163 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
165 clock-frequency = <32768>;
166 clock-accuracy = <50000000>;
170 compatible = "atmel,at91sam9x5-clk-slow";
172 clocks = <&slow_rc_osc>, <&slow_osc>;
176 tcb0: timer@f8008000 {
177 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
178 #address-cells = <1>;
180 reg = <0xf8008000 0x100>;
181 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
182 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
183 clock-names = "t0_clk", "slow_clk";
186 tcb1: timer@f800c000 {
187 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
188 #address-cells = <1>;
190 reg = <0xf800c000 0x100>;
191 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
192 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
193 clock-names = "t0_clk", "slow_clk";
196 dma0: dma-controller@ffffec00 {
197 compatible = "atmel,at91sam9g45-dma";
198 reg = <0xffffec00 0x200>;
199 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
201 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
202 clock-names = "dma_clk";
205 dma1: dma-controller@ffffee00 {
206 compatible = "atmel,at91sam9g45-dma";
207 reg = <0xffffee00 0x200>;
208 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
210 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
211 clock-names = "dma_clk";
214 pinctrl: pinctrl@fffff400 {
215 #address-cells = <1>;
217 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
218 ranges = <0xfffff400 0xfffff400 0x800>;
220 /* shared pinctrl settings */
222 pinctrl_dbgu: dbgu-0 {
224 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
225 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
230 pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
232 <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE
233 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE
234 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE
235 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE
236 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE
237 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE
238 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE
239 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
242 pinctrl_ebi_data_8_15: ebi-data-msb-0 {
244 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE
245 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE
246 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE
247 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE
248 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE
249 AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE
250 AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE
251 AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
254 pinctrl_ebi_addr_nand: ebi-addr-0 {
256 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE
257 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
262 pinctrl_usart0: usart0-0 {
264 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
265 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
268 pinctrl_usart0_rts: usart0_rts-0 {
270 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
273 pinctrl_usart0_cts: usart0_cts-0 {
275 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
278 pinctrl_usart0_sck: usart0_sck-0 {
280 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
285 pinctrl_usart1: usart1-0 {
287 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE
288 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
291 pinctrl_usart1_rts: usart1_rts-0 {
293 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
296 pinctrl_usart1_cts: usart1_cts-0 {
298 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
301 pinctrl_usart1_sck: usart1_sck-0 {
303 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
308 pinctrl_usart2: usart2-0 {
310 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE
311 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
314 pinctrl_usart2_rts: usart2_rts-0 {
316 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
319 pinctrl_usart2_cts: usart2_cts-0 {
321 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
324 pinctrl_usart2_sck: usart2_sck-0 {
326 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
331 pinctrl_uart0: uart0-0 {
333 <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */
334 AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */
339 pinctrl_uart1: uart1-0 {
341 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */
342 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */
347 pinctrl_nand_oe_we: nand-oe-we-0 {
349 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE
350 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
353 pinctrl_nand_rb: nand-rb-0 {
355 <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
358 pinctrl_nand_cs: nand-cs-0 {
360 <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
365 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
367 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
368 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
369 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
372 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
374 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
375 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
376 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
381 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
383 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */
384 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
385 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */
388 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
390 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
391 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
392 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */
397 pinctrl_ssc0_tx: ssc0_tx-0 {
399 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
400 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
401 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
404 pinctrl_ssc0_rx: ssc0_rx-0 {
406 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
407 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
408 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
413 pinctrl_spi0: spi0-0 {
415 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
416 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
417 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
422 pinctrl_spi1: spi1-0 {
424 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
425 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
426 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
431 pinctrl_i2c0: i2c0-0 {
433 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */
434 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
439 pinctrl_i2c1: i2c1-0 {
441 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */
442 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */
447 pinctrl_i2c2: i2c2-0 {
449 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */
450 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */
455 pinctrl_i2c_gpio0: i2c_gpio0-0 {
457 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
458 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */
463 pinctrl_i2c_gpio1: i2c_gpio1-0 {
465 <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */
466 AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */
471 pinctrl_i2c_gpio2: i2c_gpio2-0 {
473 <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */
474 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
479 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
481 <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
483 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
485 <AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE>;
487 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
489 <AT91_PIOC 18 AT91_PERIPH_C AT91_PINCTRL_NONE>;
492 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
494 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
496 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
498 <AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE>;
500 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
502 <AT91_PIOC 19 AT91_PERIPH_C AT91_PINCTRL_NONE>;
505 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
507 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
509 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
511 <AT91_PIOC 20 AT91_PERIPH_C AT91_PINCTRL_NONE>;
514 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
516 <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
518 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
520 <AT91_PIOC 21 AT91_PERIPH_C AT91_PINCTRL_NONE>;
525 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
526 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
529 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
530 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
533 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
534 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
537 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
538 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
541 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
542 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
545 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
546 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
549 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
550 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
553 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
554 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
557 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
558 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
563 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
564 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
567 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
568 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
571 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
572 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
575 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
576 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
579 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
580 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
583 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
584 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
587 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
588 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
591 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
592 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
595 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
596 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
600 pioA: gpio@fffff400 {
601 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
602 reg = <0xfffff400 0x200>;
603 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
606 interrupt-controller;
607 #interrupt-cells = <2>;
608 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
611 pioB: gpio@fffff600 {
612 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
613 reg = <0xfffff600 0x200>;
614 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
618 interrupt-controller;
619 #interrupt-cells = <2>;
620 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
623 pioC: gpio@fffff800 {
624 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
625 reg = <0xfffff800 0x200>;
626 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
629 interrupt-controller;
630 #interrupt-cells = <2>;
631 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
634 pioD: gpio@fffffa00 {
635 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
636 reg = <0xfffffa00 0x200>;
637 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
641 interrupt-controller;
642 #interrupt-cells = <2>;
643 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
648 compatible = "atmel,at91sam9g45-ssc";
649 reg = <0xf0010000 0x4000>;
650 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
651 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
652 <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
653 dma-names = "tx", "rx";
654 pinctrl-names = "default";
655 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
656 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
657 clock-names = "pclk";
662 compatible = "atmel,hsmci";
663 reg = <0xf0008000 0x600>;
664 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
665 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
667 pinctrl-names = "default";
668 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
669 clock-names = "mci_clk";
670 #address-cells = <1>;
676 compatible = "atmel,hsmci";
677 reg = <0xf000c000 0x600>;
678 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
679 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
681 pinctrl-names = "default";
682 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
683 clock-names = "mci_clk";
684 #address-cells = <1>;
689 dbgu: serial@fffff200 {
690 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
691 reg = <0xfffff200 0x200>;
692 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
693 pinctrl-names = "default";
694 pinctrl-0 = <&pinctrl_dbgu>;
695 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>,
696 <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
697 dma-names = "tx", "rx";
698 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
699 clock-names = "usart";
703 usart0: serial@f801c000 {
704 compatible = "atmel,at91sam9260-usart";
705 reg = <0xf801c000 0x200>;
706 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
707 pinctrl-names = "default";
708 pinctrl-0 = <&pinctrl_usart0>;
709 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>,
710 <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
711 dma-names = "tx", "rx";
712 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
713 clock-names = "usart";
717 usart1: serial@f8020000 {
718 compatible = "atmel,at91sam9260-usart";
719 reg = <0xf8020000 0x200>;
720 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
721 pinctrl-names = "default";
722 pinctrl-0 = <&pinctrl_usart1>;
723 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>,
724 <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
725 dma-names = "tx", "rx";
726 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
727 clock-names = "usart";
731 usart2: serial@f8024000 {
732 compatible = "atmel,at91sam9260-usart";
733 reg = <0xf8024000 0x200>;
734 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
735 pinctrl-names = "default";
736 pinctrl-0 = <&pinctrl_usart2>;
737 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>,
738 <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
739 dma-names = "tx", "rx";
740 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
741 clock-names = "usart";
746 compatible = "atmel,at91sam9x5-i2c";
747 reg = <0xf8010000 0x100>;
748 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
749 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
750 <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
751 dma-names = "tx", "rx";
752 #address-cells = <1>;
754 pinctrl-names = "default";
755 pinctrl-0 = <&pinctrl_i2c0>;
756 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
761 compatible = "atmel,at91sam9x5-i2c";
762 reg = <0xf8014000 0x100>;
763 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
764 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
765 <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
766 dma-names = "tx", "rx";
767 #address-cells = <1>;
769 pinctrl-names = "default";
770 pinctrl-0 = <&pinctrl_i2c1>;
771 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
776 compatible = "atmel,at91sam9x5-i2c";
777 reg = <0xf8018000 0x100>;
778 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
779 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
780 <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
781 dma-names = "tx", "rx";
782 #address-cells = <1>;
784 pinctrl-names = "default";
785 pinctrl-0 = <&pinctrl_i2c2>;
786 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
790 uart0: serial@f8040000 {
791 compatible = "atmel,at91sam9260-usart";
792 reg = <0xf8040000 0x200>;
793 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
794 pinctrl-names = "default";
795 pinctrl-0 = <&pinctrl_uart0>;
796 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
797 clock-names = "usart";
801 uart1: serial@f8044000 {
802 compatible = "atmel,at91sam9260-usart";
803 reg = <0xf8044000 0x200>;
804 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
805 pinctrl-names = "default";
806 pinctrl-0 = <&pinctrl_uart1>;
807 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
808 clock-names = "usart";
813 #address-cells = <1>;
815 compatible = "atmel,at91sam9x5-adc";
816 reg = <0xf804c000 0x100>;
817 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
818 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>,
820 clock-names = "adc_clk", "adc_op_clk";
821 atmel,adc-use-external-triggers;
822 atmel,adc-channels-used = <0xffff>;
823 atmel,adc-vref = <3300>;
824 atmel,adc-startup-time = <40>;
825 atmel,adc-sample-hold-time = <11>;
826 atmel,adc-res = <8 10>;
827 atmel,adc-res-names = "lowres", "highres";
828 atmel,adc-use-res = "highres";
831 trigger-name = "external-rising";
832 trigger-value = <0x1>;
837 trigger-name = "external-falling";
838 trigger-value = <0x2>;
843 trigger-name = "external-any";
844 trigger-value = <0x3>;
849 trigger-name = "continuous";
850 trigger-value = <0x6>;
855 #address-cells = <1>;
857 compatible = "atmel,at91rm9200-spi";
858 reg = <0xf0000000 0x100>;
859 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
860 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
861 <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
862 dma-names = "tx", "rx";
863 pinctrl-names = "default";
864 pinctrl-0 = <&pinctrl_spi0>;
865 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
866 clock-names = "spi_clk";
871 #address-cells = <1>;
873 compatible = "atmel,at91rm9200-spi";
874 reg = <0xf0004000 0x100>;
875 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
876 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
877 <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
878 dma-names = "tx", "rx";
879 pinctrl-names = "default";
880 pinctrl-0 = <&pinctrl_spi1>;
881 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
882 clock-names = "spi_clk";
886 usb2: gadget@f803c000 {
887 #address-cells = <1>;
889 compatible = "atmel,at91sam9g45-udc";
890 reg = <0x00500000 0x80000
892 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
893 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 23>;
894 clock-names = "hclk", "pclk";
899 atmel,fifo-size = <64>;
900 atmel,nb-banks = <1>;
905 atmel,fifo-size = <1024>;
906 atmel,nb-banks = <2>;
913 atmel,fifo-size = <1024>;
914 atmel,nb-banks = <2>;
921 atmel,fifo-size = <1024>;
922 atmel,nb-banks = <3>;
928 atmel,fifo-size = <1024>;
929 atmel,nb-banks = <3>;
935 atmel,fifo-size = <1024>;
936 atmel,nb-banks = <3>;
943 atmel,fifo-size = <1024>;
944 atmel,nb-banks = <3>;
950 watchdog: watchdog@fffffe40 {
951 compatible = "atmel,at91sam9260-wdt";
952 reg = <0xfffffe40 0x10>;
953 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
955 atmel,watchdog-type = "hardware";
956 atmel,reset-type = "all";
962 compatible = "atmel,at91sam9x5-rtc";
963 reg = <0xfffffeb0 0x40>;
964 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
970 compatible = "atmel,at91sam9rl-pwm";
971 reg = <0xf8034000 0x300>;
972 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
973 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
980 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
981 reg = <0x00600000 0x100000>;
982 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
983 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
984 clock-names = "ohci_clk", "hclk", "uhpck";
989 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
990 reg = <0x00700000 0x100000>;
991 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
992 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
993 clock-names = "usb_clk", "ehci_clk";
998 compatible = "atmel,at91sam9x5-ebi";
999 #address-cells = <2>;
1002 atmel,matrix = <&matrix>;
1003 reg = <0x10000000 0x60000000>;
1004 ranges = <0x0 0x0 0x10000000 0x10000000
1005 0x1 0x0 0x20000000 0x10000000
1006 0x2 0x0 0x30000000 0x10000000
1007 0x3 0x0 0x40000000 0x10000000
1008 0x4 0x0 0x50000000 0x10000000
1009 0x5 0x0 0x60000000 0x10000000>;
1010 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
1011 status = "disabled";
1013 nand_controller: nand-controller {
1014 compatible = "atmel,at91sam9g45-nand-controller";
1015 ecc-engine = <&pmecc>;
1016 #address-cells = <2>;
1019 status = "disabled";
1025 compatible = "i2c-gpio";
1026 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
1027 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
1029 i2c-gpio,sda-open-drain;
1030 i2c-gpio,scl-open-drain;
1031 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1032 #address-cells = <1>;
1034 pinctrl-names = "default";
1035 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1036 status = "disabled";
1040 compatible = "i2c-gpio";
1041 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
1042 &pioC 1 GPIO_ACTIVE_HIGH /* scl */
1044 i2c-gpio,sda-open-drain;
1045 i2c-gpio,scl-open-drain;
1046 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1047 #address-cells = <1>;
1049 pinctrl-names = "default";
1050 pinctrl-0 = <&pinctrl_i2c_gpio1>;
1051 status = "disabled";
1055 compatible = "i2c-gpio";
1056 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
1057 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
1059 i2c-gpio,sda-open-drain;
1060 i2c-gpio,scl-open-drain;
1061 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1062 #address-cells = <1>;
1064 pinctrl-names = "default";
1065 pinctrl-0 = <&pinctrl_i2c_gpio2>;
1066 status = "disabled";