arch/arm/boot/dts/at91sam9g45.dtsi

   1 /*
   2  * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
   3  *                    applies to AT91SAM9G45, AT91SAM9M10,
   4  *                    AT91SAM9G46, AT91SAM9M11 SoC
   5  *
   6  *  Copyright (C) 2011 Atmel,
   7  *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
   8  *
   9  * Licensed under GPLv2 or later.
  10  */
  11
  12 /include/ "skeleton.dtsi"
  13
  14 / {
  15         model = "Atmel AT91SAM9G45 family SoC";
  16         compatible = "atmel,at91sam9g45";
  17         interrupt-parent = <&aic>;
  18
  19         aliases {
  20                 serial0 = &dbgu;
  21                 serial1 = &usart0;
  22                 serial2 = &usart1;
  23                 serial3 = &usart2;
  24                 serial4 = &usart3;
  25                 gpio0 = &pioA;
  26                 gpio1 = &pioB;
  27                 gpio2 = &pioC;
  28                 gpio3 = &pioD;
  29                 gpio4 = &pioE;
  30                 tcb0 = &tcb0;
  31                 tcb1 = &tcb1;
  32                 i2c0 = &i2c0;
  33                 i2c1 = &i2c1;
  34                 ssc0 = &ssc0;
  35                 ssc1 = &ssc1;
  36         };
  37         cpus {
  38                 cpu@0 {
  39                         compatible = "arm,arm926ejs";
  40                 };
  41         };
  42
  43         memory {
  44                 reg = <0x70000000 0x10000000>;
  45         };
  46
  47         ahb {
  48                 compatible = "simple-bus";
  49                 #address-cells = <1>;
  50                 #size-cells = <1>;
  51                 ranges;
  52
  53                 apb {
  54                         compatible = "simple-bus";
  55                         #address-cells = <1>;
  56                         #size-cells = <1>;
  57                         ranges;
  58
  59                         aic: interrupt-controller@fffff000 {
  60                                 #interrupt-cells = <3>;
  61                                 compatible = "atmel,at91rm9200-aic";
  62                                 interrupt-controller;
  63                                 reg = <0xfffff000 0x200>;
  64                                 atmel,external-irqs = <31>;
  65                         };
  66
  67                         ramc0: ramc@ffffe400 {
  68                                 compatible = "atmel,at91sam9g45-ddramc";
  69                                 reg = <0xffffe400 0x200
  70                                        0xffffe600 0x200>;
  71                         };
  72
  73                         pmc: pmc@fffffc00 {
  74                                 compatible = "atmel,at91rm9200-pmc";
  75                                 reg = <0xfffffc00 0x100>;
  76                         };
  77
  78                         rstc@fffffd00 {
  79                                 compatible = "atmel,at91sam9g45-rstc";
  80                                 reg = <0xfffffd00 0x10>;
  81                         };
  82
  83                         pit: timer@fffffd30 {
  84                                 compatible = "atmel,at91sam9260-pit";
  85                                 reg = <0xfffffd30 0xf>;
  86                                 interrupts = <1 4 7>;
  87                         };
  88
  89
  90                         shdwc@fffffd10 {
  91                                 compatible = "atmel,at91sam9rl-shdwc";
  92                                 reg = <0xfffffd10 0x10>;
  93                         };
  94
  95                         tcb0: timer@fff7c000 {
  96                                 compatible = "atmel,at91rm9200-tcb";
  97                                 reg = <0xfff7c000 0x100>;
  98                                 interrupts = <18 4 0>;
  99                         };
 100
 101                         tcb1: timer@fffd4000 {
 102                                 compatible = "atmel,at91rm9200-tcb";
 103                                 reg = <0xfffd4000 0x100>;
 104                                 interrupts = <18 4 0>;
 105                         };
 106
 107                         dma: dma-controller@ffffec00 {
 108                                 compatible = "atmel,at91sam9g45-dma";
 109                                 reg = <0xffffec00 0x200>;
 110                                 interrupts = <21 4 0>;
 111                                 #dma-cells = <2>;
 112                         };
 113
 114                         pinctrl@fffff200 {
 115                                 #address-cells = <1>;
 116                                 #size-cells = <1>;
 117                                 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
 118                                 ranges = <0xfffff200 0xfffff200 0xa00>;
 119
 120                                 atmel,mux-mask = <
 121                                       /*    A         B     */
 122                                        0xffffffff 0xffc003ff  /* pioA */
 123                                        0xffffffff 0x800f8f00  /* pioB */
 124                                        0xffffffff 0x00000e00  /* pioC */
 125                                        0xffffffff 0xff0c1381  /* pioD */
 126                                        0xffffffff 0x81ffff81  /* pioE */
 127                                       >;
 128
 129                                 /* shared pinctrl settings */
 130                                 dbgu {
 131                                         pinctrl_dbgu: dbgu-0 {
 132                                                 atmel,pins =
 133                                                         <1 12 0x1 0x0   /* PB12 periph A */
 134                                                          1 13 0x1 0x0>; /* PB13 periph A */
 135                                         };
 136                                 };
 137
 138                                 usart0 {
 139                                         pinctrl_usart0: usart0-0 {
 140                                                 atmel,pins =
 141                                                         <1 19 0x1 0x1   /* PB19 periph A with pullup */
 142                                                          1 18 0x1 0x0>; /* PB18 periph A */
 143                                         };
 144
 145                                         pinctrl_usart0_rts: usart0_rts-0 {
 146                                                 atmel,pins =
 147                                                         <1 17 0x2 0x0>; /* PB17 periph B */
 148                                         };
 149
 150                                         pinctrl_usart0_cts: usart0_cts-0 {
 151                                                 atmel,pins =
 152                                                         <1 15 0x2 0x0>; /* PB15 periph B */
 153                                         };
 154                                 };
 155
 156                                 uart1 {
 157                                         pinctrl_usart1: usart1-0 {
 158                                                 atmel,pins =
 159                                                         <1 4 0x1 0x1    /* PB4 periph A with pullup */
 160                                                          1 5 0x1 0x0>;  /* PB5 periph A */
 161                                         };
 162
 163                                         pinctrl_usart1_rts: usart1_rts-0 {
 164                                                 atmel,pins =
 165                                                         <3 16 0x1 0x0>; /* PD16 periph A */
 166                                         };
 167
 168                                         pinctrl_usart1_cts: usart1_cts-0 {
 169                                                 atmel,pins =
 170                                                         <3 17 0x1 0x0>; /* PD17 periph A */
 171                                         };
 172                                 };
 173
 174                                 usart2 {
 175                                         pinctrl_usart2: usart2-0 {
 176                                                 atmel,pins =
 177                                                         <1 6 0x1 0x1    /* PB6 periph A with pullup */
 178                                                          1 7 0x1 0x0>;  /* PB7 periph A */
 179                                         };
 180
 181                                         pinctrl_usart2_rts: usart2_rts-0 {
 182                                                 atmel,pins =
 183                                                         <2 9 0x2 0x0>;  /* PC9 periph B */
 184                                         };
 185
 186                                         pinctrl_usart2_cts: usart2_cts-0 {
 187                                                 atmel,pins =
 188                                                         <2 11 0x2 0x0>; /* PC11 periph B */
 189                                         };
 190                                 };
 191
 192                                 usart3 {
 193                                         pinctrl_usart3: usart3-0 {
 194                                                 atmel,pins =
 195                                                         <1 8 0x1 0x1    /* PB9 periph A with pullup */
 196                                                          1 9 0x1 0x0>;  /* PB8 periph A */
 197                                         };
 198
 199                                         pinctrl_usart3_rts: usart3_rts-0 {
 200                                                 atmel,pins =
 201                                                         <0 23 0x2 0x0>; /* PA23 periph B */
 202                                         };
 203
 204                                         pinctrl_usart3_cts: usart3_cts-0 {
 205                                                 atmel,pins =
 206                                                         <0 24 0x2 0x0>; /* PA24 periph B */
 207                                         };
 208                                 };
 209
 210                                 nand {
 211                                         pinctrl_nand: nand-0 {
 212                                                 atmel,pins =
 213                                                         <2 8 0x0 0x1    /* PC8 gpio RDY pin pull_up*/
 214                                                          2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
 215                                         };
 216                                 };
 217
 218                                 macb {
 219                                         pinctrl_macb_rmii: macb_rmii-0 {
 220                                                 atmel,pins =
 221                                                         <0 10 0x1 0x0   /* PA10 periph A */
 222                                                          0 11 0x1 0x0   /* PA11 periph A */
 223                                                          0 12 0x1 0x0   /* PA12 periph A */
 224                                                          0 13 0x1 0x0   /* PA13 periph A */
 225                                                          0 14 0x1 0x0   /* PA14 periph A */
 226                                                          0 15 0x1 0x0   /* PA15 periph A */
 227                                                          0 16 0x1 0x0   /* PA16 periph A */
 228                                                          0 17 0x1 0x0   /* PA17 periph A */
 229                                                          0 18 0x1 0x0   /* PA18 periph A */
 230                                                          0 19 0x1 0x0>; /* PA19 periph A */
 231                                         };
 232
 233                                         pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
 234                                                 atmel,pins =
 235                                                         <0 6 0x2 0x0    /* PA6 periph B */
 236                                                          0 7 0x2 0x0    /* PA7 periph B */
 237                                                          0 8 0x2 0x0    /* PA8 periph B */
 238                                                          0 9 0x2 0x0    /* PA9 periph B */
 239                                                          0 27 0x2 0x0   /* PA27 periph B */
 240                                                          0 28 0x2 0x0   /* PA28 periph B */
 241                                                          0 29 0x2 0x0   /* PA29 periph B */
 242                                                          0 30 0x2 0x0>; /* PA30 periph B */
 243                                         };
 244                                 };
 245
 246                                 mmc0 {
 247                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
 248                                                 atmel,pins =
 249                                                         <0 0 0x1 0x0    /* PA0 periph A */
 250                                                          0 1 0x1 0x1    /* PA1 periph A with pullup */
 251                                                          0 2 0x1 0x1>;  /* PA2 periph A with pullup */
 252                                         };
 253
 254                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 255                                                 atmel,pins =
 256                                                         <0 3 0x1 0x1    /* PA3 periph A with pullup */
 257                                                          0 4 0x1 0x1    /* PA4 periph A with pullup */
 258                                                          0 5 0x1 0x1>;  /* PA5 periph A with pullup */
 259                                         };
 260
 261                                         pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
 262                                                 atmel,pins =
 263                                                         <0 6 0x1 0x1    /* PA6 periph A with pullup */
 264                                                          0 7 0x1 0x1    /* PA7 periph A with pullup */
 265                                                          0 8 0x1 0x1    /* PA8 periph A with pullup */
 266                                                          0 9 0x1 0x1>;  /* PA9 periph A with pullup */
 267                                         };
 268                                 };
 269
 270                                 mmc1 {
 271                                         pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
 272                                                 atmel,pins =
 273                                                         <0 31 0x1 0x0   /* PA31 periph A */
 274                                                          0 22 0x1 0x1   /* PA22 periph A with pullup */
 275                                                          0 23 0x1 0x1>; /* PA23 periph A with pullup */
 276                                         };
 277
 278                                         pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
 279                                                 atmel,pins =
 280                                                         <0 24 0x1 0x1   /* PA24 periph A with pullup */
 281                                                          0 25 0x1 0x1   /* PA25 periph A with pullup */
 282                                                          0 26 0x1 0x1>; /* PA26 periph A with pullup */
 283                                         };
 284
 285                                         pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
 286                                                 atmel,pins =
 287                                                         <0 27 0x1 0x1   /* PA27 periph A with pullup */
 288                                                          0 28 0x1 0x1   /* PA28 periph A with pullup */
 289                                                          0 29 0x1 0x1   /* PA29 periph A with pullup */
 290                                                          0 20 0x1 0x1>; /* PA30 periph A with pullup */
 291                                         };
 292                                 };
 293
 294                                 ssc0 {
 295                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 296                                                 atmel,pins =
 297                                                         <3 0 0x1 0x0    /* PD0 periph A */
 298                                                          3 1 0x1 0x0    /* PD1 periph A */
 299                                                          3 2 0x1 0x0>;  /* PD2 periph A */
 300                                         };
 301
 302                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 303                                                 atmel,pins =
 304                                                         <3 3 0x1 0x0    /* PD3 periph A */
 305                                                          3 4 0x1 0x0    /* PD4 periph A */
 306                                                          3 5 0x1 0x0>;  /* PD5 periph A */
 307                                         };
 308                                 };
 309
 310                                 ssc1 {
 311                                         pinctrl_ssc1_tx: ssc1_tx-0 {
 312                                                 atmel,pins =
 313                                                         <3 10 0x1 0x0   /* PD10 periph A */
 314                                                          3 11 0x1 0x0   /* PD11 periph A */
 315                                                          3 12 0x1 0x0>; /* PD12 periph A */
 316                                         };
 317
 318                                         pinctrl_ssc1_rx: ssc1_rx-0 {
 319                                                 atmel,pins =
 320                                                         <3 13 0x1 0x0   /* PD13 periph A */
 321                                                          3 14 0x1 0x0   /* PD14 periph A */
 322                                                          3 15 0x1 0x0>; /* PD15 periph A */
 323                                         };
 324                                 };
 325
 326                                 spi0 {
 327                                         pinctrl_spi0: spi0-0 {
 328                                                 atmel,pins =
 329                                                         <1 0 0x1 0x0    /* PB0 periph A SPI0_MISO pin */
 330                                                          1 1 0x1 0x0    /* PB1 periph A SPI0_MOSI pin */
 331                                                          1 2 0x1 0x0>;  /* PB2 periph A SPI0_SPCK pin */
 332                                         };
 333                                 };
 334
 335                                 spi1 {
 336                                         pinctrl_spi1: spi1-0 {
 337                                                 atmel,pins =
 338                                                         <1 14 0x1 0x0   /* PB14 periph A SPI1_MISO pin */
 339                                                          1 15 0x1 0x0   /* PB15 periph A SPI1_MOSI pin */
 340                                                          1 16 0x1 0x0>; /* PB16 periph A SPI1_SPCK pin */
 341                                         };
 342                                 };
 343
 344                                 pioA: gpio@fffff200 {
 345                                         compatible = "atmel,at91rm9200-gpio";
 346                                         reg = <0xfffff200 0x200>;
 347                                         interrupts = <2 4 1>;
 348                                         #gpio-cells = <2>;
 349                                         gpio-controller;
 350                                         interrupt-controller;
 351                                         #interrupt-cells = <2>;
 352                                 };
 353
 354                                 pioB: gpio@fffff400 {
 355                                         compatible = "atmel,at91rm9200-gpio";
 356                                         reg = <0xfffff400 0x200>;
 357                                         interrupts = <3 4 1>;
 358                                         #gpio-cells = <2>;
 359                                         gpio-controller;
 360                                         interrupt-controller;
 361                                         #interrupt-cells = <2>;
 362                                 };
 363
 364                                 pioC: gpio@fffff600 {
 365                                         compatible = "atmel,at91rm9200-gpio";
 366                                         reg = <0xfffff600 0x200>;
 367                                         interrupts = <4 4 1>;
 368                                         #gpio-cells = <2>;
 369                                         gpio-controller;
 370                                         interrupt-controller;
 371                                         #interrupt-cells = <2>;
 372                                 };
 373
 374                                 pioD: gpio@fffff800 {
 375                                         compatible = "atmel,at91rm9200-gpio";
 376                                         reg = <0xfffff800 0x200>;
 377                                         interrupts = <5 4 1>;
 378                                         #gpio-cells = <2>;
 379                                         gpio-controller;
 380                                         interrupt-controller;
 381                                         #interrupt-cells = <2>;
 382                                 };
 383
 384                                 pioE: gpio@fffffa00 {
 385                                         compatible = "atmel,at91rm9200-gpio";
 386                                         reg = <0xfffffa00 0x200>;
 387                                         interrupts = <5 4 1>;
 388                                         #gpio-cells = <2>;
 389                                         gpio-controller;
 390                                         interrupt-controller;
 391                                         #interrupt-cells = <2>;
 392                                 };
 393                         };
 394
 395                         dbgu: serial@ffffee00 {
 396                                 compatible = "atmel,at91sam9260-usart";
 397                                 reg = <0xffffee00 0x200>;
 398                                 interrupts = <1 4 7>;
 399                                 pinctrl-names = "default";
 400                                 pinctrl-0 = <&pinctrl_dbgu>;
 401                                 status = "disabled";
 402                         };
 403
 404                         usart0: serial@fff8c000 {
 405                                 compatible = "atmel,at91sam9260-usart";
 406                                 reg = <0xfff8c000 0x200>;
 407                                 interrupts = <7 4 5>;
 408                                 atmel,use-dma-rx;
 409                                 atmel,use-dma-tx;
 410                                 pinctrl-names = "default";
 411                                 pinctrl-0 = <&pinctrl_usart0>;
 412                                 status = "disabled";
 413                         };
 414
 415                         usart1: serial@fff90000 {
 416                                 compatible = "atmel,at91sam9260-usart";
 417                                 reg = <0xfff90000 0x200>;
 418                                 interrupts = <8 4 5>;
 419                                 atmel,use-dma-rx;
 420                                 atmel,use-dma-tx;
 421                                 pinctrl-names = "default";
 422                                 pinctrl-0 = <&pinctrl_usart1>;
 423                                 status = "disabled";
 424                         };
 425
 426                         usart2: serial@fff94000 {
 427                                 compatible = "atmel,at91sam9260-usart";
 428                                 reg = <0xfff94000 0x200>;
 429                                 interrupts = <9 4 5>;
 430                                 atmel,use-dma-rx;
 431                                 atmel,use-dma-tx;
 432                                 pinctrl-names = "default";
 433                                 pinctrl-0 = <&pinctrl_usart2>;
 434                                 status = "disabled";
 435                         };
 436
 437                         usart3: serial@fff98000 {
 438                                 compatible = "atmel,at91sam9260-usart";
 439                                 reg = <0xfff98000 0x200>;
 440                                 interrupts = <10 4 5>;
 441                                 atmel,use-dma-rx;
 442                                 atmel,use-dma-tx;
 443                                 pinctrl-names = "default";
 444                                 pinctrl-0 = <&pinctrl_usart3>;
 445                                 status = "disabled";
 446                         };
 447
 448                         macb0: ethernet@fffbc000 {
 449                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
 450                                 reg = <0xfffbc000 0x100>;
 451                                 interrupts = <25 4 3>;
 452                                 pinctrl-names = "default";
 453                                 pinctrl-0 = <&pinctrl_macb_rmii>;
 454                                 status = "disabled";
 455                         };
 456
 457                         i2c0: i2c@fff84000 {
 458                                 compatible = "atmel,at91sam9g10-i2c";
 459                                 reg = <0xfff84000 0x100>;
 460                                 interrupts = <12 4 6>;
 461                                 #address-cells = <1>;
 462                                 #size-cells = <0>;
 463                                 status = "disabled";
 464                         };
 465
 466                         i2c1: i2c@fff88000 {
 467                                 compatible = "atmel,at91sam9g10-i2c";
 468                                 reg = <0xfff88000 0x100>;
 469                                 interrupts = <13 4 6>;
 470                                 #address-cells = <1>;
 471                                 #size-cells = <0>;
 472                                 status = "disabled";
 473                         };
 474
 475                         ssc0: ssc@fff9c000 {
 476                                 compatible = "atmel,at91sam9g45-ssc";
 477                                 reg = <0xfff9c000 0x4000>;
 478                                 interrupts = <16 4 5>;
 479                                 pinctrl-names = "default";
 480                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 481                                 status = "disabled";
 482                         };
 483
 484                         ssc1: ssc@fffa0000 {
 485                                 compatible = "atmel,at91sam9g45-ssc";
 486                                 reg = <0xfffa0000 0x4000>;
 487                                 interrupts = <17 4 5>;
 488                                 pinctrl-names = "default";
 489                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
 490                                 status = "disabled";
 491                         };
 492
 493                         adc0: adc@fffb0000 {
 494                                 compatible = "atmel,at91sam9260-adc";
 495                                 reg = <0xfffb0000 0x100>;
 496                                 interrupts = <20 4 0>;
 497                                 atmel,adc-use-external-triggers;
 498                                 atmel,adc-channels-used = <0xff>;
 499                                 atmel,adc-vref = <3300>;
 500                                 atmel,adc-num-channels = <8>;
 501                                 atmel,adc-startup-time = <40>;
 502                                 atmel,adc-channel-base = <0x30>;
 503                                 atmel,adc-drdy-mask = <0x10000>;
 504                                 atmel,adc-status-register = <0x1c>;
 505                                 atmel,adc-trigger-register = <0x08>;
 506                                 atmel,adc-res = <8 10>;
 507                                 atmel,adc-res-names = "lowres", "highres";
 508                                 atmel,adc-use-res = "highres";
 509
 510                                 trigger@0 {
 511                                         trigger-name = "external-rising";
 512                                         trigger-value = <0x1>;
 513                                         trigger-external;
 514                                 };
 515                                 trigger@1 {
 516                                         trigger-name = "external-falling";
 517                                         trigger-value = <0x2>;
 518                                         trigger-external;
 519                                 };
 520
 521                                 trigger@2 {
 522                                         trigger-name = "external-any";
 523                                         trigger-value = <0x3>;
 524                                         trigger-external;
 525                                 };
 526
 527                                 trigger@3 {
 528                                         trigger-name = "continuous";
 529                                         trigger-value = <0x6>;
 530                                 };
 531                         };
 532
 533                         mmc0: mmc@fff80000 {
 534                                 compatible = "atmel,hsmci";
 535                                 reg = <0xfff80000 0x600>;
 536                                 interrupts = <11 4 0>;
 537                                 dmas = <&dma 1 0>;
 538                                 dma-names = "rxtx";
 539                                 #address-cells = <1>;
 540                                 #size-cells = <0>;
 541                                 status = "disabled";
 542                         };
 543
 544                         mmc1: mmc@fffd0000 {
 545                                 compatible = "atmel,hsmci";
 546                                 reg = <0xfffd0000 0x600>;
 547                                 interrupts = <29 4 0>;
 548                                 dmas = <&dma 1 13>;
 549                                 dma-names = "rxtx";
 550                                 #address-cells = <1>;
 551                                 #size-cells = <0>;
 552                                 status = "disabled";
 553                         };
 554
 555                         watchdog@fffffd40 {
 556                                 compatible = "atmel,at91sam9260-wdt";
 557                                 reg = <0xfffffd40 0x10>;
 558                                 status = "disabled";
 559                         };
 560
 561                         spi0: spi@fffa4000 {
 562                                 #address-cells = <1>;
 563                                 #size-cells = <0>;
 564                                 compatible = "atmel,at91rm9200-spi";
 565                                 reg = <0xfffa4000 0x200>;
 566                                 interrupts = <14 4 3>;
 567                                 pinctrl-names = "default";
 568                                 pinctrl-0 = <&pinctrl_spi0>;
 569                                 status = "disabled";
 570                         };
 571
 572                         spi1: spi@fffa8000 {
 573                                 #address-cells = <1>;
 574                                 #size-cells = <0>;
 575                                 compatible = "atmel,at91rm9200-spi";
 576                                 reg = <0xfffa8000 0x200>;
 577                                 interrupts = <15 4 3>;
 578                                 pinctrl-names = "default";
 579                                 pinctrl-0 = <&pinctrl_spi1>;
 580                                 status = "disabled";
 581                         };
 582                 };
 583
 584                 nand0: nand@40000000 {
 585                         compatible = "atmel,at91rm9200-nand";
 586                         #address-cells = <1>;
 587                         #size-cells = <1>;
 588                         reg = <0x40000000 0x10000000
 589                                0xffffe200 0x200
 590                               >;
 591                         atmel,nand-addr-offset = <21>;
 592                         atmel,nand-cmd-offset = <22>;
 593                         pinctrl-names = "default";
 594                         pinctrl-0 = <&pinctrl_nand>;
 595                         gpios = <&pioC 8 0
 596                                  &pioC 14 0
 597                                  0
 598                                 >;
 599                         status = "disabled";
 600                 };
 601
 602                 usb0: ohci@00700000 {
 603                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
 604                         reg = <0x00700000 0x100000>;
 605                         interrupts = <22 4 2>;
 606                         status = "disabled";
 607                 };
 608
 609                 usb1: ehci@00800000 {
 610                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
 611                         reg = <0x00800000 0x100000>;
 612                         interrupts = <22 4 2>;
 613                         status = "disabled";
 614                 };
 615         };
 616
 617         i2c@0 {
 618                 compatible = "i2c-gpio";
 619                 gpios = <&pioA 20 0 /* sda */
 620                          &pioA 21 0 /* scl */
 621                         >;
 622                 i2c-gpio,sda-open-drain;
 623                 i2c-gpio,scl-open-drain;
 624                 i2c-gpio,delay-us = <5>;        /* ~100 kHz */
 625                 #address-cells = <1>;
 626                 #size-cells = <0>;
 627                 status = "disabled";
 628         };
 629 };