1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828)
5 * Copyright (C) 2015 Russell King
7 * This board is in development; the contents of this file work with
8 * the A1 rev 2.0 of the board, which does not represent final
9 * production board. Things will change, don't expect this file to
10 * remain compatible info the future.
14 #include "armada-388-clearfog.dtsi"
17 model = "SolidRun Clearfog A1";
18 compatible = "solidrun,clearfog-a1", "marvell,armada388",
19 "marvell,armada385", "marvell,armada380";
24 /* CON2, nearest CPU, USB2 only. */
31 /* Port 2, Lane 0. CON2, nearest CPU. */
32 reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
41 compatible = "marvell,dsa";
42 dsa,ethernet = <ð1>;
43 dsa,mii-bus = <&mdio>;
44 pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
45 pinctrl-names = "default";
85 /* 88E1512 external phy */
97 compatible = "gpio-keys";
98 pinctrl-0 = <&rear_button_pins>;
99 pinctrl-names = "default";
102 /* The rear SW3 button */
103 label = "Rear Button";
104 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
106 linux,code = <BTN_0>;
121 * PCA9655 GPIO expander:
141 gpios = <4 GPIO_ACTIVE_LOW>;
143 line-name = "pcie2.0-clkreq";
147 gpios = <7 GPIO_ACTIVE_LOW>;
149 line-name = "pcie2.0-w-disable";
157 compatible = "marvell,mv88e6085";
158 #address-cells = <1>;
161 pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
162 pinctrl-names = "default";
165 #address-cells = <1>;
204 /* 88E1512 external phy */
217 clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
218 marvell,pins = "mpp46";
219 marvell,function = "ref";
221 clearfog_dsa0_pins: clearfog-dsa0-pins {
222 marvell,pins = "mpp23", "mpp41";
223 marvell,function = "gpio";
225 clearfog_spi1_cs_pins: spi1-cs-pins {
226 marvell,pins = "mpp55";
227 marvell,function = "spi1";
229 rear_button_pins: rear-button-pins {
230 marvell,pins = "mpp34";
231 marvell,function = "gpio";
237 * Add SPI CS pins for clearfog:
238 * CS0: W25Q32 (not populated on uSOM)
242 pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>;