arch/arm/boot/dts/am437x-idk-evm.dts

   1 /*
   2  * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 /dts-v1/;
  10
  11 #include "am4372.dtsi"
  12 #include <dt-bindings/pinctrl/am43xx.h>
  13 #include <dt-bindings/pwm/pwm.h>
  14 #include <dt-bindings/gpio/gpio.h>
  15 #include <dt-bindings/input/input.h>
  16
  17 / {
  18         model = "TI AM437x Industrial Development Kit";
  19         compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43";
  20
  21         v24_0d: fixed-regulator-v24_0d {
  22                 compatible = "regulator-fixed";
  23                 regulator-name = "V24_0D";
  24                 regulator-min-microvolt = <24000000>;
  25                 regulator-max-microvolt = <24000000>;
  26                 regulator-always-on;
  27                 regulator-boot-on;
  28         };
  29
  30         v3_3d: fixed-regulator-v3_3d {
  31                 compatible = "regulator-fixed";
  32                 regulator-name = "V3_3D";
  33                 regulator-min-microvolt = <3300000>;
  34                 regulator-max-microvolt = <3300000>;
  35                 regulator-always-on;
  36                 regulator-boot-on;
  37                 vin-supply = <&v24_0d>;
  38         };
  39
  40         vdd_corereg: fixed-regulator-vdd_corereg {
  41                 compatible = "regulator-fixed";
  42                 regulator-name = "VDD_COREREG";
  43                 regulator-min-microvolt = <1100000>;
  44                 regulator-max-microvolt = <1100000>;
  45                 regulator-always-on;
  46                 regulator-boot-on;
  47                 vin-supply = <&v24_0d>;
  48         };
  49
  50         vdd_core: fixed-regulator-vdd_core {
  51                 compatible = "regulator-fixed";
  52                 regulator-name = "VDD_CORE";
  53                 regulator-min-microvolt = <1100000>;
  54                 regulator-max-microvolt = <1100000>;
  55                 regulator-always-on;
  56                 regulator-boot-on;
  57                 vin-supply = <&vdd_corereg>;
  58         };
  59
  60         v1_8dreg: fixed-regulator-v1_8dreg{
  61                 compatible = "regulator-fixed";
  62                 regulator-name = "V1_8DREG";
  63                 regulator-min-microvolt = <1800000>;
  64                 regulator-max-microvolt = <1800000>;
  65                 regulator-always-on;
  66                 regulator-boot-on;
  67                 vin-supply = <&v24_0d>;
  68         };
  69
  70         v1_8d: fixed-regulator-v1_8d{
  71                 compatible = "regulator-fixed";
  72                 regulator-name = "V1_8D";
  73                 regulator-min-microvolt = <1800000>;
  74                 regulator-max-microvolt = <1800000>;
  75                 regulator-always-on;
  76                 regulator-boot-on;
  77                 vin-supply = <&v1_8dreg>;
  78         };
  79
  80         v1_5dreg: fixed-regulator-v1_5dreg{
  81                 compatible = "regulator-fixed";
  82                 regulator-name = "V1_5DREG";
  83                 regulator-min-microvolt = <1500000>;
  84                 regulator-max-microvolt = <1500000>;
  85                 regulator-always-on;
  86                 regulator-boot-on;
  87                 vin-supply = <&v24_0d>;
  88         };
  89
  90         v1_5d: fixed-regulator-v1_5d{
  91                 compatible = "regulator-fixed";
  92                 regulator-name = "V1_5D";
  93                 regulator-min-microvolt = <1500000>;
  94                 regulator-max-microvolt = <1500000>;
  95                 regulator-always-on;
  96                 regulator-boot-on;
  97                 vin-supply = <&v1_5dreg>;
  98         };
  99
 100         gpio_keys: gpio_keys {
 101                 compatible = "gpio-keys";
 102                 pinctrl-names = "default";
 103                 pinctrl-0 = <&gpio_keys_pins_default>;
 104                 #address-cells = <1>;
 105                 #size-cells = <0>;
 106
 107                 switch0 {
 108                         label = "power-button";
 109                         linux,code = <KEY_POWER>;
 110                         gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
 111                 };
 112         };
 113
 114         /* fixed 32k external oscillator clock */
 115         clk_32k_rtc: clk_32k_rtc {
 116                 #clock-cells = <0>;
 117                 compatible = "fixed-clock";
 118                 clock-frequency = <32768>;
 119         };
 120 };
 121
 122 &am43xx_pinmux {
 123         gpio_keys_pins_default: gpio_keys_pins_default {
 124                 pinctrl-single,pins = <
 125                         AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7)      /* cam0_field.gpio4_2 */
 126                 >;
 127         };
 128
 129         i2c0_pins_default: i2c0_pins_default {
 130                 pinctrl-single,pins = <
 131                         AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
 132                         AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
 133                 >;
 134         };
 135
 136         i2c0_pins_sleep: i2c0_pins_sleep {
 137                 pinctrl-single,pins = <
 138                         AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7)
 139                         AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 140                 >;
 141         };
 142
 143         i2c2_pins_default: i2c2_pins_default {
 144                 pinctrl-single,pins = <
 145                         AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */
 146                         AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */
 147                 >;
 148         };
 149
 150         i2c2_pins_sleep: i2c2_pins_sleep {
 151                 pinctrl-single,pins = <
 152                         AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7)
 153                         AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN | MUX_MODE7)
 154                 >;
 155         };
 156
 157         mmc1_pins_default: pinmux_mmc1_pins_default {
 158                 pinctrl-single,pins = <
 159                         AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
 160                         AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
 161                         AM4372_IOPAD(0x9f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
 162                         AM4372_IOPAD(0x9f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
 163                         AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
 164                         AM4372_IOPAD(0x9fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
 165                         AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
 166                 >;
 167         };
 168
 169         mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
 170                 pinctrl-single,pins = <
 171                         AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7)
 172                         AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7)
 173                         AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7)
 174                         AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7)
 175                         AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7)
 176                         AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7)
 177                         AM4372_IOPAD(0x960, PIN_INPUT_PULLDOWN | MUX_MODE7)
 178                 >;
 179         };
 180
 181         spi1_pins_default: spi1_pins_default {
 182                 pinctrl-single,pins = <
 183                         AM4372_IOPAD(0x908, PIN_INPUT | MUX_MODE2)      /* mii1_col.spi1_sclk */
 184                         AM4372_IOPAD(0x910, PIN_INPUT | MUX_MODE2)      /* mii1_rx_er.spi1_d1 */
 185                         AM4372_IOPAD(0x944, PIN_OUTPUT | MUX_MODE2)     /* rmii1_ref_clk.spi1_cs0 */
 186                         AM4372_IOPAD(0x90c, PIN_OUTPUT | MUX_MODE7)     /* mii1_crs.gpio3_1 */
 187                 >;
 188         };
 189
 190         spi1_pins_sleep: spi1_pins_sleep {
 191                 pinctrl-single,pins = <
 192                         AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
 193                         AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
 194                         AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
 195                         AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 196                 >;
 197         };
 198
 199         ecap0_pins_default: backlight_pins_default {
 200                 pinctrl-single,pins = <
 201                         AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
 202                 >;
 203         };
 204
 205         cpsw_default: cpsw_default {
 206                 pinctrl-single,pins = <
 207                         AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txclk.rgmii1_tclk */
 208                         AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txen.rgmii1_tctl */
 209                         AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_td0 */
 210                         AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_td1 */
 211                         AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_td2 */
 212                         AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_td3 */
 213                         AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxclk.rmii1_rclk */
 214                         AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxdv.rgmii1_rctl */
 215                         AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rd0 */
 216                         AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rd1 */
 217                         AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rd2 */
 218                         AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rd3 */
 219                 >;
 220         };
 221
 222         cpsw_sleep: cpsw_sleep {
 223                 pinctrl-single,pins = <
 224                         AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 225                         AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
 226                         AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
 227                         AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
 228                         AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
 229                         AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 230                         AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
 231                         AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
 232                         AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
 233                         AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 234                         AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
 235                         AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
 236                 >;
 237         };
 238
 239         davinci_mdio_default: davinci_mdio_default {
 240                 pinctrl-single,pins = <
 241                         /* MDIO */
 242                         AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
 243                         AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
 244                 >;
 245         };
 246
 247         davinci_mdio_sleep: davinci_mdio_sleep {
 248                 pinctrl-single,pins = <
 249                         /* MDIO reset value */
 250                         AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
 251                         AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 252                 >;
 253         };
 254
 255         qspi_pins_default: qspi_pins_default {
 256                 pinctrl-single,pins = <
 257                         AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3)      /* gpmc_csn0.qspi_csn */
 258                         AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2)             /* gpmc_csn3.qspi_clk */
 259                         AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_advn_ale.qspi_d0 */
 260                         AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_oen_ren.qspi_d1 */
 261                         AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_wen.qspi_d2 */
 262                         AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_be0n_cle.qspi_d3 */
 263                 >;
 264         };
 265
 266         qspi_pins_sleep: qspi_pins_sleep{
 267                 pinctrl-single,pins = <
 268                         AM4372_IOPAD(0x87c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 269                         AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)
 270                         AM4372_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7)
 271                         AM4372_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7)
 272                         AM4372_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7)
 273                         AM4372_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 274                 >;
 275         };
 276 };
 277
 278 &i2c0 {
 279         status = "okay";
 280         pinctrl-names = "default", "sleep";
 281         pinctrl-0 = <&i2c0_pins_default>;
 282         pinctrl-1 = <&i2c0_pins_sleep>;
 283         clock-frequency = <400000>;
 284
 285         at24@50 {
 286                 compatible = "at24,24c256";
 287                 pagesize = <64>;
 288                 reg = <0x50>;
 289         };
 290
 291         tps: tps62362@60 {
 292                 compatible = "ti,tps62362";
 293                 reg = <0x60>;
 294                 regulator-name = "VDD_MPU";
 295                 regulator-min-microvolt = <950000>;
 296                 regulator-max-microvolt = <1330000>;
 297                 regulator-boot-on;
 298                 regulator-always-on;
 299                 ti,vsel0-state-high;
 300                 ti,vsel1-state-high;
 301                 vin-supply = <&v3_3d>;
 302         };
 303 };
 304
 305 &i2c2 {
 306         status = "okay";
 307         pinctrl-names = "default", "sleep";
 308         pinctrl-0 = <&i2c2_pins_default>;
 309         pinctrl-1 = <&i2c2_pins_sleep>;
 310         clock-frequency = <100000>;
 311 };
 312
 313 &spi1 {
 314         status = "okay";
 315         pinctrl-names = "default", "sleep";
 316         pinctrl-0 = <&spi1_pins_default>;
 317         pinctrl-1 = <&spi1_pins_sleep>;
 318         ti,pindir-d0-out-d1-in;
 319
 320         sn65hvs882: sn65hvs882@0 {
 321                 compatible = "pisosr-gpio";
 322                 gpio-controller;
 323                 #gpio-cells = <2>;
 324
 325                 load-gpios = <&gpio3 1 GPIO_ACTIVE_LOW>;
 326
 327                 reg = <0>;
 328                 spi-max-frequency = <1000000>;
 329                 spi-cpol;
 330         };
 331 };
 332
 333 &epwmss0 {
 334         status = "okay";
 335 };
 336
 337 &ecap0 {
 338         status = "okay";
 339         pinctrl-names = "default";
 340         pinctrl-0 = <&ecap0_pins_default>;
 341 };
 342
 343 &gpio0 {
 344         status = "okay";
 345 };
 346
 347 &gpio1 {
 348         status = "okay";
 349 };
 350
 351 &gpio3 {
 352         status = "okay";
 353 };
 354
 355 &gpio4 {
 356         status = "okay";
 357 };
 358
 359 &gpio5 {
 360         status = "okay";
 361 };
 362
 363 &mmc1 {
 364         status = "okay";
 365         pinctrl-names = "default", "sleep";
 366         pinctrl-0 = <&mmc1_pins_default>;
 367         pinctrl-1 = <&mmc1_pins_sleep>;
 368         vmmc-supply = <&v3_3d>;
 369         bus-width = <4>;
 370         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 371 };
 372
 373 &qspi {
 374         status = "okay";
 375         pinctrl-names = "default", "sleep";
 376         pinctrl-0 = <&qspi_pins_default>;
 377         pinctrl-1 = <&qspi_pins_sleep>;
 378
 379         spi-max-frequency = <48000000>;
 380         m25p80@0 {
 381                 compatible = "mx66l51235l";
 382                 spi-max-frequency = <48000000>;
 383                 reg = <0>;
 384                 spi-cpol;
 385                 spi-cpha;
 386                 spi-tx-bus-width = <1>;
 387                 spi-rx-bus-width = <4>;
 388                 #address-cells = <1>;
 389                 #size-cells = <1>;
 390
 391                 /*
 392                  * MTD partition table.  The ROM checks the first 512KiB for a
 393                  * valid file to boot(XIP).
 394                  */
 395                 partition@0 {
 396                         label = "QSPI.U_BOOT";
 397                         reg = <0x00000000 0x000080000>;
 398                 };
 399                 partition@1 {
 400                         label = "QSPI.U_BOOT.backup";
 401                         reg = <0x00080000 0x00080000>;
 402                 };
 403                 partition@2 {
 404                         label = "QSPI.U-BOOT-SPL_OS";
 405                         reg = <0x00100000 0x00010000>;
 406                 };
 407                 partition@3 {
 408                         label = "QSPI.U_BOOT_ENV";
 409                         reg = <0x00110000 0x00010000>;
 410                 };
 411                 partition@4 {
 412                         label = "QSPI.U-BOOT-ENV.backup";
 413                         reg = <0x00120000 0x00010000>;
 414                 };
 415                 partition@5 {
 416                         label = "QSPI.KERNEL";
 417                         reg = <0x00130000 0x0800000>;
 418                 };
 419                 partition@6 {
 420                         label = "QSPI.FILESYSTEM";
 421                         reg = <0x00930000 0x36D0000>;
 422                 };
 423         };
 424 };
 425
 426 &mac {
 427         slaves = <1>;
 428         pinctrl-names = "default", "sleep";
 429         pinctrl-0 = <&cpsw_default>;
 430         pinctrl-1 = <&cpsw_sleep>;
 431         status = "okay";
 432 };
 433
 434 &davinci_mdio {
 435         pinctrl-names = "default", "sleep";
 436         pinctrl-0 = <&davinci_mdio_default>;
 437         pinctrl-1 = <&davinci_mdio_sleep>;
 438         status = "okay";
 439 };
 440
 441 &cpsw_emac0 {
 442         phy_id = <&davinci_mdio>, <0>;
 443         phy-mode = "rgmii";
 444 };
 445
 446 &rtc {
 447         clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
 448         clock-names = "ext-clk", "int-clk";
 449         status = "okay";
 450 };
 451
 452 &wdt {
 453         status = "okay";
 454 };
 455
 456 &cpu {
 457         cpu0-supply = <&tps>;
 458 };