arch/arc/kernel/setup.c

   1 /*
   2  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <linux/seq_file.h>
  10 #include <linux/fs.h>
  11 #include <linux/delay.h>
  12 #include <linux/root_dev.h>
  13 #include <linux/clk.h>
  14 #include <linux/clk-provider.h>
  15 #include <linux/clocksource.h>
  16 #include <linux/console.h>
  17 #include <linux/module.h>
  18 #include <linux/cpu.h>
  19 #include <linux/of_fdt.h>
  20 #include <linux/of.h>
  21 #include <linux/cache.h>
  22 #include <asm/sections.h>
  23 #include <asm/arcregs.h>
  24 #include <asm/tlb.h>
  25 #include <asm/setup.h>
  26 #include <asm/page.h>
  27 #include <asm/irq.h>
  28 #include <asm/unwind.h>
  29 #include <asm/mach_desc.h>
  30 #include <asm/smp.h>
  31
  32 #define FIX_PTR(x)  __asm__ __volatile__(";" : "+r"(x))
  33
  34 unsigned int intr_to_DE_cnt;
  35
  36 /* Part of U-boot ABI: see head.S */
  37 int __initdata uboot_tag;
  38 char __initdata *uboot_arg;
  39
  40 const struct machine_desc *machine_desc;
  41
  42 struct task_struct *_current_task[NR_CPUS];     /* For stack switching */
  43
  44 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
  45
  46 static const struct id_to_str arc_cpu_rel[] = {
  47 #ifdef CONFIG_ISA_ARCOMPACT
  48         { 0x34, "R4.10"},
  49         { 0x35, "R4.11"},
  50 #else
  51         { 0x51, "R2.0" },
  52         { 0x52, "R2.1" },
  53         { 0x53, "R3.0" },
  54 #endif
  55         { 0x00, NULL   }
  56 };
  57
  58 static const struct id_to_str arc_cpu_nm[] = {
  59 #ifdef CONFIG_ISA_ARCOMPACT
  60         { 0x20, "ARC 600"   },
  61         { 0x30, "ARC 770"   },  /* 750 identified seperately */
  62 #else
  63         { 0x40, "ARC EM"  },
  64         { 0x50, "ARC HS38"  },
  65 #endif
  66         { 0x00, "Unknown"   }
  67 };
  68
  69 static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
  70 {
  71         if (is_isa_arcompact()) {
  72                 struct bcr_iccm_arcompact iccm;
  73                 struct bcr_dccm_arcompact dccm;
  74
  75                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  76                 if (iccm.ver) {
  77                         cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */
  78                         cpu->iccm.base_addr = iccm.base << 16;
  79                 }
  80
  81                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
  82                 if (dccm.ver) {
  83                         unsigned long base;
  84                         cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */
  85
  86                         base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
  87                         cpu->dccm.base_addr = base & ~0xF;
  88                 }
  89         } else {
  90                 struct bcr_iccm_arcv2 iccm;
  91                 struct bcr_dccm_arcv2 dccm;
  92                 unsigned long region;
  93
  94                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  95                 if (iccm.ver) {
  96                         cpu->iccm.sz = 256 << iccm.sz00;        /* 512B to 16M */
  97                         if (iccm.sz00 == 0xF && iccm.sz01 > 0)
  98                                 cpu->iccm.sz <<= iccm.sz01;
  99
 100                         region = read_aux_reg(ARC_REG_AUX_ICCM);
 101                         cpu->iccm.base_addr = region & 0xF0000000;
 102                 }
 103
 104                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
 105                 if (dccm.ver) {
 106                         cpu->dccm.sz = 256 << dccm.sz0;
 107                         if (dccm.sz0 == 0xF && dccm.sz1 > 0)
 108                                 cpu->dccm.sz <<= dccm.sz1;
 109
 110                         region = read_aux_reg(ARC_REG_AUX_DCCM);
 111                         cpu->dccm.base_addr = region & 0xF0000000;
 112                 }
 113         }
 114 }
 115
 116 static void read_arc_build_cfg_regs(void)
 117 {
 118         struct bcr_timer timer;
 119         struct bcr_generic bcr;
 120         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 121         const struct id_to_str *tbl;
 122
 123         FIX_PTR(cpu);
 124
 125         READ_BCR(AUX_IDENTITY, cpu->core);
 126         READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
 127
 128         for (tbl = &arc_cpu_rel[0]; tbl->id != 0; tbl++) {
 129                 if (cpu->core.family == tbl->id) {
 130                         cpu->details = tbl->str;
 131                         break;
 132                 }
 133         }
 134
 135         for (tbl = &arc_cpu_nm[0]; tbl->id != 0; tbl++) {
 136                 if ((cpu->core.family & 0xF0) == tbl->id)
 137                         break;
 138         }
 139         cpu->name = tbl->str;
 140
 141         READ_BCR(ARC_REG_TIMERS_BCR, timer);
 142         cpu->extn.timer0 = timer.t0;
 143         cpu->extn.timer1 = timer.t1;
 144         cpu->extn.rtc = timer.rtc;
 145
 146         cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
 147
 148         READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
 149
 150         cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
 151         cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
 152         cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0;        /* 1,3 */
 153         cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
 154         cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
 155         cpu->extn.swape = (cpu->core.family >= 0x34) ? 1 :
 156                                 IS_ENABLED(CONFIG_ARC_HAS_SWAPE);
 157
 158         READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
 159
 160         /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
 161         read_decode_ccm_bcr(cpu);
 162
 163         read_decode_mmu_bcr();
 164         read_decode_cache_bcr();
 165
 166         if (is_isa_arcompact()) {
 167                 struct bcr_fp_arcompact sp, dp;
 168                 struct bcr_bpu_arcompact bpu;
 169
 170                 READ_BCR(ARC_REG_FP_BCR, sp);
 171                 READ_BCR(ARC_REG_DPFP_BCR, dp);
 172                 cpu->extn.fpu_sp = sp.ver ? 1 : 0;
 173                 cpu->extn.fpu_dp = dp.ver ? 1 : 0;
 174
 175                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 176                 cpu->bpu.ver = bpu.ver;
 177                 cpu->bpu.full = bpu.fam ? 1 : 0;
 178                 if (bpu.ent) {
 179                         cpu->bpu.num_cache = 256 << (bpu.ent - 1);
 180                         cpu->bpu.num_pred = 256 << (bpu.ent - 1);
 181                 }
 182         } else {
 183                 struct bcr_fp_arcv2 spdp;
 184                 struct bcr_bpu_arcv2 bpu;
 185
 186                 READ_BCR(ARC_REG_FP_V2_BCR, spdp);
 187                 cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
 188                 cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
 189
 190                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 191                 cpu->bpu.ver = bpu.ver;
 192                 cpu->bpu.full = bpu.ft;
 193                 cpu->bpu.num_cache = 256 << bpu.bce;
 194                 cpu->bpu.num_pred = 2048 << bpu.pte;
 195         }
 196
 197         READ_BCR(ARC_REG_AP_BCR, bcr);
 198         cpu->extn.ap = bcr.ver ? 1 : 0;
 199
 200         READ_BCR(ARC_REG_SMART_BCR, bcr);
 201         cpu->extn.smart = bcr.ver ? 1 : 0;
 202
 203         READ_BCR(ARC_REG_RTT_BCR, bcr);
 204         cpu->extn.rtt = bcr.ver ? 1 : 0;
 205
 206         cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
 207
 208         /* some hacks for lack of feature BCR info in old ARC700 cores */
 209         if (is_isa_arcompact()) {
 210                 if (!cpu->isa.ver)      /* ISA BCR absent, use Kconfig info */
 211                         cpu->isa.atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
 212                 else
 213                         cpu->isa.atomic = cpu->isa.atomic1;
 214
 215                 cpu->isa.be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
 216
 217                  /* there's no direct way to distinguish 750 vs. 770 */
 218                 if (unlikely(cpu->core.family < 0x34 || cpu->mmu.ver < 3))
 219                         cpu->name = "ARC750";
 220         }
 221 }
 222
 223 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
 224 {
 225         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 226         struct bcr_identity *core = &cpu->core;
 227         int i, n = 0;
 228
 229         FIX_PTR(cpu);
 230
 231         n += scnprintf(buf + n, len - n,
 232                        "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
 233                        core->family, core->cpu_id, core->chip_id);
 234
 235         n += scnprintf(buf + n, len - n, "processor [%d]\t: %s %s (%s ISA) %s\n",
 236                        cpu_id, cpu->name, cpu->details,
 237                        is_isa_arcompact() ? "ARCompact" : "ARCv2",
 238                        IS_AVAIL1(cpu->isa.be, "[Big-Endian]"));
 239
 240         n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s%s%s\nISA Extn\t: ",
 241                        IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
 242                        IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
 243                        IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_TIMERS_64BIT),
 244                        IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_TIMERS_64BIT));
 245
 246         n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
 247                            IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
 248                            IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
 249                            IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
 250
 251         if (i)
 252                 n += scnprintf(buf + n, len - n, "\n\t\t: ");
 253
 254         if (cpu->extn_mpy.ver) {
 255                 if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
 256                         n += scnprintf(buf + n, len - n, "mpy ");
 257                 } else {
 258                         int opt = 2;    /* stock MPY/MPYH */
 259
 260                         if (cpu->extn_mpy.dsp)  /* OPT 7-9 */
 261                                 opt = cpu->extn_mpy.dsp + 6;
 262
 263                         n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
 264                 }
 265         }
 266
 267         n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
 268                        IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
 269                        IS_AVAIL1(cpu->extn.norm, "norm "),
 270                        IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
 271                        IS_AVAIL1(cpu->extn.swap, "swap "),
 272                        IS_AVAIL1(cpu->extn.minmax, "minmax "),
 273                        IS_AVAIL1(cpu->extn.crc, "crc "),
 274                        IS_AVAIL2(cpu->extn.swape, "swape", CONFIG_ARC_HAS_SWAPE));
 275
 276         if (cpu->bpu.ver)
 277                 n += scnprintf(buf + n, len - n,
 278                               "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
 279                               IS_AVAIL1(cpu->bpu.full, "full"),
 280                               IS_AVAIL1(!cpu->bpu.full, "partial"),
 281                               cpu->bpu.num_cache, cpu->bpu.num_pred);
 282
 283         return buf;
 284 }
 285
 286 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
 287 {
 288         int n = 0;
 289         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 290
 291         FIX_PTR(cpu);
 292
 293         n += scnprintf(buf + n, len - n, "Vector Table\t: %#x\n", cpu->vec_base);
 294
 295         if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
 296                 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
 297                                IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
 298                                IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
 299
 300         if (cpu->extn.debug)
 301                 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
 302                                IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
 303                                IS_AVAIL1(cpu->extn.smart, "smaRT "),
 304                                IS_AVAIL1(cpu->extn.rtt, "RTT "));
 305
 306         if (cpu->dccm.sz || cpu->iccm.sz)
 307                 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
 308                                cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
 309                                cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
 310
 311         n += scnprintf(buf + n, len - n, "OS ABI [v%d]\t: %s\n",
 312                         EF_ARC_OSABI_CURRENT >> 8,
 313                         EF_ARC_OSABI_CURRENT == EF_ARC_OSABI_V3 ?
 314                         "no-legacy-syscalls" : "64-bit data any register aligned");
 315
 316         return buf;
 317 }
 318
 319 static void arc_chk_core_config(void)
 320 {
 321         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 322         int fpu_enabled;
 323
 324         if (!cpu->extn.timer0)
 325                 panic("Timer0 is not present!\n");
 326
 327         if (!cpu->extn.timer1)
 328                 panic("Timer1 is not present!\n");
 329
 330 #ifdef CONFIG_ARC_HAS_DCCM
 331         /*
 332          * DCCM can be arbit placed in hardware.
 333          * Make sure it's placement/sz matches what Linux is built with
 334          */
 335         if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
 336                 panic("Linux built with incorrect DCCM Base address\n");
 337
 338         if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
 339                 panic("Linux built with incorrect DCCM Size\n");
 340 #endif
 341
 342 #ifdef CONFIG_ARC_HAS_ICCM
 343         if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
 344                 panic("Linux built with incorrect ICCM Size\n");
 345 #endif
 346
 347         /*
 348          * FP hardware/software config sanity
 349          * -If hardware contains DPFP, kernel needs to save/restore FPU state
 350          * -If not, it will crash trying to save/restore the non-existant regs
 351          *
 352          * (only DPDP checked since SP has no arch visible regs)
 353          */
 354         fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
 355
 356         if (cpu->extn.fpu_dp && !fpu_enabled)
 357                 pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
 358         else if (!cpu->extn.fpu_dp && fpu_enabled)
 359                 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
 360 }
 361
 362 /*
 363  * Initialize and setup the processor core
 364  * This is called by all the CPUs thus should not do special case stuff
 365  *    such as only for boot CPU etc
 366  */
 367
 368 void setup_processor(void)
 369 {
 370         char str[512];
 371         int cpu_id = smp_processor_id();
 372
 373         read_arc_build_cfg_regs();
 374         arc_init_IRQ();
 375
 376         printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
 377
 378         arc_mmu_init();
 379         arc_cache_init();
 380
 381         printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
 382         printk(arc_platform_smp_cpuinfo());
 383
 384         arc_chk_core_config();
 385 }
 386
 387 static inline int is_kernel(unsigned long addr)
 388 {
 389         if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
 390                 return 1;
 391         return 0;
 392 }
 393
 394 void __init setup_arch(char **cmdline_p)
 395 {
 396 #ifdef CONFIG_ARC_UBOOT_SUPPORT
 397         /* make sure that uboot passed pointer to cmdline/dtb is valid */
 398         if (uboot_tag && is_kernel((unsigned long)uboot_arg))
 399                 panic("Invalid uboot arg\n");
 400
 401         /* See if u-boot passed an external Device Tree blob */
 402         machine_desc = setup_machine_fdt(uboot_arg);    /* uboot_tag == 2 */
 403         if (!machine_desc)
 404 #endif
 405         {
 406                 /* No, so try the embedded one */
 407                 machine_desc = setup_machine_fdt(__dtb_start);
 408                 if (!machine_desc)
 409                         panic("Embedded DT invalid\n");
 410
 411                 /*
 412                  * If we are here, it is established that @uboot_arg didn't
 413                  * point to DT blob. Instead if u-boot says it is cmdline,
 414                  * append to embedded DT cmdline.
 415                  * setup_machine_fdt() would have populated @boot_command_line
 416                  */
 417                 if (uboot_tag == 1) {
 418                         /* Ensure a whitespace between the 2 cmdlines */
 419                         strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
 420                         strlcat(boot_command_line, uboot_arg,
 421                                 COMMAND_LINE_SIZE);
 422                 }
 423         }
 424
 425         /* Save unparsed command line copy for /proc/cmdline */
 426         *cmdline_p = boot_command_line;
 427
 428         /* To force early parsing of things like mem=xxx */
 429         parse_early_param();
 430
 431         /* Platform/board specific: e.g. early console registration */
 432         if (machine_desc->init_early)
 433                 machine_desc->init_early();
 434
 435         smp_init_cpus();
 436
 437         setup_processor();
 438         setup_arch_memory();
 439
 440         /* copy flat DT out of .init and then unflatten it */
 441         unflatten_and_copy_device_tree();
 442
 443         /* Can be issue if someone passes cmd line arg "ro"
 444          * But that is unlikely so keeping it as it is
 445          */
 446         root_mountflags &= ~MS_RDONLY;
 447
 448 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
 449         conswitchp = &dummy_con;
 450 #endif
 451
 452         arc_unwind_init();
 453 }
 454
 455 /*
 456  * Called from start_kernel() - boot CPU only
 457  */
 458 void __init time_init(void)
 459 {
 460         of_clk_init(NULL);
 461         clocksource_probe();
 462 }
 463
 464 static int __init customize_machine(void)
 465 {
 466         if (machine_desc->init_machine)
 467                 machine_desc->init_machine();
 468
 469         return 0;
 470 }
 471 arch_initcall(customize_machine);
 472
 473 static int __init init_late_machine(void)
 474 {
 475         if (machine_desc->init_late)
 476                 machine_desc->init_late();
 477
 478         return 0;
 479 }
 480 late_initcall(init_late_machine);
 481 /*
 482  *  Get CPU information for use by the procfs.
 483  */
 484
 485 #define cpu_to_ptr(c)   ((void *)(0xFFFF0000 | (unsigned int)(c)))
 486 #define ptr_to_cpu(p)   (~0xFFFF0000UL & (unsigned int)(p))
 487
 488 static int show_cpuinfo(struct seq_file *m, void *v)
 489 {
 490         char *str;
 491         int cpu_id = ptr_to_cpu(v);
 492         struct device *cpu_dev = get_cpu_device(cpu_id);
 493         struct clk *cpu_clk;
 494         unsigned long freq = 0;
 495
 496         if (!cpu_online(cpu_id)) {
 497                 seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
 498                 goto done;
 499         }
 500
 501         str = (char *)__get_free_page(GFP_TEMPORARY);
 502         if (!str)
 503                 goto done;
 504
 505         seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 506
 507         cpu_clk = clk_get(cpu_dev, NULL);
 508         if (IS_ERR(cpu_clk)) {
 509                 seq_printf(m, "CPU speed \t: Cannot get clock for processor [%d]\n",
 510                            cpu_id);
 511         } else {
 512                 freq = clk_get_rate(cpu_clk);
 513         }
 514         if (freq)
 515                 seq_printf(m, "CPU speed\t: %lu.%02lu Mhz\n",
 516                            freq / 1000000, (freq / 10000) % 100);
 517
 518         seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
 519                    loops_per_jiffy / (500000 / HZ),
 520                    (loops_per_jiffy / (5000 / HZ)) % 100);
 521
 522         seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 523         seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
 524         seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
 525         seq_printf(m, arc_platform_smp_cpuinfo());
 526
 527         free_page((unsigned long)str);
 528 done:
 529         seq_printf(m, "\n");
 530
 531         return 0;
 532 }
 533
 534 static void *c_start(struct seq_file *m, loff_t *pos)
 535 {
 536         /*
 537          * Callback returns cpu-id to iterator for show routine, NULL to stop.
 538          * However since NULL is also a valid cpu-id (0), we use a round-about
 539          * way to pass it w/o having to kmalloc/free a 2 byte string.
 540          * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
 541          */
 542         return *pos < nr_cpu_ids ? cpu_to_ptr(*pos) : NULL;
 543 }
 544
 545 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 546 {
 547         ++*pos;
 548         return c_start(m, pos);
 549 }
 550
 551 static void c_stop(struct seq_file *m, void *v)
 552 {
 553 }
 554
 555 const struct seq_operations cpuinfo_op = {
 556         .start  = c_start,
 557         .next   = c_next,
 558         .stop   = c_stop,
 559         .show   = show_cpuinfo
 560 };
 561
 562 static DEFINE_PER_CPU(struct cpu, cpu_topology);
 563
 564 static int __init topology_init(void)
 565 {
 566         int cpu;
 567
 568         for_each_present_cpu(cpu)
 569             register_cpu(&per_cpu(cpu_topology, cpu), cpu);
 570
 571         return 0;
 572 }
 573
 574 subsys_initcall(topology_init);