1 Renesas MSIOF spi controller
4 - compatible : "renesas,msiof-r8a7743" (RZ/G1M)
5 "renesas,msiof-r8a7745" (RZ/G1E)
6 "renesas,msiof-r8a7790" (R-Car H2)
7 "renesas,msiof-r8a7791" (R-Car M2-W)
8 "renesas,msiof-r8a7792" (R-Car V2H)
9 "renesas,msiof-r8a7793" (R-Car M2-N)
10 "renesas,msiof-r8a7794" (R-Car E2)
11 "renesas,msiof-r8a7795" (R-Car H3)
12 "renesas,msiof-r8a7796" (R-Car M3-W)
13 "renesas,msiof-r8a77965" (R-Car M3-N)
14 "renesas,msiof-sh73a0" (SH-Mobile AG5)
15 "renesas,sh-mobile-msiof" (generic SH-Mobile compatibile device)
16 "renesas,rcar-gen2-msiof" (generic R-Car Gen2 and RZ/G1 compatible device)
17 "renesas,rcar-gen3-msiof" (generic R-Car Gen3 compatible device)
18 "renesas,sh-msiof" (deprecated)
20 When compatible with the generic version, nodes
21 must list the SoC-specific version corresponding
22 to the platform first followed by the generic
25 - reg : A list of offsets and lengths of the register sets for
27 If only one register set is present, it is to be used
28 by both the CPU and the DMA engine.
29 If two register sets are present, the first is to be
30 used by the CPU, and the second is to be used by the
32 - interrupt-parent : The phandle for the interrupt controller that
33 services interrupts for this device
34 - interrupts : Interrupt specifier
35 - #address-cells : Must be <1>
36 - #size-cells : Must be <0>
39 - clocks : Must contain a reference to the functional clock.
40 - num-cs : Total number of chip selects (default is 1).
41 Up to 3 native chip selects are supported:
45 Hardware limitations related to chip selects:
46 - Native chip selects are always deasserted in
47 between transfers that are part of the same
48 message. Use cs-gpios to work around this.
49 - All slaves using native chip selects must use the
50 same spi-cs-high configuration. Use cs-gpios to
52 - When using GPIO chip selects, at least one native
53 chip select must be left unused, as it will be
55 - dmas : Must contain a list of two references to DMA
56 specifiers, one for transmission, and one for
58 - dma-names : Must contain a list of two DMA names, "tx" and "rx".
59 - spi-slave : Empty property indicating the SPI controller is used
61 - renesas,dtdl : delay sync signal (setup) in transmit mode.
62 Must contain one of the following values:
64 50 (0.5-clock-cycle delay)
65 100 (1-clock-cycle delay)
66 150 (1.5-clock-cycle delay)
67 200 (2-clock-cycle delay)
69 - renesas,syncdl : delay sync signal (hold) in transmit mode.
70 Must contain one of the following values:
72 50 (0.5-clock-cycle delay)
73 100 (1-clock-cycle delay)
74 150 (1.5-clock-cycle delay)
75 200 (2-clock-cycle delay)
76 300 (3-clock-cycle delay)
78 Optional properties, deprecated for soctype-specific bindings:
79 - renesas,tx-fifo-size : Overrides the default tx fifo size given in words
81 - renesas,rx-fifo-size : Overrides the default rx fifo size given in words
84 Pinctrl properties might be needed, too. See
85 Documentation/devicetree/bindings/pinctrl/renesas,*.
89 msiof0: spi@e6e20000 {
90 compatible = "renesas,msiof-r8a7791",
91 "renesas,rcar-gen2-msiof";
92 reg = <0 0xe6e20000 0 0x0064>;
93 interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
94 clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
95 dmas = <&dmac0 0x51>, <&dmac0 0x52>;
96 dma-names = "tx", "rx";