1 Freescale i.MX General Power Controller
2 =======================================
4 The i.MX6 General Power Control (GPC) block contains DVFS load tracking
5 counters and Power Gating Control (PGC).
8 - compatible: Should be one of the following:
12 - reg: should be register base and length as documented in the
14 - interrupts: Should contain one interrupt specifier for the GPC interrupt
15 - clocks: Must contain an entry for each entry in clock-names.
16 See Documentation/devicetree/bindings/clocks/clock-bindings.txt for details.
17 - clock-names: Must include the following entries:
20 The power domains are generic power domain providers as documented in
21 Documentation/devicetree/bindings/power/power_domain.txt. They are described as
22 subnodes of the power gating controller 'pgc' node of the GPC and should
23 contain the following:
26 - reg: Must contain the DOMAIN_INDEX of this power domain
27 The following DOMAIN_INDEX values are valid for i.MX6Q:
30 The following additional DOMAIN_INDEX value is valid for i.MX6SL:
33 - #power-domain-cells: Should be 0
36 - clocks: a number of phandles to clocks that need to be enabled during domain
37 power-up sequencing to ensure reset propagation into devices located inside
39 - power-supply: a phandle to the regulator powering this domain
44 compatible = "fsl,imx6q-gpc";
45 reg = <0x020dc000 0x4000>;
46 interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
47 <0 90 IRQ_TYPE_LEVEL_HIGH>;
48 clocks = <&clks IMX6QDL_CLK_IPG>;
57 #power-domain-cells = <0>;
60 pd_pu: power-domain@1 {
62 #power-domain-cells = <0>;
63 power-supply = <®_pu>;
64 clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>,
65 <&clks IMX6QDL_CLK_GPU3D_SHADER>,
66 <&clks IMX6QDL_CLK_GPU2D_CORE>,
67 <&clks IMX6QDL_CLK_GPU2D_AXI>,
68 <&clks IMX6QDL_CLK_OPENVG_AXI>,
69 <&clks IMX6QDL_CLK_VPU_AXI>;
75 Specifying power domain for IP modules
76 ======================================
78 IP cores belonging to a power domain should contain a 'power-domains' property
79 that is a phandle pointing to the power domain the device belongs to.
81 Example of a device that is part of the PU power domain:
84 reg = <0x02040000 0x3c000>;
86 power-domains = <&pd_pu>;