1 Qualcomm PMIC GPIO block
3 This binding describes the GPIO block(s) found in the 8xxx series of
9 Definition: must be one of:
21 And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio"
22 if the device is on an spmi bus or an ssbi bus respectively
26 Value type: <prop-encoded-array>
27 Definition: Register base of the GPIO block and length.
31 Value type: <prop-encoded-array>
32 Definition: Must contain an array of encoded interrupt specifiers for
38 Definition: Mark the device node as a GPIO controller
43 Definition: Must be 2;
44 the first cell will be used to define gpio number and the
45 second denotes the flags for this gpio
47 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
48 a general description of GPIO and interrupt bindings.
50 Please refer to pinctrl-bindings.txt in this directory for details of the
51 common pinctrl bindings used by client devices, including the meaning of the
52 phrase "pin configuration node".
54 The pin configuration nodes act as a container for an arbitrary number of
55 subnodes. Each of these subnodes represents some desired configuration for a
56 pin or a list of pins. This configuration can include the
57 mux function to select on those pin(s), and various pin configuration
58 parameters, as listed below.
63 The name of each subnode is not important; all subnodes should be enumerated
64 and processed purely based on their content.
66 Each subnode only affects those parameters that are explicitly listed. In
67 other words, a subnode that lists a mux function but no pin configuration
68 parameters implies no information about any pin configuration parameters.
69 Similarly, a pin subnode that describes a pullup parameter implies no
70 information about e.g. the mux function.
72 The following generic properties as defined in pinctrl-bindings.txt are valid
73 to specify in a pin configuration subnode:
77 Value type: <string-array>
78 Definition: List of gpio pins affected by the properties specified in
79 this subnode. Valid pins are:
80 gpio1-gpio6 for pm8018
81 gpio1-gpio12 for pm8038
82 gpio1-gpio40 for pm8058
83 gpio1-gpio4 for pm8916
84 gpio1-gpio38 for pm8917
85 gpio1-gpio44 for pm8921
86 gpio1-gpio36 for pm8941
87 gpio1-gpio22 for pm8994
88 gpio1-gpio22 for pma8084
89 gpio1-gpio10 for pmi8994
94 Definition: Specify the alternative function to be configured for the
95 specified pins. Valid values are:
104 And following values are supported by LV/MV GPIO subtypes:
111 Definition: The specified pins should be configured as no pull.
116 Definition: The specified pins should be configured as pull down.
121 Definition: The specified pins should be configured as pull up.
123 - qcom,pull-up-strength:
126 Definition: Specifies the strength to use for pull up, if selected.
127 Valid values are; as defined in
128 <dt-bindings/pinctrl/qcom,pmic-gpio.h>:
129 1: 30uA (PMIC_GPIO_PULL_UP_30)
130 2: 1.5uA (PMIC_GPIO_PULL_UP_1P5)
131 3: 31.5uA (PMIC_GPIO_PULL_UP_31P5)
132 4: 1.5uA + 30uA boost (PMIC_GPIO_PULL_UP_1P5_30)
133 If this property is omitted 30uA strength will be used if
136 - bias-high-impedance:
139 Definition: The specified pins will put in high-Z mode and disabled.
144 Definition: The specified pins are put in input mode.
149 Definition: The specified pins are configured in output mode, driven
155 Definition: The specified pins are configured in output mode, driven
161 Definition: Selects the power source for the specified pins. Valid
162 power sources are defined per chip in
163 <dt-bindings/pinctrl/qcom,pmic-gpio.h>
165 - qcom,drive-strength:
168 Definition: Selects the drive strength for the specified pins. Value
170 0: no (PMIC_GPIO_STRENGTH_NO)
171 1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V
172 2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V
173 3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V
174 as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h>
179 Definition: The specified pins are configured in push-pull mode.
184 Definition: The specified pins are configured in open-drain mode.
189 Definition: The specified pins are configured in open-source mode.
194 Definition: The specified pins are configured in analog-pass-through mode.
199 Definition: Selects ATEST rail to route to GPIO when it's configured
200 in analog-pass-through mode.
201 Valid values are 1-4 corresponding to ATEST1 to ATEST4.
206 Definition: Selects DTEST rail to route to GPIO when it's configured
208 Valid values are 1-4 corresponding to DTEST1 to DTEST4.
212 pm8921_gpio: gpio@150 {
213 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio";
215 interrupts = <192 1>, <193 1>, <194 1>,
216 <195 1>, <196 1>, <197 1>,
217 <198 1>, <199 1>, <200 1>,
218 <201 1>, <202 1>, <203 1>,
219 <204 1>, <205 1>, <206 1>,
220 <207 1>, <208 1>, <209 1>,
221 <210 1>, <211 1>, <212 1>,
222 <213 1>, <214 1>, <215 1>,
223 <216 1>, <217 1>, <218 1>,
224 <219 1>, <220 1>, <221 1>,
225 <222 1>, <223 1>, <224 1>,
226 <225 1>, <226 1>, <227 1>,
227 <228 1>, <229 1>, <230 1>,
228 <231 1>, <232 1>, <233 1>,
234 pm8921_gpio_keys: gpio-keys {
236 pins = "gpio20", "gpio21";
242 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
243 power-source = <PM8921_GPIO_S4>;