1 MediaTek Frame Engine Ethernet controller
2 =========================================
4 The frame engine ethernet controller can be found on MediaTek SoCs. These SoCs
5 have dual GMAC each represented by a child node..
7 * Ethernet controller node
10 - compatible: Should be "mediatek,mt2701-eth"
11 - reg: Address and length of the register set for the device
12 - interrupts: Should contain the three frame engines interrupts in numeric
13 order. These are fe_int0, fe_int1 and fe_int2.
14 - clocks: the clock used by the core
15 - clock-names: the names of the clock listed in the clocks property. These are
16 "ethif", "esw", "gp2", "gp1"
17 - power-domains: phandle to the power domain that the ethernet is part of
18 - resets: Should contain phandles to the ethsys reset signals
19 - reset-names: Should contain the names of reset signal listed in the resets
21 These are "fe", "gmac" and "ppe"
22 - mediatek,ethsys: phandle to the syscon node that handles the port setup
23 - mediatek,pctl: phandle to the syscon node that handles the ports slew rate
27 - interrupt-parent: Should be the phandle for the interrupt controller
28 that services interrupts for this device
33 - compatible: Should be "mediatek,eth-mac"
34 - reg: The number of the MAC
35 - phy-handle: see ethernet.txt file in the same directory and
36 the phy-mode "trgmii" required being provided when reg
37 is equal to 0 and the MAC uses fixed-link to connect
38 with internal switch such as MT7530.
42 eth: ethernet@1b100000 {
43 compatible = "mediatek,mt7623-eth";
44 reg = <0 0x1b100000 0 0x20000>;
45 clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
46 <ðsys CLK_ETHSYS_ESW>,
47 <ðsys CLK_ETHSYS_GP2>,
48 <ðsys CLK_ETHSYS_GP1>;
49 clock-names = "ethif", "esw", "gp2", "gp1";
50 interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_LOW
51 GIC_SPI 199 IRQ_TYPE_LEVEL_LOW
52 GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>;
53 power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
54 resets = <ðsys MT2701_ETHSYS_ETH_RST>;
56 mediatek,ethsys = <ðsys>;
57 mediatek,pctl = <&syscfg_pctl_a>;
62 compatible = "mediatek,eth-mac";
68 compatible = "mediatek,eth-mac";
74 phy0: ethernet-phy@0 {
79 phy1: ethernet-phy@1 {