1 Distributed Switch Architecture Device Tree Bindings
2 ----------------------------------------------------
4 Two bindings exist, one of which has been deprecated due to
10 Switches are true Linux devices and can be probed by any means. Once
11 probed, they register to the DSA framework, passing a node
12 pointer. This node is expected to fulfil the following binding, and
13 may contain additional properties as required by the device it is
18 - ports : A container for child nodes representing switch ports.
22 - dsa,member : A two element list indicates which DSA cluster, and position
23 within the cluster a switch takes. <0 0> is cluster 0,
24 switch 0. <0 1> is cluster 0, switch 1. <1 0> is cluster 1,
25 switch 0. A switch not part of any cluster (single device
26 hanging off a CPU port) must not specify this property
28 The ports container has the following properties
32 - #address-cells : Must be 1
33 - #size-cells : Must be 0
35 Each port children node must have the following mandatory properties:
36 - reg : Describes the port address in the switch
38 An uplink/downlink port between switches in the cluster has the following
41 - link : Should be a list of phandles to other switch's DSA
42 port. This port is used as the outgoing port
43 towards the phandle ports. The full routing
44 information must be given, not just the one hop
45 routes to neighbouring switches.
47 A CPU port has the following mandatory property:
49 - ethernet : Should be a phandle to a valid Ethernet device node.
50 This host device is what the switch port is
53 A user port has the following optional property:
55 - label : Describes the label associated with this port, which
56 will become the netdev name.
58 Port child nodes may also contain the following optional standardised
59 properties, described in binding documents:
61 - phy-handle : Phandle to a PHY on an MDIO bus. See
62 Documentation/devicetree/bindings/net/ethernet.txt
66 Documentation/devicetree/bindings/net/ethernet.txt
69 - fixed-link : Fixed-link subnode describing a link to a non-MDIO
71 Documentation/devicetree/bindings/net/fixed-link.txt
74 - local-mac-address : See
75 Documentation/devicetree/bindings/net/ethernet.txt
80 The following example shows three switches on three MDIO busses,
81 linked into one DSA cluster.
88 compatible = "marvell,mv88e6085";
104 local-mac-address = [00 00 00 00 00 00];
112 switch0port5: port@5 {
114 phy-mode = "rgmii-txid";
115 link = <&switch1port6
136 #address-cells = <1>;
140 compatible = "marvell,mv88e6085";
146 #address-cells = <1>;
151 phy-handle = <&switch1phy0>;
157 phy-handle = <&switch1phy1>;
163 phy-handle = <&switch1phy2>;
166 switch1port5: port@5 {
168 link = <&switch2port9>;
169 phy-mode = "rgmii-txid";
176 switch1port6: port@6 {
178 phy-mode = "rgmii-txid";
179 link = <&switch0port5>;
187 #address-cells = <1>;
189 switch1phy0: switch1phy0@0 {
192 switch1phy1: switch1phy0@1 {
195 switch1phy2: switch1phy0@2 {
203 #address-cells = <1>;
207 compatible = "marvell,mv88e6085";
213 #address-cells = <1>;
236 link-gpios = <&gpio6 2
247 link-gpios = <&gpio6 3
252 switch2port9: port@9 {
254 phy-mode = "rgmii-txid";
255 link = <&switch1port5
269 The deprecated binding makes use of a platform device to represent the
270 switches. The switches themselves are not Linux devices, and make use
271 of an MDIO bus for management.
274 - compatible : Should be "marvell,dsa"
275 - #address-cells : Must be 2, first cell is the address on the MDIO bus
276 and second cell is the address in the switch tree.
277 Second cell is used only when cascading/chaining.
278 - #size-cells : Must be 0
279 - dsa,ethernet : Should be a phandle to a valid Ethernet device node
280 - dsa,mii-bus : Should be a phandle to a valid MDIO bus device node
283 - interrupts : property with a value describing the switch
284 interrupt number (not supported by the driver)
286 A DSA node can contain multiple switch chips which are therefore child nodes of
287 the parent DSA node. The maximum number of allowed child nodes is 4
289 Each of these switch child nodes should have the following required properties:
291 - reg : Contains two fields. The first one describes the
292 address on the MII bus. The second is the switch
293 number that must be unique in cascaded configurations
294 - #address-cells : Must be 1
295 - #size-cells : Must be 0
297 A switch child node has the following optional property:
299 - eeprom-length : Set to the length of an EEPROM connected to the
300 switch. Must be set if the switch can not detect
301 the presence and/or size of a connected EEPROM,
304 A switch may have multiple "port" children nodes
306 Each port children node must have the following mandatory properties:
307 - reg : Describes the port address in the switch
308 - label : Describes the label associated with this port, special
309 labels are "cpu" to indicate a CPU port and "dsa" to
310 indicate an uplink/downlink port.
312 Note that a port labelled "dsa" will imply checking for the uplink phandle
316 - link : Should be a list of phandles to another switch's DSA port.
317 This property is only used when switches are being
318 chained/cascaded together. This port is used as outgoing port
319 towards the phandle port, which can be more than one hop away.
321 - phy-handle : Phandle to a PHY on an external MDIO bus, not the
322 switch internal one. See
323 Documentation/devicetree/bindings/net/ethernet.txt
326 - phy-mode : String representing the connection to the designated
327 PHY node specified by the 'phy-handle' property. See
328 Documentation/devicetree/bindings/net/ethernet.txt
331 - mii-bus : Should be a phandle to a valid MDIO bus device node.
332 This mii-bus will be used in preference to the
333 global dsa,mii-bus defined above, for this switch.
336 - fixed-link : Fixed-link subnode describing a link to a non-MDIO
338 Documentation/devicetree/bindings/net/fixed-link.txt
344 compatible = "marvell,dsa";
345 #address-cells = <2>;
349 dsa,ethernet = <ðernet0>;
350 dsa,mii-bus = <&mii_bus0>;
353 #address-cells = <1>;
355 reg = <16 0>; /* MDIO address 16, switch 0 in tree */
360 phy-handle = <&phy0>;
373 switch0port6: port@6 {
376 link = <&switch1port0
382 #address-cells = <1>;
384 reg = <17 1>; /* MDIO address 17, switch 1 in tree */
385 mii-bus = <&mii_bus1>;
386 reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
388 switch1port0: port@0 {
391 link = <&switch0port6>;
393 switch1port1: port@1 {
396 link = <&switch2port1>;
401 #address-cells = <1>;
403 reg = <18 2>; /* MDIO address 18, switch 2 in tree */
404 mii-bus = <&mii_bus1>;
406 switch2port0: port@0 {
409 link = <&switch1port1