1 Renesas R-Car Video Input driver (rcar_vin)
2 -------------------------------------------
4 The rcar_vin device provides video input capabilities for the Renesas R-Car
7 Each VIN instance has a single parallel input that supports RGB and YUV video,
8 with both external synchronization and BT.656 synchronization for the latter.
9 Depending on the instance the VIN input is connected to external SoC pins, or
10 on Gen3 platforms to a CSI-2 receiver.
12 - compatible: Must be one or more of the following
13 - "renesas,vin-r8a7743" for the R8A7743 device
14 - "renesas,vin-r8a7744" for the R8A7744 device
15 - "renesas,vin-r8a7745" for the R8A7745 device
16 - "renesas,vin-r8a7778" for the R8A7778 device
17 - "renesas,vin-r8a7779" for the R8A7779 device
18 - "renesas,vin-r8a7790" for the R8A7790 device
19 - "renesas,vin-r8a7791" for the R8A7791 device
20 - "renesas,vin-r8a7792" for the R8A7792 device
21 - "renesas,vin-r8a7793" for the R8A7793 device
22 - "renesas,vin-r8a7794" for the R8A7794 device
23 - "renesas,vin-r8a7795" for the R8A7795 device
24 - "renesas,vin-r8a7796" for the R8A7796 device
25 - "renesas,vin-r8a77965" for the R8A77965 device
26 - "renesas,vin-r8a77970" for the R8A77970 device
27 - "renesas,vin-r8a77995" for the R8A77995 device
28 - "renesas,rcar-gen2-vin" for a generic R-Car Gen2 or RZ/G1 compatible
31 When compatible with the generic version nodes must list the
32 SoC-specific version corresponding to the platform first
33 followed by the generic version.
35 - reg: the register base and size for the device registers
36 - interrupts: the interrupt for the device
37 - clocks: Reference to the parent clock
39 Additionally, an alias named vinX will need to be created to specify
40 which video input device this is.
42 The per-board settings Gen2 platforms:
44 - port - sub-node describing a single endpoint connected to the VIN
45 from external SoC pins as described in video-interfaces.txt[1].
46 Only the first one will be considered as each vin interface has one
49 - Optional properties for endpoint nodes:
50 - hsync-active: see [1] for description. Default is active high.
51 - vsync-active: see [1] for description. Default is active high.
52 If both HSYNC and VSYNC polarities are not specified, embedded
53 synchronization is selected.
54 - field-active-even: see [1] for description. Default is active high.
55 - bus-width: see [1] for description. The selected bus width depends on
56 the SoC type and selected input image format.
57 Valid values are: 8, 10, 12, 16, 24 and 32.
58 - data-shift: see [1] for description. Valid values are 0 and 8.
59 - data-enable-active: polarity of CLKENB signal, see [1] for
60 description. Default is active high.
62 The per-board settings Gen3 platforms:
64 Gen3 platforms can support both a single connected parallel input source
65 from external SoC pins (port@0) and/or multiple parallel input sources
66 from local SoC CSI-2 receivers (port@1) depending on SoC.
68 - renesas,id - ID number of the VIN, VINx in the documentation.
70 - port@0 - sub-node describing a single endpoint connected to the VIN
71 from external SoC pins as described in video-interfaces.txt[1].
72 Describing more than one endpoint in port@0 is invalid. Only VIN
73 instances that are connected to external pins should have port@0.
75 Endpoint nodes of port@0 support the optional properties listed in
76 the Gen2 per-board settings description.
78 - port@1 - sub-nodes describing one or more endpoints connected to
79 the VIN from local SoC CSI-2 receivers. The endpoint numbers must
80 use the following schema.
82 - endpoint@0 - sub-node describing the endpoint connected to CSI20
83 - endpoint@1 - sub-node describing the endpoint connected to CSI21
84 - endpoint@2 - sub-node describing the endpoint connected to CSI40
85 - endpoint@3 - sub-node describing the endpoint connected to CSI41
87 Endpoint nodes of port@1 do not support any optional endpoint property.
89 Device node example for Gen2 platforms
90 --------------------------------------
97 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
98 clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
99 reg = <0 0xe6ef0000 0 0x1000>;
100 interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>;
104 Board setup example for Gen2 platforms (vin1 composite video input)
105 -------------------------------------------------------------------
109 pinctrl-0 = <&i2c2_pins>;
110 pinctrl-names = "default";
113 compatible = "adi,adv7180";
120 remote-endpoint = <&vin1ep0>;
126 /* composite video input */
128 pinctrl-0 = <&vin1_pins>;
129 pinctrl-names = "default";
135 remote-endpoint = <&adv7180>;
141 Device node example for Gen3 platforms
142 --------------------------------------
144 vin0: video@e6ef0000 {
145 compatible = "renesas,vin-r8a7795";
146 reg = <0 0xe6ef0000 0 0x1000>;
147 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
148 clocks = <&cpg CPG_MOD 811>;
149 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
154 #address-cells = <1>;
158 #address-cells = <1>;
163 vin0csi20: endpoint@0 {
165 remote-endpoint= <&csi20vin0>;
167 vin0csi21: endpoint@1 {
169 remote-endpoint= <&csi21vin0>;
171 vin0csi40: endpoint@2 {
173 remote-endpoint= <&csi40vin0>;
179 csi20: csi2@fea80000 {
180 compatible = "renesas,r8a7795-csi2";
181 reg = <0 0xfea80000 0 0x10000>;
182 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
183 clocks = <&cpg CPG_MOD 714>;
184 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
188 #address-cells = <1>;
196 remote-endpoint = <&adv7482_txb>;
201 #address-cells = <1>;
206 csi20vin0: endpoint@0 {
208 remote-endpoint = <&vin0csi20>;
214 [1] video-interfaces.txt common video media interface