Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt

   1 +Mediatek 65xx/67xx/81xx sysirq
   2
   3 Mediatek SOCs sysirq support controllable irq inverter for each GIC SPI
   4 interrupt.
   5
   6 Required properties:
   7 - compatible: should be one of:
   8         "mediatek,mt8173-sysirq"
   9         "mediatek,mt8135-sysirq"
  10         "mediatek,mt8127-sysirq"
  11         "mediatek,mt6795-sysirq"
  12         "mediatek,mt6755-sysirq"
  13         "mediatek,mt6592-sysirq"
  14         "mediatek,mt6589-sysirq"
  15         "mediatek,mt6582-sysirq"
  16         "mediatek,mt6580-sysirq"
  17         "mediatek,mt6577-sysirq"
  18         "mediatek,mt2701-sysirq"
  19 - interrupt-controller : Identifies the node as an interrupt controller
  20 - #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt.
  21 - interrupt-parent: phandle of irq parent for sysirq. The parent must
  22   use the same interrupt-cells format as GIC.
  23 - reg: Physical base address of the intpol registers and length of memory
  24   mapped region. Could be multiple bases here. Ex: mt6797 needs 2 reg, others
  25   need 1.
  26
  27 Example:
  28         sysirq: intpol-controller@10200620 {
  29                 compatible = "mediatek,mt6797-sysirq",
  30                              "mediatek,mt6577-sysirq";
  31                 interrupt-controller;
  32                 #interrupt-cells = <3>;
  33                 interrupt-parent = <&gic>;
  34                 reg = <0 0x10220620 0 0x20>,
  35                       <0 0x10220690 0 0x10>;
  36         };