Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt

   1 Rockchip Successive Approximation Register (SAR) A/D Converter bindings
   2
   3 Required properties:
   4 - compatible: should be "rockchip,<name>-saradc" or "rockchip,rk3066-tsadc"
   5    - "rockchip,saradc": for rk3188, rk3288
   6    - "rockchip,rk3066-tsadc": for rk3036
   7    - "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328
   8    - "rockchip,rk3399-saradc": for rk3399
   9    - "rockchip,rv1108-saradc", "rockchip,rk3399-saradc": for rv1108
  10
  11 - reg: physical base address of the controller and length of memory mapped
  12        region.
  13 - interrupts: The interrupt number to the cpu. The interrupt specifier format
  14               depends on the interrupt controller.
  15 - clocks: Must contain an entry for each entry in clock-names.
  16 - clock-names: Shall be "saradc" for the converter-clock, and "apb_pclk" for
  17                the peripheral clock.
  18 - vref-supply: The regulator supply ADC reference voltage.
  19 - #io-channel-cells: Should be 1, see ../iio-bindings.txt
  20
  21 Optional properties:
  22 - resets: Must contain an entry for each entry in reset-names if need support
  23           this option. See ../reset/reset.txt for details.
  24 - reset-names: Must include the name "saradc-apb".
  25
  26 Example:
  27         saradc: saradc@2006c000 {
  28                 compatible = "rockchip,saradc";
  29                 reg = <0x2006c000 0x100>;
  30                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
  31                 clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
  32                 clock-names = "saradc", "apb_pclk";
  33                 resets = <&cru SRST_SARADC>;
  34                 reset-names = "saradc-apb";
  35                 #io-channel-cells = <1>;
  36                 vref-supply = <&vcc18>;
  37         };