1 Xilinx AXI VDMA engine, it does transfers between memory and video devices.
2 It can be configured to have one channel or two channels. If configured
3 as two channels, one is to transmit to the video device and another is
4 to receive from the video device.
6 Xilinx AXI DMA engine, it does transfers between memory and AXI4 stream
7 target devices. It can be configured to have one channel or two channels.
8 If configured as two channels, one is to transmit to the device and another
9 is to receive from the device.
11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source
12 address and a memory-mapped destination address.
15 - compatible: Should be "xlnx,axi-vdma-1.00.a" or "xlnx,axi-dma-1.00.a" or
16 "xlnx,axi-cdma-1.00.a""
17 - #dma-cells: Should be <1>, see "dmas" property below
18 - reg: Should contain VDMA registers location and length.
19 - xlnx,addrwidth: Should be the vdma addressing size in bits(ex: 32 bits).
20 - dma-ranges: Should be as the following <dma_addr cpu_addr max_len>.
21 - dma-channel child node: Should have at least one channel and can have up to
22 two channels per device. This node specifies the properties of each
23 DMA channel (see child node properties below).
24 - clocks: Input clock specifier. Refer to common clock bindings.
25 - clock-names: List of input clocks
27 Required elements: "s_axi_lite_aclk"
28 Optional elements: "m_axi_mm2s_aclk" "m_axi_s2mm_aclk",
29 "m_axis_mm2s_aclk", "s_axis_s2mm_aclk"
31 Required elements: "s_axi_lite_aclk", "m_axi_aclk"
33 Required elements: "s_axi_lite_aclk"
34 Optional elements: "m_axi_mm2s_aclk", "m_axi_s2mm_aclk",
37 Required properties for VDMA:
38 - xlnx,num-fstores: Should be the number of framebuffers as configured in h/w.
40 Optional properties for AXI DMA:
41 - xlnx,sg-length-width: Should be set to the width in bits of the length
42 register as configured in h/w. Takes values {8...26}. If the property
43 is missing or invalid then the default value 23 is used. This is the
44 maximum value that is supported by all IP versions.
45 - xlnx,mcdma: Tells whether configured for multi-channel mode in the hardware.
46 Optional properties for VDMA:
47 - xlnx,flush-fsync: Tells which channel to Flush on Frame sync.
48 It takes following values:
49 {1}, flush both channels
50 {2}, flush mm2s channel
51 {3}, flush s2mm channel
53 Required child node properties:
55 For VDMA: It should be either "xlnx,axi-vdma-mm2s-channel" or
56 "xlnx,axi-vdma-s2mm-channel".
57 For CDMA: It should be "xlnx,axi-cdma-channel".
58 For AXIDMA: It should be either "xlnx,axi-dma-mm2s-channel" or
59 "xlnx,axi-dma-s2mm-channel".
60 - interrupts: Should contain per channel VDMA interrupts.
61 - xlnx,datawidth: Should contain the stream data width, take values
64 Optional child node properties:
65 - xlnx,include-dre: Tells hardware is configured for Data
67 Optional child node properties for VDMA:
68 - xlnx,genlock-mode: Tells Genlock synchronization is
69 enabled/disabled in hardware.
70 - xlnx,enable-vert-flip: Tells vertical flip is
71 enabled/disabled in hardware(S2MM path).
72 Optional child node properties for AXI DMA:
73 -dma-channels: Number of dma channels in child node.
78 axi_vdma_0: axivdma@40030000 {
79 compatible = "xlnx,axi-vdma-1.00.a";
81 reg = < 0x40030000 0x10000 >;
82 dma-ranges = <0x00000000 0x00000000 0x40000000>;
83 xlnx,num-fstores = <0x8>;
84 xlnx,flush-fsync = <0x1>;
85 xlnx,addrwidth = <0x20>;
86 clocks = <&clk 0>, <&clk 1>, <&clk 2>, <&clk 3>, <&clk 4>;
87 clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk",
88 "m_axis_mm2s_aclk", "s_axis_s2mm_aclk";
89 dma-channel@40030000 {
90 compatible = "xlnx,axi-vdma-mm2s-channel";
91 interrupts = < 0 54 4 >;
92 xlnx,datawidth = <0x40>;
94 dma-channel@40030030 {
95 compatible = "xlnx,axi-vdma-s2mm-channel";
96 interrupts = < 0 53 4 >;
97 xlnx,datawidth = <0x40>;
105 - dmas: a list of <[Video DMA device phandle] [Channel ID]> pairs,
106 where Channel ID is '0' for write/tx and '1' for read/rx
108 - dma-names: a list of DMA channel names, one per "dmas" entry
113 vdmatest_0: vdmatest@0 {
114 compatible ="xlnx,axi-vdma-test-1.00.a";
115 dmas = <&axi_vdma_0 0
117 dma-names = "vdma0", "vdma1";