Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt

   1 Renesas Gen3 DWC HDMI TX Encoder
   2 ================================
   3
   4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
   5 with a companion PHY IP.
   6
   7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
   8 Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
   9 following device-specific properties.
  10
  11
  12 Required properties:
  13
  14 - compatible : Shall contain one or more of
  15   - "renesas,r8a774a1-hdmi" for R8A774A1 (RZ/G2M) compatible HDMI TX
  16   - "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX
  17   - "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX
  18   - "renesas,r8a77965-hdmi" for R8A77965 (R-Car M3-N) compatible HDMI TX
  19   - "renesas,rcar-gen3-hdmi" for the generic R-Car Gen3 and RZ/G2 compatible
  20                              HDMI TX
  21
  22     When compatible with generic versions, nodes must list the SoC-specific
  23     version corresponding to the platform first, followed by the
  24     family-specific version.
  25
  26 - reg: See dw_hdmi.txt.
  27 - interrupts: HDMI interrupt number
  28 - clocks: See dw_hdmi.txt.
  29 - clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
  30 - ports: See dw_hdmi.txt. The DWC HDMI shall have one port numbered 0
  31   corresponding to the video input of the controller and one port numbered 1
  32   corresponding to its HDMI output, and one port numbered 2 corresponding to
  33   sound input of the controller. Each port shall have a single endpoint.
  34
  35 Optional properties:
  36
  37 - power-domains: Shall reference the power domain that contains the DWC HDMI,
  38   if any.
  39
  40
  41 Example:
  42
  43         hdmi0: hdmi@fead0000 {
  44                 compatible = "renesas,r8a7795-dw-hdmi";
  45                 reg = <0 0xfead0000 0 0x10000>;
  46                 interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>;
  47                 clocks = <&cpg CPG_CORE R8A7795_CLK_S0D4>, <&cpg CPG_MOD 729>;
  48                 clock-names = "iahb", "isfr";
  49                 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
  50
  51                 ports {
  52                         #address-cells = <1>;
  53                         #size-cells = <0>;
  54                         port@0 {
  55                                 reg = <0>;
  56                                 dw_hdmi0_in: endpoint {
  57                                         remote-endpoint = <&du_out_hdmi0>;
  58                                 };
  59                         };
  60                         port@1 {
  61                                 reg = <1>;
  62                                 rcar_dw_hdmi0_out: endpoint {
  63                                         remote-endpoint = <&hdmi0_con>;
  64                                 };
  65                         };
  66                         port@2 {
  67                                 reg = <2>;
  68                                 rcar_dw_hdmi0_sound_in: endpoint {
  69                                         remote-endpoint = <&hdmi_sound_out>;
  70                                 };
  71                         };
  72                 };
  73         };
  74
  75         hdmi0-out {
  76                 compatible = "hdmi-connector";
  77                 label = "HDMI0 OUT";
  78                 type = "a";
  79
  80                 port {
  81                         hdmi0_con: endpoint {
  82                                 remote-endpoint = <&rcar_dw_hdmi0_out>;
  83                         };
  84                 };
  85         };