3 Chipid required properties:
4 - compatible: Should be "atmel,sama5d2-chipid"
5 - reg : Should contain registers location and length
7 PIT Timer required properties:
8 - compatible: Should be "atmel,at91sam9260-pit"
9 - reg: Should contain registers location and length
10 - interrupts: Should contain interrupt for the PIT which is the IRQ line
11 shared across all System Controller members.
13 System Timer (ST) required properties:
14 - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
15 - reg: Should contain registers location and length
16 - interrupts: Should contain interrupt for the ST which is the IRQ line
17 shared across all System Controller members.
18 - clocks: phandle to input clock.
20 - watchdog: compatible should be "atmel,at91rm9200-wdt"
22 RSTC Reset Controller required properties:
23 - compatible: Should be "atmel,<chip>-rstc".
24 <chip> can be "at91sam9260", "at91sam9g45", "sama5d3" or "samx7"
25 it also can be "microchip,sam9x60-rstc"
26 - reg: Should contain registers location and length
27 - clocks: phandle to input clock.
32 compatible = "atmel,at91sam9260-rstc";
33 reg = <0xfffffd00 0x10>;
37 RAMC SDRAM/DDR Controller required properties:
38 - compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
39 "atmel,at91sam9260-sdramc",
40 "atmel,at91sam9g45-ddramc",
41 "atmel,sama5d3-ddramc",
42 - reg: Should contain registers location and length
46 ramc0: ramc@ffffe800 {
47 compatible = "atmel,at91sam9g45-ddramc";
48 reg = <0xffffe800 0x200>;
51 SHDWC Shutdown Controller
54 - compatible: Should be "atmel,<chip>-shdwc".
55 <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
56 - reg: Should contain registers location and length
57 - clocks: phandle to input clock.
60 - atmel,wakeup-mode: String, operation mode of the wakeup mode.
61 Supported values are: "none", "high", "low", "any".
62 - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
64 optional at91sam9260 properties:
65 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
67 optional at91sam9rl properties:
68 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
69 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
71 optional at91sam9x5 properties:
72 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
77 compatible = "atmel,at91sam9260-shdwc";
78 reg = <0xfffffd10 0x10>;
82 SHDWC SAMA5D2-Compatible Shutdown Controller
87 - compatible: should be "atmel,sama5d2-shdwc".
88 - reg: should contain registers location and length
89 - clocks: phandle to input clock.
90 - #address-cells: should be one. The cell is the wake-up input index.
91 - #size-cells: should be zero.
95 - debounce-delay-us: minimum wake-up inputs debouncer period in
96 microseconds. It's usually a board-related property.
97 - atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
99 The node contains child nodes for each wake-up input that the platform uses.
103 Wake-up input nodes are usually described in the "board" part of the Device
104 Tree. Note also that input 0 is linked to the wake-up pin and is frequently
108 - reg: should contain the wake-up input index [0 - 15].
111 - atmel,wakeup-active-high: boolean, the corresponding wake-up input described
112 by the child, forces the wake-up of the core power supply on a high level.
113 The default is to be active low.
119 compatible = "atmel,sama5d2-shdwc";
120 reg = <0xf8048010 0x10>;
122 #address-cells = <1>;
124 atmel,wakeup-rtc-timer;
129 debounce-delay-us = <976>;
137 atmel,wakeup-active-high;
141 Special Function Registers (SFR)
143 Special Function Registers (SFR) manage specific aspects of the integrated
144 memory, bridge implementations, processor and other functionality not controlled
148 - compatible: Should be "atmel,<chip>-sfr", "syscon" or
149 "atmel,<chip>-sfrbu", "syscon"
150 <chip> can be "sama5d3", "sama5d4" or "sama5d2".
151 It also can be "microchip,sam9x60-sfr", "syscon".
152 - reg: Should contain registers location and length
155 compatible = "atmel,sama5d3-sfr", "syscon";
156 reg = <0xf0038000 0x60>;
159 Security Module (SECUMOD)
161 The Security Module macrocell provides all necessary secure functions to avoid
162 voltage, temperature, frequency and mechanical attacks on the chip. It also
163 embeds secure memories that can be scrambled.
165 The Security Module also offers the PIOBU pins which can be used as GPIO pins.
166 Note that they maintain their voltage during Backup/Self-refresh.
169 - compatible: Should be "atmel,<chip>-secumod", "syscon".
170 <chip> can be "sama5d2".
171 - reg: Should contain registers location and length
172 - gpio-controller: Marks the port as GPIO controller.
173 - #gpio-cells: There are 2. The pin number is the
174 first, the second represents additional
175 parameters such as GPIO_ACTIVE_HIGH/LOW.
179 compatible = "atmel,sama5d2-secumod", "syscon";
180 reg = <0xfc040000 0x100>;