arch/arm/boot/dts/kirkwood-rd88f6281.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Marvell RD88F6181 Common Board descrition
   4  *
   5  * Andrew Lunn <andrew@lunn.ch>
   6  *
   7  * This file contains the definitions that are common between the two
   8  * variants of the Marvell Kirkwood Development Board.
   9  */
  10
  11 #include "kirkwood.dtsi"
  12 #include "kirkwood-6281.dtsi"
  13
  14 / {
  15         memory {
  16                 device_type = "memory";
  17                 reg = <0x00000000 0x20000000>;
  18         };
  19
  20         chosen {
  21                 bootargs = "console=ttyS0,115200n8";
  22                 stdout-path = &uart0;
  23         };
  24
  25         ocp@f1000000 {
  26                 pinctrl: pin-controller@10000 {
  27                         pinctrl-names = "default";
  28
  29                         pmx_sdio_cd: pmx-sdio-cd {
  30                                 marvell,pins = "mpp28";
  31                                 marvell,function = "gpio";
  32                         };
  33                 };
  34
  35                 serial@12000 {
  36                         status = "okay";
  37
  38                 };
  39
  40                 sata@80000 {
  41                         status = "okay";
  42                         nr-ports = <2>;
  43                 };
  44                 mvsdio@90000 {
  45                         pinctrl-0 = <&pmx_sdio &pmx_sdio_cd>;
  46                         pinctrl-names = "default";
  47                         status = "okay";
  48                         cd-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
  49                         /* No WP GPIO */
  50                 };
  51         };
  52
  53         dsa {
  54                 status = "disabled";
  55
  56                 compatible = "marvell,dsa";
  57                 #address-cells = <2>;
  58                 #size-cells = <0>;
  59
  60                 dsa,ethernet = <&eth0port>;
  61                 dsa,mii-bus = <&mdio>;
  62
  63                 switch@0 {
  64                         #address-cells = <1>;
  65                         #size-cells = <0>;
  66
  67                         port@0 {
  68                                 reg = <0>;
  69                                 label = "lan1";
  70                         };
  71
  72                         port@1 {
  73                                 reg = <1>;
  74                                 label = "lan2";
  75                         };
  76
  77                         port@2 {
  78                                 reg = <2>;
  79                                 label = "lan3";
  80                         };
  81
  82                         port@3 {
  83                                 reg = <3>;
  84                                 label = "lan4";
  85                         };
  86
  87                         port@5 {
  88                                 reg = <5>;
  89                                 label = "cpu";
  90                         };
  91                 };
  92        };
  93 };
  94
  95 &nand {
  96         status = "okay";
  97
  98         partition@0 {
  99                 label = "u-boot";
 100                 reg = <0x0000000 0x100000>;
 101                 read-only;
 102         };
 103
 104         partition@100000 {
 105                 label = "uImage";
 106                 reg = <0x0100000 0x200000>;
 107         };
 108
 109         partition@300000 {
 110                 label = "rootfs";
 111                 reg = <0x0300000 0x500000>;
 112         };
 113 };
 114
 115 &mdio {
 116         status = "okay";
 117
 118         switch: switch@0 {
 119                 compatible = "marvell,mv88e6085";
 120                 #address-cells = <1>;
 121                 #size-cells = <0>;
 122
 123                 ports {
 124                         #address-cells = <1>;
 125                         #size-cells = <0>;
 126
 127                         port@0 {
 128                                 reg = <0>;
 129                                 label = "lan1";
 130                         };
 131
 132                         port@1 {
 133                                 reg = <1>;
 134                                 label = "lan2";
 135                         };
 136
 137                         port@2 {
 138                                 reg = <2>;
 139                                 label = "lan3";
 140                         };
 141
 142                         port@3 {
 143                                 reg = <3>;
 144                                 label = "lan4";
 145                         };
 146
 147                         port@5 {
 148                                 reg = <5>;
 149                                 label = "cpu";
 150                                 ethernet = <&eth0port>;
 151                                 fixed-link {
 152                                         speed = <1000>;
 153                                         full-duplex;
 154                                 };
 155                         };
 156
 157                 };
 158         };
 159 };
 160
 161 &eth0 {
 162         status = "okay";
 163         ethernet0-port@0 {
 164                 speed = <1000>;
 165                 duplex = <1>;
 166         };
 167 };
 168
 169 &pciec {
 170         status = "okay";
 171 };
 172
 173 &pcie0 {
 174         status = "okay";
 175 };