epan/dissectors/packet-rfid-pn532.c

   1 /* packet-rfid-pn532.c
   2  * Dissector for the NXP PN532 Protocol
   3  *
   4  * References:
   5  * http://www.nxp.com/documents/user_manual/141520.pdf
   6  *
   7  * Copyright 2012, Tyson Key <tyson.key@gmail.com>
   8  * Copyright 2013, Michal Labedzki for Tieto Corporation
   9  *
  10  * Wireshark - Network traffic analyzer
  11  * By Gerald Combs <gerald@wireshark.org>
  12  * Copyright 1998 Gerald Combs
  13  *
  14  * This program is free software; you can redistribute it and/or
  15  * modify it under the terms of the GNU General Public License
  16  * as published by the Free Software Foundation; either version 2
  17  * of the License, or (at your option) any later version.
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * You should have received a copy of the GNU General Public License
  25  * along with this program; if not, write to the Free Software
  26  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  27  *
  28  */
  29
  30 #include "config.h"
  31
  32 #include <epan/packet.h>
  33 #include <epan/prefs.h>
  34 #include <epan/expert.h>
  35 #include "packet-usb.h"
  36
  37 static int proto_pn532 = -1;
  38
  39 static int hf_pn532_command = -1;
  40 static int hf_pn532_direction = -1;
  41 static int hf_pn532_MaxTg = -1;
  42 static int hf_pn532_Tg = -1;
  43 static int hf_pn532_NbTg = -1;
  44 static int hf_pn532_BrTy = -1;
  45 static int hf_pn532_error = -1;
  46 static int hf_pn532_status_nad_present = -1;
  47 static int hf_pn532_status_mi = -1;
  48 static int hf_pn532_status_error_code = -1;
  49 static int hf_pn532_payload_length = -1;
  50 static int hf_pn532_ic_version = -1;
  51 static int hf_pn532_fw_version = -1;
  52 static int hf_pn532_fw_revision = -1;
  53 static int hf_pn532_fw_support = -1;
  54 static int hf_pn532_fw_support_rfu = -1;
  55 static int hf_pn532_fw_support_iso_018092 = -1;
  56 static int hf_pn532_fw_support_iso_iec_14443_type_b = -1;
  57 static int hf_pn532_fw_support_iso_iec_14443_type_a = -1;
  58 static int hf_pn532_14443a_uid = -1;
  59 static int hf_pn532_sam_mode = -1;
  60 static int hf_pn532_sam_timeout = -1;
  61 static int hf_pn532_sam_irq = -1;
  62 static int hf_pn532_config = -1;
  63 static int hf_pn532_config_not_used = -1;
  64 static int hf_pn532_config_auto_rfca = -1;
  65 static int hf_pn532_config_rf = -1;
  66 static int hf_pn532_config_rfu = -1;
  67 static int hf_pn532_config_atr_res_timeout = -1;
  68 static int hf_pn532_config_timeout_non_dep = -1;
  69 static int hf_pn532_config_max_rty_com = -1;
  70 static int hf_pn532_config_max_rty_atr = -1;
  71 static int hf_pn532_config_max_rty_psl = -1;
  72 static int hf_pn532_config_max_rty_passive_activation = -1;
  73 static int hf_pn532_afi = -1;
  74 static int hf_pn532_polling_method = -1;
  75 static int hf_pn532_config_ciu_rf_cfg = -1;
  76 static int hf_pn532_config_ciu_cw_gs_p = -1;
  77 static int hf_pn532_config_ciu_mod_gs_p = -1;
  78 static int hf_pn532_config_ciu_rx_threshold = -1;
  79 static int hf_pn532_config_ciu_demon_rf_on = -1;
  80 static int hf_pn532_config_ciu_demon_rf_off = -1;
  81 static int hf_pn532_config_ciu_gs_n_on = -1;
  82 static int hf_pn532_config_ciu_gs_n_off = -1;
  83 static int hf_pn532_config_ciu_mod_width = -1;
  84 static int hf_pn532_config_ciu_mif_nfc = -1;
  85 static int hf_pn532_config_ciu_tx_bit_phase = -1;
  86 static int hf_pn532_config_212_kbps = -1;
  87 static int hf_pn532_config_424_kbps = -1;
  88 static int hf_pn532_config_848_kbps = -1;
  89 static int hf_pn532_state = -1;
  90 static int hf_pn532_brit_nu_7 = -1;
  91 static int hf_pn532_brit_speed_target = -1;
  92 static int hf_pn532_brit_nu_3 = -1;
  93 static int hf_pn532_brit_speed_initiator = -1;
  94 static int hf_pn532_tg_response = -1;
  95 static int hf_pn532_initiator_command = -1;
  96 static int hf_pn532_data_in = -1;
  97 static int hf_pn532_data_out = -1;
  98 static int hf_pn532_gt = -1;
  99 static int hf_pn532_mode_nu_7 = -1;
 100 static int hf_pn532_mode_nu_3_7 = -1;
 101 static int hf_pn532_mode_picc_only = -1;
 102 static int hf_pn532_mode_dep_only = -1;
 103 static int hf_pn532_mode_passive_only = -1;
 104 static int hf_pn532_mode_mifare_parameters = -1;
 105 static int hf_pn532_mode_mifare_parameters_sens_res = -1;
 106 static int hf_pn532_mode_mifare_parameters_nfc_id_1t = -1;
 107 static int hf_pn532_mode_mifare_parameters_sel_res = -1;
 108 static int hf_pn532_mode_felica_parameters = -1;
 109 static int hf_pn532_mode_felica_parameters_nfc_id_2t = -1;
 110 static int hf_pn532_mode_felica_parameters_pad = -1;
 111 static int hf_pn532_mode_felica_parameters_system_code = -1;
 112 static int hf_pn532_mode_nfc_id_3t = -1;
 113 static int hf_pn532_mode_gt_length = -1;
 114 static int hf_pn532_mode_gt = -1;
 115 static int hf_pn532_mode_tk_length = -1;
 116 static int hf_pn532_mode_tk = -1;
 117 static int hf_pn532_mode_baudrate = -1;
 118 static int hf_pn532_mode_iso_iec_14443_4_picc = -1;
 119 static int hf_pn532_mode_dep = -1;
 120 static int hf_pn532_mode_framing_type = -1;
 121 static int hf_pn532_brit = -1;
 122 static int hf_pn532_brti = -1;
 123 static int hf_pn532_txmode_nu_7 = -1;
 124 static int hf_pn532_txmode_tx_speed = -1;
 125 static int hf_pn532_txmode_nu_2_3 = -1;
 126 static int hf_pn532_txmode_tx_framing = -1;
 127 static int hf_pn532_baudrate = -1;
 128 static int hf_pn532_flags = -1;
 129 static int hf_pn532_flags_rfu_7 = -1;
 130 static int hf_pn532_flags_remove_preamble_and_postamble = -1;
 131 static int hf_pn532_flags_iso_14443_4_picc_emulation = -1;
 132 static int hf_pn532_flags_automatic_rats = -1;
 133 static int hf_pn532_flags_rfu_3 = -1;
 134 static int hf_pn532_flags_automatic_atr_res = -1;
 135 static int hf_pn532_flags_did_used = -1;
 136 static int hf_pn532_flags_nad_used = -1;
 137 static int hf_pn532_target = -1;
 138 static int hf_pn532_wakeup_enable = -1;
 139 static int hf_pn532_generate_irq = -1;
 140 static int hf_pn532_register_address = -1;
 141 static int hf_pn532_register_value = -1;
 142 static int hf_pn532_field = -1;
 143 static int hf_pn532_brrx = -1;
 144 static int hf_pn532_brtx = -1;
 145 static int hf_pn532_type = -1;
 146 static int hf_pn532_sam_status = -1;
 147 static int hf_pn532_wakeup_enable_i2c = -1;
 148 static int hf_pn532_wakeup_enable_gpio = -1;
 149 static int hf_pn532_wakeup_enable_spi = -1;
 150 static int hf_pn532_wakeup_enable_hsu = -1;
 151 static int hf_pn532_wakeup_enable_rf_level_detector = -1;
 152 static int hf_pn532_wakeup_enable_rfu_2 = -1;
 153 static int hf_pn532_wakeup_enable_int_1 = -1;
 154 static int hf_pn532_wakeup_enable_int_0 = -1;
 155 static int hf_pn532_gpio_ioi1 = -1;
 156 static int hf_pn532_gpio_p3 = -1;
 157 static int hf_pn532_gpio_p7 = -1;
 158 static int hf_pn532_poll_number = -1;
 159 static int hf_pn532_period = -1;
 160 static int hf_pn532_autopoll_type = -1;
 161 static int hf_pn532_autopoll_type_act = -1;
 162 static int hf_pn532_autopoll_type_dep = -1;
 163 static int hf_pn532_autopoll_type_tcl = -1;
 164 static int hf_pn532_autopoll_type_mf_fe = -1;
 165 static int hf_pn532_autopoll_type_not_used = -1;
 166 static int hf_pn532_autopoll_type_baudrate_and_modulation = -1;
 167 static int hf_pn532_target_data = -1;
 168 static int hf_pn532_target_data_length = -1;
 169 static int hf_pn532_nfc_id_3i = -1;
 170 static int hf_pn532_gi = -1;
 171 static int hf_pn532_next_not_used_2_7 = -1;
 172 static int hf_pn532_next_gi = -1;
 173 static int hf_pn532_next_nfc_id_3i = -1;
 174 static int hf_pn532_nfc_id_3t = -1;
 175 static int hf_pn532_activation_baudrate = -1;
 176 static int hf_pn532_communication_mode = -1;
 177 static int hf_pn532_jump_next_not_used_3_7 = -1;
 178 static int hf_pn532_jump_next_passive_initiator_data = -1;
 179 static int hf_pn532_jump_next_gi = -1;
 180 static int hf_pn532_jump_next_nfc_id_3i = -1;
 181 static int hf_pn532_passive_initiator_data = -1;
 182 static int hf_pn532_did_target = -1;
 183 static int hf_pn532_send_bit_rate_target = -1;
 184 static int hf_pn532_receive_bit_rate_target = -1;
 185 static int hf_pn532_timeout = -1;
 186 static int hf_pn532_optional_parameters = -1;
 187 static int hf_pn532_test_number = -1;
 188 static int hf_pn532_parameters = -1;
 189 static int hf_pn532_parameters_length = -1;
 190 static int hf_pn532_sens_res = -1;
 191 static int hf_pn532_sel_res = -1;
 192 static int hf_pn532_nfc_id_length = -1;
 193 static int hf_pn532_nfc_id_1 = -1;
 194 static int hf_pn532_ats_length = -1;
 195 static int hf_pn532_ats = -1;
 196 static int hf_pn532_pol_res_length = -1;
 197 static int hf_pn532_response_code = -1;
 198 static int hf_pn532_nfc_id_2t = -1;
 199 static int hf_pn532_pad = -1;
 200 static int hf_pn532_syst_code = -1;
 201 static int hf_pn532_atqb_response = -1;
 202 static int hf_pn532_attrib_res_length = -1;
 203 static int hf_pn532_attrib_res = -1;
 204 static int hf_pn532_jewel_id = -1;
 205 static int hf_pn532_response_for = -1;
 206 static int hf_pn532_diagnose_baudrate = -1;
 207 static int hf_pn532_reply_delay = -1;
 208 static int hf_pn532_ciu_tx_mode = -1;
 209 static int hf_pn532_ciu_rx_mode = -1;
 210 static int hf_pn532_diagnose_result = -1;
 211 static int hf_pn532_diagnose_number_of_fails = -1;
 212 static int hf_pn532_andet_bot = -1;
 213 static int hf_pn532_andet_up = -1;
 214 static int hf_pn532_andet_ith = -1;
 215 static int hf_pn532_andet_en = -1;
 216
 217 static expert_field ei_unknown_data = EI_INIT;
 218 static expert_field ei_unexpected_data = EI_INIT;
 219
 220 static wmem_tree_t *command_info = NULL;
 221
 222 void proto_register_pn532(void);
 223 void proto_reg_handoff_pn532(void);
 224
 225 #define DIAGNOSE_REQ               0x00
 226 #define DIAGNOSE_RSP               0x01
 227 #define GET_FIRMWARE_VERSION_REQ   0x02
 228 #define GET_FIRMWARE_VERSION_RSP   0x03
 229 #define GET_GENERAL_STATUS_REQ     0x04
 230 #define GET_GENERAL_STATUS_RSP     0x05
 231 #define READ_REGISTER_REQ          0x06
 232 #define READ_REGISTER_RSP          0x07
 233 #define WRITE_REGISTER_REQ         0x08
 234 #define WRITE_REGISTER_RSP         0x09
 235 #define READ_GPIO_REQ              0x0C
 236 #define READ_GPIO_RSP              0x0D
 237 #define WRITE_GPIO_REQ             0x0E
 238 #define WRITE_GPIO_RSP             0x0F
 239 #define SET_SERIAL_BAUD_RATE_REQ   0x10
 240 #define SET_SERIAL_BAUD_RATE_RSP   0x11
 241 #define SET_PARAMETERS_REQ         0x12
 242 #define SET_PARAMETERS_RSP         0x13
 243 #define SAM_CONFIGURATION_REQ      0x14
 244 #define SAM_CONFIGURATION_RSP      0x15
 245 #define POWER_DOWN_REQ             0x16
 246 #define POWER_DOWN_RSP             0x17
 247 #define RF_CONFIGURATION_REQ       0x32
 248 #define RF_CONFIGURATION_RSP       0x33
 249 #define IN_DATA_EXCHANGE_REQ       0x40
 250 #define IN_DATA_EXCHANGE_RSP       0x41
 251 #define IN_COMMUNICATE_THRU_REQ    0x42
 252 #define IN_COMMUNICATE_THRU_RSP    0x43
 253 #define IN_DESELECT_REQ            0x44
 254 #define IN_DESELECT_RSP            0x45
 255 #define IN_JUMP_FOR_PSL_REQ        0x46
 256 #define IN_JUMP_FOR_PSL_RSP        0x47
 257 #define IN_LIST_PASSIVE_TARGET_REQ 0x4A
 258 #define IN_LIST_PASSIVE_TARGET_RSP 0x4B
 259 #define IN_PSL_REQ                 0x4E
 260 #define IN_PSL_RSP                 0x4F
 261 #define IN_ATR_REQ                 0x50
 262 #define IN_ATR_RSP                 0x51
 263 #define IN_RELEASE_REQ             0x52
 264 #define IN_RELEASE_RSP             0x53
 265 #define IN_SELECT_REQ              0x54
 266 #define IN_SELECT_RSP              0x55
 267 #define IN_JUMP_FOR_DEP_REQ        0x56
 268 #define IN_JUMP_FOR_DEP_RSP        0x57
 269 #define RF_REGULATION_TEST_REQ     0x58
 270 #define RF_REGULATION_TEST_RSP     0x59
 271 #define IN_AUTO_POLL_REQ           0x60
 272 #define IN_AUTO_POLL_RSP           0x61
 273 #define TG_GET_DATA_REQ            0x86
 274 #define TG_GET_DATA_RSP            0x87
 275 #define TG_GET_INITIATOR_CMD_REQ   0x88
 276 #define TG_GET_INITIATOR_CMD_RSP   0x89
 277 #define TG_GET_TARGET_STATUS_REQ   0x8A
 278 #define TG_GET_TARGET_STATUS_RSP   0x8B
 279 #define TG_INIT_AS_TARGET_REQ      0x8C
 280 #define TG_INIT_AS_TARGET_RSP      0x8D
 281 #define TG_SET_DATA_REQ            0x8E
 282 #define TG_SET_DATA_RSP            0x8F
 283 #define TG_RESP_TO_INITIATOR_REQ   0x90
 284 #define TG_RESP_TO_INITIATOR_RSP   0x91
 285 #define TG_SET_GENERAL_BYTES_REQ   0x92
 286 #define TG_SET_GENERAL_BYTES_RSP   0x93
 287 #define TG_SET_METADATA_REQ        0x94
 288 #define TG_SET_METADATA_RSP        0x95
 289
 290 /* Baud rate and modulation types */
 291 #define ISO_IEC_14443A_106         0x00
 292 #define FELICA_212                 0x01
 293 #define FELICA_424                 0x02
 294 #define ISO_IEC_14443B_106         0x03
 295 #define JEWEL_14443A_106           0x04
 296
 297
 298 /* Table of payload types - adapted from the I2C dissector */
 299 enum {
 300     SUB_DATA = 0,
 301     SUB_FELICA,
 302     SUB_MIFARE,
 303     SUB_ISO7816,
 304     SUB_MAX
 305 };
 306
 307 typedef struct command_data_t {
 308     guint32  bus_id;
 309     guint32  device_address;
 310     guint32  endpoint;
 311
 312     guint8   command;
 313     guint32  command_frame_number;
 314     guint32  response_frame_number;
 315     union {
 316         gint16  test_number;
 317         gint16  baudrate;
 318     } data;
 319 } command_data_t;
 320
 321 static dissector_handle_t sub_handles[SUB_MAX];
 322 static gint sub_selected = SUB_DATA;
 323
 324 /* Subtree handles: set by register_subtree_array */
 325 static gint ett_pn532 = -1;
 326 static gint ett_pn532_flags = -1;
 327 static gint ett_pn532_target = -1;
 328 static gint ett_pn532_fw_support = -1;
 329 static gint ett_pn532_config_212_kbps = -1;
 330 static gint ett_pn532_config_424_kbps = -1;
 331 static gint ett_pn532_config_848_kbps = -1;
 332 static gint ett_pn532_mifare_parameters = -1;
 333 static gint ett_pn532_felica_parameters = -1;
 334 static gint ett_pn532_wakeup_enable = -1;
 335 static gint ett_pn532_autopoll_type = -1;
 336
 337 /* Re-arranged from defs above to be in ascending order by value */
 338 static const value_string pn532_commands[] = {
 339     {DIAGNOSE_REQ,               "Diagnose"},
 340     {DIAGNOSE_RSP,               "Diagnose (Response)"},
 341     {GET_FIRMWARE_VERSION_REQ,   "GetFirmwareVersion"},
 342     {GET_FIRMWARE_VERSION_RSP,   "GetFirmwareVersion (Response)"},
 343     {GET_GENERAL_STATUS_REQ,     "GetGeneralStatus"},
 344     {GET_GENERAL_STATUS_RSP,     "GetGeneralStatus (Response)"},
 345     {READ_REGISTER_REQ,          "ReadRegister"},
 346     {READ_REGISTER_RSP,          "ReadRegister (Response)"},
 347     {WRITE_REGISTER_REQ,         "WriteRegister"},
 348     {WRITE_REGISTER_RSP,         "WriteRegister (Response)"},
 349     {READ_GPIO_REQ,              "ReadGPIO"},
 350     {READ_GPIO_RSP,              "ReadGPIO (Response)"},
 351     {WRITE_GPIO_REQ,             "WriteGPIO"},
 352     {WRITE_GPIO_RSP,             "WriteGPIO (Response)"},
 353     {SET_SERIAL_BAUD_RATE_REQ,   "SetSerialBaudRate"},
 354     {SET_SERIAL_BAUD_RATE_RSP,   "SetSerialBaudRate (Response)"},
 355     {SET_PARAMETERS_REQ,         "SetParameters"},
 356     {SET_PARAMETERS_RSP,         "SetParameters (Response)"},
 357     {SAM_CONFIGURATION_REQ,      "SAMConfiguration"},
 358     {SAM_CONFIGURATION_RSP,      "SAMConfiguration (Response)"},
 359     {POWER_DOWN_REQ,             "PowerDown"},
 360     {POWER_DOWN_RSP,             "PowerDown (Response)"},
 361     {RF_CONFIGURATION_REQ,       "RFConfiguration"},
 362     {RF_CONFIGURATION_RSP,       "RFConfiguration (Response)"},
 363     {IN_DATA_EXCHANGE_REQ,       "InDataExchange"},
 364     {IN_DATA_EXCHANGE_RSP,       "InDataExchange (Response)"},
 365     {IN_COMMUNICATE_THRU_REQ,    "InCommunicateThru"},
 366     {IN_COMMUNICATE_THRU_RSP,    "InCommunicateThru (Response)"},
 367     {IN_DESELECT_REQ,            "InDeselect"},
 368     {IN_DESELECT_RSP,            "InDeselect (Response)"},
 369     {IN_JUMP_FOR_PSL_REQ,        "InJumpForPSL"},
 370     {IN_JUMP_FOR_PSL_RSP,        "InJumpForPSL (Response)"},
 371     {IN_LIST_PASSIVE_TARGET_REQ, "InListPassiveTarget"},
 372     {IN_LIST_PASSIVE_TARGET_RSP, "InListPassiveTarget (Response)"},
 373     {IN_PSL_REQ,                 "InPSL"},
 374     {IN_PSL_RSP,                 "InPSL (Response)"},
 375     {IN_ATR_REQ,                 "InATR"},
 376     {IN_ATR_RSP,                 "InATR (Response)"},
 377     {IN_RELEASE_REQ,             "InRelease"},
 378     {IN_RELEASE_RSP,             "InRelease (Response)"},
 379     {IN_SELECT_REQ,              "InSelect"},
 380     {IN_SELECT_RSP,              "InSelect (Response)"},
 381     {IN_JUMP_FOR_DEP_REQ,        "InJumpForDEP"},
 382     {IN_JUMP_FOR_DEP_RSP,        "InJumpForDEP (Response)"},
 383     {RF_REGULATION_TEST_REQ,     "RFRegulationTest"},
 384     {RF_REGULATION_TEST_RSP,     "RFRegulationTest (Response)"},
 385     {IN_AUTO_POLL_REQ,           "InAutoPoll"},
 386     {IN_AUTO_POLL_RSP,           "InAutoPoll (Response)"},
 387     {TG_GET_DATA_REQ,            "TgGetData"},
 388     {TG_GET_DATA_RSP,            "TgGetData (Response)"},
 389     {TG_GET_INITIATOR_CMD_REQ,   "TgGetInitiatorCommand"},
 390     {TG_GET_INITIATOR_CMD_RSP,   "TgGetInitiatorCommand (Response)"},
 391     {TG_GET_TARGET_STATUS_REQ,   "TgGetTargetStatus"},
 392     {TG_GET_TARGET_STATUS_RSP,   "TgGetTargetStatus (Response)"},
 393     {TG_INIT_AS_TARGET_REQ,      "TgInitAsTarget"},
 394     {TG_INIT_AS_TARGET_RSP,      "TgInitAsTarget (Response)"},
 395     {TG_SET_DATA_REQ,            "TgSetData"},
 396     {TG_SET_DATA_RSP,            "TgSetData (Response)"},
 397     {TG_RESP_TO_INITIATOR_REQ,   "TgResponseToInitiator"},
 398     {TG_RESP_TO_INITIATOR_RSP,   "TgResponseToInitiator (Response)"},
 399     {TG_SET_GENERAL_BYTES_REQ,   "TgSetGeneralBytes"},
 400     {TG_SET_GENERAL_BYTES_RSP,   "TgSetGeneralBytes (Response)"},
 401     {TG_SET_METADATA_REQ,        "TgSetMetaData"},
 402     {TG_SET_METADATA_RSP,        "TgSetMetaData (Response)"},
 403     {0x00, NULL}
 404 };
 405 static value_string_ext pn532_commands_ext = VALUE_STRING_EXT_INIT(pn532_commands);
 406
 407 /* TFI - 1 byte frame identifier; specifying direction of communication */
 408 static const value_string pn532_directions[] = {
 409     {0xD4,  "Host to PN532"},
 410     {0xD5,  "PN532 to Host"},
 411     {0x00, NULL}
 412 };
 413
 414 static const value_string pn532_errors[] = {
 415     {0x00,  "No Error"},
 416     {0x01,  "Time Out"},
 417     {0x02,  "CRC Error detected by the CIU"},
 418     {0x03,  "Parity Error detected by the CIU"},
 419     {0x04,  "Erroneous Bit Count has been detected"},
 420     {0x05,  "Framing error during Mifare operation"},
 421     {0x06,  "Abnormal Bit-Collision"},
 422     {0x07,  "Communication Buffer Size Insufficient"},
 423     {0x09,  "RF Buffer overflow has been detected by the CIU"},
 424     {0x0A,  "In active communication mode, the RF field has not been switched on in time by the counterpart"},
 425     {0x0B,  "RF Protocol Error"},
 426     {0x0D,  "Temperature Error"},
 427     {0x0E,  "Internal Buffer Overflow"},
 428     {0x10,  "Invalid Parameter"},
 429     {0x12,  "The PN532 configured in target mode does not support the command received from the initiator"},
 430     {0x13,  "Invalid Data Format"},
 431     {0x14,  "Authentication Error"},
 432     {0x23,  "UID Check Byte is Wrong"},
 433     {0x25,  "Invalid Device State"},
 434     {0x26,  "Operation not allowed in this configuration"},
 435     {0x27,  "Unacceptable Command"},
 436     {0x29,  "The PN532 configured as target has been released by its initiator"},
 437     {0x2A,  "ID of the card does not match"},
 438     {0x2B,  "Card previously activated has disappeared"},
 439     {0x2C,  "Mismatch between the NFCID3 initiator and the NFCID3 target in DEP 212/424 kbps passive"},
 440     {0x2D,  "Over-current event has been detected"},
 441     {0x2E,  "NAD missing in DEP frame"},
 442     {0x00, NULL}
 443 };
 444
 445 static const value_string pn532_config_vals[] = {
 446     {0x01,  "RF Field"},
 447     {0x02,  "Various Timings"},
 448     {0x04,  "Max Rty COM"},
 449     {0x05,  "Max Retries"},
 450     {0x0A,  "Analog settings for the baudrate 106 kbps type A"},
 451     {0x0B,  "Analog settings for the baudrate 212/424 kbps"},
 452     {0x0C,  "Analog settings for the type B"},
 453     {0x0D,  "Analog settings for baudrates 212/424 and 848 kbps with ISO/IEC14443-4 protocol"},
 454     {0x00, NULL}
 455 };
 456
 457 static const value_string pn532_config_timeout_vals[] = {
 458     {0x00,  "No Timeout"},
 459     {0x01,  "100 us"},
 460     {0x02,  "200 us"},
 461     {0x03,  "400 us"},
 462     {0x04,  "800 us"},
 463     {0x05,  "1.6 ms"},
 464     {0x06,  "3.2 ms"},
 465     {0x07,  "6.4 ms"},
 466     {0x08,  "12.8 ms"},
 467     {0x09,  "25.6 ms"},
 468     {0x0A,  "51.2 ms"},
 469     {0x0B,  "102.4 ms"},
 470     {0x0C,  "204.8 ms"},
 471     {0x0D,  "409.6 ms"},
 472     {0x0E,  "819.2 ms"},
 473     {0x0F,  "1.64 sec"},
 474     {0x10,  "3.28 sec"},
 475     {0x00, NULL}
 476 };
 477
 478 static const value_string pn532_polling_method_vals[] = {
 479     {0x00,  "Timeslot Approach"},
 480     {0x01,  "Probabilistic Approach"},
 481     {0x00, NULL}
 482 };
 483
 484 /* Baud rates and modulation types */
 485 static const value_string pn532_brtypes[] = {
 486     {ISO_IEC_14443A_106,        "ISO/IEC 14443-A at 106 kbps"},
 487     {FELICA_212,                "FeliCa at 212 kbps"},
 488     {FELICA_424,                "FeliCa at 424 kbps"},
 489     {ISO_IEC_14443B_106,        "ISO/IEC 14443-B at 106 kbps"},
 490     {JEWEL_14443A_106,          "InnoVision Jewel/Topaz at 106 kbps"},
 491     {0x00, NULL}
 492 };
 493
 494 /* SAM Modes */
 495 static const value_string pn532_sam_modes[] = {
 496     {0x01,  "Normal Mode"},
 497     {0x02,  "Virtual Card Mode"},
 498     {0x03,  "Wired Card Mode"},
 499     {0x03,  "Dual Card Mode"},
 500     {0x00, NULL}
 501 };
 502
 503 static const value_string pn532_state_vals[] = {
 504     {0x00,  "TG Idle / TG Released"},
 505     {0x01,  "TG Activated"},
 506     {0x02,  "TG Deselected"},
 507     {0x80,  "PICC Released"},
 508     {0x81,  "PICC Activated"},
 509     {0x82,  "PICC Deselected"},
 510     {0x00, NULL}
 511 };
 512
 513 static const value_string pn532_speed_vals[] = {
 514     {0x00,  "106 kbps"},
 515     {0x01,  "212 kbps"},
 516     {0x02,  "424 kbps"},
 517     {0x00, NULL}
 518 };
 519
 520 static const value_string pn532_framing_type_vals[] = {
 521     {0x00,  "Mifare"},
 522     {0x01,  "Active Mode"},
 523     {0x02,  "FeliCa"},
 524     {0x00, NULL}
 525 };
 526
 527 static const value_string pn532_txspeed_vals[] = {
 528     {0x00,  "106 kbps"},
 529     {0x01,  "212 kbps"},
 530     {0x02,  "424 kbps"},
 531     {0x03,  "848 kbps"},
 532     {0x00, NULL}
 533 };
 534
 535 static const value_string pn532_txframing_vals[] = {
 536     {0x00,  "Mifare"},
 537     {0x02,  "FeliCa"},
 538     {0x00, NULL}
 539 };
 540
 541 static const value_string pn532_baudrate_vals[] = {
 542     {0x00,  "9.6 kbaud"},
 543     {0x01,  "19.2 kbaud"},
 544     {0x02,  "38.4 kbaud"},
 545     {0x03,  "57.6 kbaud"},
 546     {0x04,  "115.2 kbaud"},
 547     {0x05,  "230.4 kbaud"},
 548     {0x06,  "460.8 kbaud"},
 549     {0x07,  "921.6 kbaud"},
 550     {0x08,  "1.288 Mbaud"},
 551     {0x00, NULL}
 552 };
 553
 554 static const value_string pn532_type_vals[] = {
 555     {0x00,  "Mifare, ISO/IEC14443-3 Type A, ISO/IEC14443-3 Type B, ISO/IEC18092 passive 106 kbps"},
 556     {0x01,  "ISO/IEC18092 Active Mode"},
 557     {0x02,  "Innovision Jewel Tag"},
 558     {0x10,  "FeliCa, ISO/IEC18092 passive 212/424 kbps"},
 559     {0x00, NULL}
 560 };
 561
 562 static const value_string pn532_communication_mode_vals[] = {
 563     {0x00,  "Passive Mode"},
 564     {0x01,  "Active Mode"},
 565     {0x00, NULL}
 566 };
 567
 568 static const value_string pn532_test_number_vals[] = {
 569     {0x00,  "Communication Line Test"},
 570     {0x01,  "ROM Test"},
 571     {0x02,  "RAM Test"},
 572     {0x04,  "Polling Test to Target"},
 573     {0x05,  "Echo Back Test"},
 574     {0x06,  "Attention Request Test or ISO/IEC14443-4 card presence detection"},
 575     {0x07,  "Self Antenna Test"},
 576     {0x00, NULL}
 577 };
 578
 579 static const value_string pn532_diagnose_baudrate_vals[] = {
 580     {0x01,  "212 kbps"},
 581     {0x02,  "424 kbps"},
 582     {0x00, NULL}
 583 };
 584
 585 static void sam_timeout_base(gchar* buf, guint32 value) {
 586     if (value == 0x00) {
 587         g_snprintf(buf, ITEM_LABEL_LENGTH, "No timeout control");
 588     } else if (0x01 <= value && value <= 0x13) {
 589         g_snprintf(buf, ITEM_LABEL_LENGTH, "%u ms", value * 50);
 590     } else {
 591         g_snprintf(buf, ITEM_LABEL_LENGTH, "%u.%03u s", value * 50 / 1000, value * 50 % 1000);
 592     }
 593 }
 594
 595 static void replay_delay_base(gchar* buf, guint32 value) {
 596         g_snprintf(buf, ITEM_LABEL_LENGTH, "%u.%03u s", value * 500 / 1000, value * 500 % 1000);
 597 }
 598
 599 static gint
 600 dissect_status(proto_tree *tree, tvbuff_t *tvb, gint offset)
 601 {
 602     proto_tree_add_item(tree, hf_pn532_status_nad_present, tvb, offset, 1, ENC_BIG_ENDIAN);
 603     proto_tree_add_item(tree, hf_pn532_status_mi, tvb, offset, 1, ENC_BIG_ENDIAN);
 604     proto_tree_add_item(tree, hf_pn532_status_error_code, tvb, offset, 1, ENC_BIG_ENDIAN);
 605
 606     return offset + 1;
 607 }
 608
 609 static gint
 610 dissect_pn532(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, void *data)
 611 {
 612     proto_item *item;
 613     proto_tree *pn532_tree;
 614     proto_item *sub_item;
 615     proto_tree *sub_tree;
 616     proto_item *next_item;
 617     proto_tree *next_tree;
 618     guint8      cmd;
 619     guint8      config;
 620     gint16      baudrate;
 621     gint16      test_number;
 622     guint8      length;
 623     guint8      value;
 624     guint8      type;
 625     guint8      item_value;
 626     tvbuff_t   *next_tvb;
 627     gint        offset = 0;
 628     command_data_t  *command_data = NULL;
 629     usb_conv_info_t *usb_conv_info;
 630     wmem_tree_key_t  key[5];
 631     guint32          bus_id;
 632     guint32          device_address;
 633     guint32          endpoint;
 634     guint32          k_bus_id;
 635     guint32          k_device_address;
 636     guint32          k_endpoint;
 637     guint32          k_frame_number;
 638
 639     /* Reject the packet if data is NULL */
 640     if (data == NULL)
 641         return 0;
 642     usb_conv_info = (usb_conv_info_t *)data;
 643
 644     col_set_str(pinfo->cinfo, COL_PROTOCOL, "PN532");
 645
 646     item = proto_tree_add_item(tree, proto_pn532, tvb, 0, -1, ENC_NA);
 647     pn532_tree = proto_item_add_subtree(item, ett_pn532);
 648
 649     proto_tree_add_item(pn532_tree, hf_pn532_direction, tvb, offset, 1, ENC_NA);
 650     offset += 1;
 651
 652     proto_tree_add_item(pn532_tree, hf_pn532_command, tvb, offset, 1, ENC_NA);
 653     cmd = tvb_get_guint8(tvb, offset);
 654     offset += 1;
 655
 656     col_set_str(pinfo->cinfo, COL_INFO, val_to_str_ext_const(cmd, &pn532_commands_ext, "Unknown command"));
 657
 658     bus_id = usb_conv_info->bus_id;
 659     device_address = usb_conv_info->device_address;
 660     endpoint = usb_conv_info->endpoint;
 661
 662     k_bus_id          = bus_id;
 663     k_device_address  = device_address;
 664     k_endpoint        = endpoint;
 665     k_frame_number    = pinfo->fd->num;
 666
 667     key[0].length = 1;
 668     key[0].key = &k_bus_id;
 669     key[1].length = 1;
 670     key[1].key = &k_device_address;
 671     key[2].length = 1;
 672     key[2].key = &k_endpoint;
 673     key[3].length = 1;
 674     key[3].key = &k_frame_number;
 675     key[4].length = 0;
 676     key[4].key = NULL;
 677
 678     if (!pinfo->fd->flags.visited && !(cmd & 0x01)) {
 679         command_data = wmem_new(wmem_file_scope(), command_data_t);
 680         command_data->bus_id = bus_id;
 681         command_data->device_address = device_address;
 682         command_data->endpoint = endpoint;
 683
 684         command_data->command = cmd;
 685         command_data->command_frame_number = pinfo->fd->num;
 686         command_data->response_frame_number = 0;
 687
 688         wmem_tree_insert32_array(command_info, key, command_data);
 689
 690         k_bus_id          = bus_id;
 691         k_device_address  = device_address;
 692         k_endpoint        = endpoint;
 693         k_frame_number    = pinfo->fd->num;
 694
 695         key[0].length = 1;
 696         key[0].key = &k_bus_id;
 697         key[1].length = 1;
 698         key[1].key = &k_device_address;
 699         key[2].length = 1;
 700         key[2].key = &k_endpoint;
 701         key[3].length = 1;
 702         key[3].key = &k_frame_number;
 703         key[4].length = 0;
 704         key[4].key = NULL;
 705     }
 706
 707     if (cmd & 0x01) {
 708         wmem_tree_t  *wmem_tree;
 709
 710         key[3].length = 0;
 711         key[3].key = NULL;
 712
 713         wmem_tree = (wmem_tree_t *) wmem_tree_lookup32_array(command_info, key);
 714         if (wmem_tree) {
 715             command_data = (command_data_t *) wmem_tree_lookup32_le(wmem_tree, pinfo->fd->num);
 716
 717             if (command_data && (command_data->response_frame_number == 0 ||
 718                     command_data->response_frame_number == pinfo->fd->num)) {
 719
 720                 if (!pinfo->fd->flags.visited && command_data->response_frame_number == 0) {
 721                     command_data->response_frame_number = pinfo->fd->num;
 722                 }
 723
 724             }
 725         }
 726
 727         if (command_data) {
 728             sub_item = proto_tree_add_uint(pn532_tree, hf_pn532_response_for, tvb, offset, tvb_captured_length_remaining(tvb, offset), command_data->command_frame_number);
 729             PROTO_ITEM_SET_GENERATED(sub_item);
 730         }
 731     }
 732
 733     switch (cmd) {
 734
 735     case DIAGNOSE_REQ:
 736         proto_tree_add_item(pn532_tree, hf_pn532_test_number, tvb, offset, 1, ENC_NA);
 737         test_number = tvb_get_guint8(tvb, offset);
 738         offset += 1;
 739
 740         if (command_data)
 741             command_data->data.test_number = test_number;
 742
 743         proto_tree_add_item(pn532_tree, hf_pn532_parameters_length, tvb, offset, 1, ENC_NA);
 744         length = tvb_get_guint8(tvb, offset);
 745         offset += 1;
 746
 747         switch (test_number) {
 748         case 0x00:
 749             proto_tree_add_item(pn532_tree, hf_pn532_data_in, tvb, offset, length, ENC_NA);
 750             offset += length;
 751             break;
 752         case 0x04:
 753             proto_tree_add_item(pn532_tree, hf_pn532_diagnose_baudrate, tvb, offset, 1, ENC_NA);
 754             offset += 1;
 755             break;
 756         case 0x05:
 757             proto_tree_add_item(pn532_tree, hf_pn532_reply_delay, tvb, offset, 1, ENC_NA);
 758             offset += 1;
 759
 760             proto_tree_add_item(pn532_tree, hf_pn532_ciu_tx_mode, tvb, offset, 1, ENC_NA);
 761             offset += 1;
 762
 763             proto_tree_add_item(pn532_tree, hf_pn532_ciu_rx_mode, tvb, offset, 1, ENC_NA);
 764             offset += 1;
 765             break;
 766         case 0x07:
 767             proto_tree_add_item(pn532_tree, hf_pn532_andet_bot, tvb, offset, 1, ENC_NA);
 768             proto_tree_add_item(pn532_tree, hf_pn532_andet_up,  tvb, offset, 1, ENC_NA);
 769             proto_tree_add_item(pn532_tree, hf_pn532_andet_ith, tvb, offset, 1, ENC_NA);
 770             proto_tree_add_item(pn532_tree, hf_pn532_andet_en,  tvb, offset, 1, ENC_NA);
 771             offset += 1;
 772             break;
 773         case 0x01:
 774         case 0x02:
 775         case 0x06:
 776             /* No parameters */
 777             break;
 778
 779         default:
 780             proto_tree_add_item(pn532_tree, hf_pn532_parameters, tvb, offset, tvb_captured_length_remaining(tvb, offset), ENC_NA);
 781             offset += tvb_captured_length_remaining(tvb, offset);
 782         }
 783         break;
 784
 785     case DIAGNOSE_RSP:
 786         if (command_data && command_data->command == DIAGNOSE_REQ)
 787             test_number = command_data->data.test_number;
 788         else
 789             test_number = -1; /* Force unknown test_numer */
 790
 791         if (tvb_reported_length_remaining(tvb, offset) >= 1) {
 792             proto_tree_add_item(pn532_tree, hf_pn532_parameters_length, tvb, offset, 1, ENC_NA);
 793             offset += 1;
 794
 795             switch (test_number) {
 796             case 0x00:
 797                 proto_tree_add_item(pn532_tree, hf_pn532_test_number, tvb, offset, 1, ENC_NA);
 798                 offset += 1;
 799
 800                 proto_tree_add_item(pn532_tree, hf_pn532_parameters_length, tvb, offset, 1, ENC_NA);
 801                 length = tvb_captured_length_remaining(tvb, offset);
 802                 offset += 1;
 803
 804                 proto_tree_add_item(pn532_tree, hf_pn532_data_out, tvb, offset, length, ENC_NA);
 805                 offset += length;
 806                 break;
 807             case 0x01:
 808             case 0x02:
 809             case 0x06:
 810             case 0x07:
 811                 proto_tree_add_item(pn532_tree, hf_pn532_diagnose_result, tvb, offset, 1, ENC_NA);
 812                 offset += 1;
 813                 break;
 814             case 0x04:
 815                 proto_tree_add_item(pn532_tree, hf_pn532_diagnose_number_of_fails, tvb, offset, 1, ENC_NA);
 816                 offset += 1;
 817                 break;
 818             case 0x05:
 819                 /* Not possible; test 0x05 runs infinitely */
 820                 break;
 821             default:
 822                 proto_tree_add_item(pn532_tree, hf_pn532_parameters, tvb, offset, tvb_captured_length_remaining(tvb, offset), ENC_NA);
 823                 offset += tvb_captured_length_remaining(tvb, offset);
 824             }
 825         }
 826         break;
 827
 828     case GET_FIRMWARE_VERSION_REQ:
 829         /* No parameters */
 830         break;
 831
 832     case GET_FIRMWARE_VERSION_RSP:
 833         proto_tree_add_item(pn532_tree, hf_pn532_ic_version, tvb, offset, 1, ENC_NA);
 834         offset += 1;
 835
 836         proto_tree_add_item(pn532_tree, hf_pn532_fw_version, tvb, offset, 1, ENC_NA);
 837         offset += 1;
 838
 839         proto_tree_add_item(pn532_tree, hf_pn532_fw_revision, tvb, offset, 1, ENC_NA);
 840         offset += 1;
 841
 842         sub_item = proto_tree_add_item(pn532_tree, hf_pn532_fw_support, tvb, offset, 1, ENC_NA);
 843         sub_tree = proto_item_add_subtree(sub_item, ett_pn532_fw_support);
 844         proto_tree_add_item(sub_tree, hf_pn532_fw_support_rfu, tvb, offset, 1, ENC_NA);
 845         proto_tree_add_item(sub_tree, hf_pn532_fw_support_iso_018092, tvb, offset, 1, ENC_NA);
 846         proto_tree_add_item(sub_tree, hf_pn532_fw_support_iso_iec_14443_type_b, tvb, offset, 1, ENC_NA);
 847         proto_tree_add_item(sub_tree, hf_pn532_fw_support_iso_iec_14443_type_a, tvb, offset, 1, ENC_NA);
 848         offset += 1;
 849         break;
 850
 851     case GET_GENERAL_STATUS_REQ:
 852         /* No parameters */
 853         break;
 854
 855     case GET_GENERAL_STATUS_RSP:
 856         proto_tree_add_item(pn532_tree, hf_pn532_error, tvb, offset, 1, ENC_BIG_ENDIAN);
 857         offset += 1;
 858
 859         proto_tree_add_item(pn532_tree, hf_pn532_field, tvb, offset, 1, ENC_BIG_ENDIAN);
 860         offset += 1;
 861
 862         proto_tree_add_item(pn532_tree, hf_pn532_NbTg, tvb, offset, 1, ENC_BIG_ENDIAN);
 863         value = tvb_get_guint8(tvb, offset);
 864         offset += 1;
 865
 866         for (item_value = 1; item_value <= value; item_value += 1) {
 867             sub_item = proto_tree_add_item(pn532_tree, hf_pn532_target, tvb, offset, 4, ENC_NA);
 868             sub_tree = proto_item_add_subtree(sub_item, ett_pn532_target);
 869             proto_item_append_text(sub_item, " %u/%u", item_value, value);
 870
 871             proto_tree_add_item(sub_tree, hf_pn532_Tg, tvb, offset, 1, ENC_BIG_ENDIAN);
 872             offset += 1;
 873
 874             proto_tree_add_item(sub_tree, hf_pn532_brrx, tvb, offset, 1, ENC_BIG_ENDIAN);
 875             offset += 1;
 876
 877             proto_tree_add_item(sub_tree, hf_pn532_brtx, tvb, offset, 1, ENC_BIG_ENDIAN);
 878             offset += 1;
 879
 880             proto_tree_add_item(sub_tree, hf_pn532_type, tvb, offset, 1, ENC_BIG_ENDIAN);
 881             offset += 1;
 882         }
 883
 884         proto_tree_add_item(pn532_tree, hf_pn532_sam_status, tvb, offset, 1, ENC_BIG_ENDIAN);
 885         offset += 1;
 886
 887         break;
 888
 889     case READ_REGISTER_REQ:
 890         while (tvb_reported_length_remaining(tvb, offset) >= 2) {
 891             proto_tree_add_item(pn532_tree, hf_pn532_register_address, tvb, offset, 2, ENC_BIG_ENDIAN);
 892             offset += 2;
 893         }
 894         break;
 895
 896     case READ_REGISTER_RSP:
 897         while (tvb_reported_length_remaining(tvb, offset) >= 1) {
 898             proto_tree_add_item(pn532_tree, hf_pn532_register_value, tvb, offset, 1, ENC_BIG_ENDIAN);
 899             offset += 1;
 900         }
 901         break;
 902
 903     case WRITE_REGISTER_REQ:
 904         while (tvb_reported_length_remaining(tvb, offset) >= 3) {
 905             proto_tree_add_item(pn532_tree, hf_pn532_register_address, tvb, offset, 2, ENC_BIG_ENDIAN);
 906             offset += 2;
 907
 908             proto_tree_add_item(pn532_tree, hf_pn532_register_value, tvb, offset, 1, ENC_BIG_ENDIAN);
 909             offset += 1;
 910         }
 911         break;
 912
 913     case WRITE_REGISTER_RSP:
 914         /* No parameters */
 915         break;
 916
 917     case READ_GPIO_REQ:
 918         /* No parameters */
 919         break;
 920
 921     case READ_GPIO_RSP:
 922         proto_tree_add_item(pn532_tree, hf_pn532_gpio_p3, tvb, offset, 1, ENC_BIG_ENDIAN);
 923         offset += 1;
 924
 925         proto_tree_add_item(pn532_tree, hf_pn532_gpio_p7, tvb, offset, 1, ENC_BIG_ENDIAN);
 926         offset += 1;
 927
 928         proto_tree_add_item(pn532_tree, hf_pn532_gpio_ioi1, tvb, offset, 1, ENC_BIG_ENDIAN);
 929         offset += 1;
 930         break;
 931
 932     case WRITE_GPIO_REQ:
 933         proto_tree_add_item(pn532_tree, hf_pn532_gpio_p3, tvb, offset, 1, ENC_BIG_ENDIAN);
 934         offset += 1;
 935
 936         proto_tree_add_item(pn532_tree, hf_pn532_gpio_p7, tvb, offset, 1, ENC_BIG_ENDIAN);
 937         offset += 1;
 938         break;
 939
 940     case WRITE_GPIO_RSP:
 941         /* No parameters */
 942         break;
 943
 944     case SET_SERIAL_BAUD_RATE_REQ:
 945         proto_tree_add_item(pn532_tree, hf_pn532_baudrate, tvb, offset, 1, ENC_BIG_ENDIAN);
 946         offset += 1;
 947         break;
 948
 949     case SET_SERIAL_BAUD_RATE_RSP:
 950         /* No parameters */
 951         break;
 952
 953     case SET_PARAMETERS_REQ:
 954         sub_item = proto_tree_add_item(pn532_tree, hf_pn532_flags, tvb, offset, 1, ENC_NA);
 955         sub_tree = proto_item_add_subtree(sub_item, ett_pn532_flags);
 956
 957         proto_tree_add_item(sub_tree, hf_pn532_flags_rfu_7, tvb, offset, 1, ENC_BIG_ENDIAN);
 958         proto_tree_add_item(sub_tree, hf_pn532_flags_remove_preamble_and_postamble, tvb, offset, 1, ENC_BIG_ENDIAN);
 959         proto_tree_add_item(sub_tree, hf_pn532_flags_iso_14443_4_picc_emulation, tvb, offset, 1, ENC_BIG_ENDIAN);
 960         proto_tree_add_item(sub_tree, hf_pn532_flags_automatic_rats, tvb, offset, 1, ENC_BIG_ENDIAN);
 961         proto_tree_add_item(sub_tree, hf_pn532_flags_rfu_3, tvb, offset, 1, ENC_BIG_ENDIAN);
 962         proto_tree_add_item(sub_tree, hf_pn532_flags_automatic_atr_res, tvb, offset, 1, ENC_BIG_ENDIAN);
 963         proto_tree_add_item(sub_tree, hf_pn532_flags_did_used, tvb, offset, 1, ENC_BIG_ENDIAN);
 964         proto_tree_add_item(sub_tree, hf_pn532_flags_nad_used, tvb, offset, 1, ENC_BIG_ENDIAN);
 965         offset += 1;
 966         break;
 967
 968     case SET_PARAMETERS_RSP:
 969         /* No parameters */
 970         break;
 971
 972     case SAM_CONFIGURATION_REQ: /* Secure Application/Security Access Module Configuration Request */
 973         proto_tree_add_item(pn532_tree, hf_pn532_sam_mode, tvb, offset, 1, ENC_BIG_ENDIAN);
 974         offset += 1;
 975
 976         proto_tree_add_item(pn532_tree, hf_pn532_sam_timeout, tvb, offset, 1, ENC_BIG_ENDIAN);
 977         offset += 1;
 978
 979         if (tvb_reported_length_remaining(tvb, offset) >= 1) {
 980             proto_tree_add_item(pn532_tree, hf_pn532_sam_irq, tvb, offset, 1, ENC_BIG_ENDIAN);
 981             offset += 1;
 982         }
 983         break;
 984
 985     case SAM_CONFIGURATION_RSP:
 986         /* No parameters */
 987         break;
 988
 989     case POWER_DOWN_REQ:
 990         sub_item = proto_tree_add_item(pn532_tree, hf_pn532_wakeup_enable, tvb, offset, 1, ENC_NA);
 991         sub_tree = proto_item_add_subtree(sub_item, ett_pn532_wakeup_enable);
 992
 993         proto_tree_add_item(sub_tree, hf_pn532_wakeup_enable_i2c, tvb, offset, 1, ENC_BIG_ENDIAN);
 994         proto_tree_add_item(sub_tree, hf_pn532_wakeup_enable_gpio, tvb, offset, 1, ENC_BIG_ENDIAN);
 995         proto_tree_add_item(sub_tree, hf_pn532_wakeup_enable_spi, tvb, offset, 1, ENC_BIG_ENDIAN);
 996         proto_tree_add_item(sub_tree, hf_pn532_wakeup_enable_hsu, tvb, offset, 1, ENC_BIG_ENDIAN);
 997         proto_tree_add_item(sub_tree, hf_pn532_wakeup_enable_rf_level_detector, tvb, offset, 1, ENC_BIG_ENDIAN);
 998         proto_tree_add_item(sub_tree, hf_pn532_wakeup_enable_rfu_2, tvb, offset, 1, ENC_BIG_ENDIAN);
 999         proto_tree_add_item(sub_tree, hf_pn532_wakeup_enable_int_1, tvb, offset, 1, ENC_BIG_ENDIAN);
1000         proto_tree_add_item(sub_tree, hf_pn532_wakeup_enable_int_0, tvb, offset, 1, ENC_BIG_ENDIAN);
1001         offset += 1;
1002
1003         if (tvb_reported_length_remaining(tvb, offset) >= 1) {
1004             proto_tree_add_item(pn532_tree, hf_pn532_generate_irq, tvb, offset, 1, ENC_BIG_ENDIAN);
1005             offset += 1;
1006         }
1007         break;
1008
1009     case POWER_DOWN_RSP:
1010         offset = dissect_status(pn532_tree, tvb, offset);
1011         break;
1012
1013     case RF_CONFIGURATION_REQ:
1014         proto_tree_add_item(pn532_tree, hf_pn532_config, tvb, offset, 1, ENC_BIG_ENDIAN);
1015         config = tvb_get_guint8(tvb, offset);
1016         offset += 1;
1017
1018         switch(config) {
1019         case 0x01:
1020             proto_tree_add_item(pn532_tree, hf_pn532_config_not_used, tvb, offset, 1, ENC_BIG_ENDIAN);
1021             proto_tree_add_item(pn532_tree, hf_pn532_config_auto_rfca, tvb, offset, 1, ENC_BIG_ENDIAN);
1022             proto_tree_add_item(pn532_tree, hf_pn532_config_rf, tvb, offset, 1, ENC_BIG_ENDIAN);
1023             offset += 1;
1024             break;
1025         case 0x02:
1026             proto_tree_add_item(pn532_tree, hf_pn532_config_rfu, tvb, offset, 1, ENC_BIG_ENDIAN);
1027             offset += 1;
1028
1029             proto_tree_add_item(pn532_tree, hf_pn532_config_atr_res_timeout, tvb, offset, 1, ENC_BIG_ENDIAN);
1030             offset += 1;
1031
1032             proto_tree_add_item(pn532_tree, hf_pn532_config_timeout_non_dep, tvb, offset, 1, ENC_BIG_ENDIAN);
1033             offset += 1;
1034             break;
1035         case 0x04:
1036             proto_tree_add_item(pn532_tree, hf_pn532_config_max_rty_com, tvb, offset, 1, ENC_BIG_ENDIAN);
1037             offset += 1;
1038             break;
1039         case 0x05:
1040             proto_tree_add_item(pn532_tree, hf_pn532_config_max_rty_atr, tvb, offset, 1, ENC_BIG_ENDIAN);
1041             offset += 1;
1042
1043             proto_tree_add_item(pn532_tree, hf_pn532_config_max_rty_psl, tvb, offset, 1, ENC_BIG_ENDIAN);
1044             offset += 1;
1045
1046             proto_tree_add_item(pn532_tree, hf_pn532_config_max_rty_passive_activation, tvb, offset, 1, ENC_BIG_ENDIAN);
1047             offset += 1;
1048             break;
1049         case 0x0A:
1050         case 0x0B:
1051             proto_tree_add_item(pn532_tree, hf_pn532_config_ciu_rf_cfg, tvb, offset, 1, ENC_BIG_ENDIAN);
1052             offset += 1;
1053
1054             proto_tree_add_item(pn532_tree, hf_pn532_config_ciu_gs_n_on, tvb, offset, 1, ENC_BIG_ENDIAN);
1055             offset += 1;
1056
1057             proto_tree_add_item(pn532_tree, hf_pn532_config_ciu_cw_gs_p, tvb, offset, 1, ENC_BIG_ENDIAN);
1058             offset += 1;
1059
1060             proto_tree_add_item(pn532_tree, hf_pn532_config_ciu_mod_gs_p, tvb, offset, 1, ENC_BIG_ENDIAN);
1061             offset += 1;
1062
1063             proto_tree_add_item(pn532_tree, hf_pn532_config_ciu_demon_rf_on, tvb, offset, 1, ENC_BIG_ENDIAN);
1064             offset += 1;
1065
1066             proto_tree_add_item(pn532_tree, hf_pn532_config_ciu_rx_threshold, tvb, offset, 1, ENC_BIG_ENDIAN);
1067             offset += 1;
1068
1069             proto_tree_add_item(pn532_tree, hf_pn532_config_ciu_demon_rf_off, tvb, offset, 1, ENC_BIG_ENDIAN);
1070             offset += 1;
1071
1072             proto_tree_add_item(pn532_tree, hf_pn532_config_ciu_gs_n_off, tvb, offset, 1, ENC_BIG_ENDIAN);
1073             offset += 1;
1074
1075             if (config == 0x0A) {
1076                 proto_tree_add_item(pn532_tree, hf_pn532_config_ciu_mod_width, tvb, offset, 1, ENC_BIG_ENDIAN);
1077                 offset += 1;
1078
1079                 proto_tree_add_item(pn532_tree, hf_pn532_config_ciu_mif_nfc, tvb, offset, 1, ENC_BIG_ENDIAN);
1080                 offset += 1;
1081
1082                 proto_tree_add_item(pn532_tree, hf_pn532_config_ciu_tx_bit_phase, tvb, offset, 1, ENC_BIG_ENDIAN);
1083                 offset += 1;
1084             }
1085             break;
1086         case 0x0C:
1087             proto_tree_add_item(pn532_tree, hf_pn532_config_ciu_gs_n_on, tvb, offset, 1, ENC_BIG_ENDIAN);
1088             offset += 1;
1089
1090             proto_tree_add_item(pn532_tree, hf_pn532_config_ciu_mod_gs_p, tvb, offset, 1, ENC_BIG_ENDIAN);
1091             offset += 1;
1092
1093             proto_tree_add_item(pn532_tree, hf_pn532_config_ciu_rx_threshold, tvb, offset, 1, ENC_BIG_ENDIAN);
1094             offset += 1;
1095             break;
1096         case 0x0D:
1097             sub_item = proto_tree_add_item(pn532_tree, hf_pn532_config_212_kbps, tvb, offset, 3, ENC_NA);
1098             sub_tree = proto_item_add_subtree(sub_item, ett_pn532_config_212_kbps);
1099
1100             proto_tree_add_item(sub_tree, hf_pn532_config_ciu_rx_threshold, tvb, offset, 1, ENC_BIG_ENDIAN);
1101             offset += 1;
1102
1103             proto_tree_add_item(sub_tree, hf_pn532_config_ciu_mod_width, tvb, offset, 1, ENC_BIG_ENDIAN);
1104             offset += 1;
1105
1106             proto_tree_add_item(sub_tree, hf_pn532_config_ciu_mif_nfc, tvb, offset, 1, ENC_BIG_ENDIAN);
1107             offset += 1;
1108
1109             sub_item = proto_tree_add_item(pn532_tree, hf_pn532_config_424_kbps, tvb, offset, 3, ENC_BIG_ENDIAN);
1110             sub_tree = proto_item_add_subtree(sub_item, ett_pn532_config_424_kbps);
1111
1112             proto_tree_add_item(sub_tree, hf_pn532_config_ciu_rx_threshold, tvb, offset, 1, ENC_BIG_ENDIAN);
1113             offset += 1;
1114
1115             proto_tree_add_item(sub_tree, hf_pn532_config_ciu_mod_width, tvb, offset, 1, ENC_BIG_ENDIAN);
1116             offset += 1;
1117
1118             proto_tree_add_item(sub_tree, hf_pn532_config_ciu_mif_nfc, tvb, offset, 1, ENC_BIG_ENDIAN);
1119             offset += 1;
1120
1121             sub_item = proto_tree_add_item(pn532_tree, hf_pn532_config_848_kbps, tvb, offset, 3, ENC_BIG_ENDIAN);
1122             sub_tree = proto_item_add_subtree(sub_item, ett_pn532_config_848_kbps);
1123
1124             proto_tree_add_item(sub_tree, hf_pn532_config_ciu_rx_threshold, tvb, offset, 1, ENC_BIG_ENDIAN);
1125             offset += 1;
1126
1127             proto_tree_add_item(sub_tree, hf_pn532_config_ciu_mod_width, tvb, offset, 1, ENC_BIG_ENDIAN);
1128             offset += 1;
1129
1130             proto_tree_add_item(sub_tree, hf_pn532_config_ciu_mif_nfc, tvb, offset, 1, ENC_BIG_ENDIAN);
1131             offset += 1;
1132             break;
1133         default:
1134             proto_tree_add_expert(pn532_tree, pinfo, &ei_unknown_data, tvb, offset, tvb_captured_length_remaining(tvb, offset));
1135             offset += tvb_captured_length_remaining(tvb, offset);
1136         }
1137         break;
1138
1139     case RF_CONFIGURATION_RSP:
1140         /* No parameters */
1141         break;
1142
1143     case RF_REGULATION_TEST_REQ:
1144         proto_tree_add_item(pn532_tree, hf_pn532_txmode_nu_7, tvb, offset, 1, ENC_BIG_ENDIAN);
1145         proto_tree_add_item(pn532_tree, hf_pn532_txmode_tx_speed, tvb, offset, 1, ENC_BIG_ENDIAN);
1146         proto_tree_add_item(pn532_tree, hf_pn532_txmode_nu_2_3, tvb, offset, 1, ENC_BIG_ENDIAN);
1147         proto_tree_add_item(pn532_tree, hf_pn532_txmode_tx_framing, tvb, offset, 1, ENC_BIG_ENDIAN);
1148         offset += 1;
1149         break;
1150
1151     case RF_REGULATION_TEST_RSP:
1152         /* This should never happend */
1153         break;
1154
1155     case IN_JUMP_FOR_DEP_REQ:
1156     case IN_JUMP_FOR_PSL_REQ:
1157         proto_tree_add_item(pn532_tree, hf_pn532_communication_mode, tvb, offset, 1, ENC_BIG_ENDIAN);
1158         offset += 1;
1159
1160         proto_tree_add_item(pn532_tree, hf_pn532_activation_baudrate, tvb, offset, 1, ENC_BIG_ENDIAN);
1161         baudrate = tvb_get_guint8(tvb, offset);
1162         offset += 1;
1163
1164         proto_tree_add_item(pn532_tree, hf_pn532_jump_next_not_used_3_7, tvb, offset, 1, ENC_BIG_ENDIAN);
1165         proto_tree_add_item(pn532_tree, hf_pn532_jump_next_passive_initiator_data, tvb, offset, 1, ENC_BIG_ENDIAN);
1166         proto_tree_add_item(pn532_tree, hf_pn532_jump_next_gi, tvb, offset, 1, ENC_BIG_ENDIAN);
1167         proto_tree_add_item(pn532_tree, hf_pn532_jump_next_nfc_id_3i, tvb, offset, 1, ENC_BIG_ENDIAN);
1168         value = tvb_get_guint8(tvb, offset);
1169         offset += 1;
1170
1171         if (value & 0x01) {
1172             if (baudrate == 0x00) {
1173                 proto_tree_add_item(pn532_tree, hf_pn532_passive_initiator_data, tvb, offset, 4, ENC_NA);
1174                 offset += 4;
1175             } else {
1176                 proto_tree_add_item(pn532_tree, hf_pn532_passive_initiator_data, tvb, offset, 5, ENC_NA);
1177                 offset += 5;
1178             }
1179         }
1180
1181         if (value & 0x02) {
1182             proto_tree_add_item(pn532_tree, hf_pn532_nfc_id_3i, tvb, offset, 10, ENC_NA);
1183             offset += 10;
1184         }
1185
1186         if (value & 0x04) {
1187             proto_tree_add_item(pn532_tree, hf_pn532_gi, tvb, offset, tvb_captured_length_remaining(tvb, offset), ENC_NA);
1188             offset += tvb_captured_length_remaining(tvb, offset);
1189         }
1190         break;
1191
1192     case IN_JUMP_FOR_DEP_RSP:
1193     case IN_JUMP_FOR_PSL_RSP:
1194         offset = dissect_status(pn532_tree, tvb, offset);
1195
1196         proto_tree_add_item(pn532_tree, hf_pn532_Tg, tvb, offset, 1, ENC_BIG_ENDIAN);
1197         offset += 1;
1198
1199         proto_tree_add_item(pn532_tree, hf_pn532_nfc_id_3t, tvb, offset, 10, ENC_NA);
1200         offset += 10;
1201
1202         proto_tree_add_item(pn532_tree, hf_pn532_did_target, tvb, offset, 1, ENC_BIG_ENDIAN);
1203         offset += 1;
1204
1205         proto_tree_add_item(pn532_tree, hf_pn532_send_bit_rate_target, tvb, offset, 1, ENC_BIG_ENDIAN);
1206         offset += 1;
1207
1208         proto_tree_add_item(pn532_tree, hf_pn532_receive_bit_rate_target, tvb, offset, 1, ENC_BIG_ENDIAN);
1209         offset += 1;
1210
1211         proto_tree_add_item(pn532_tree, hf_pn532_timeout, tvb, offset, 1, ENC_BIG_ENDIAN);
1212         offset += 1;
1213
1214         proto_tree_add_item(pn532_tree, hf_pn532_optional_parameters, tvb, offset, 1, ENC_BIG_ENDIAN);
1215         offset += 1;
1216
1217         proto_tree_add_item(pn532_tree, hf_pn532_gt, tvb, offset, 10, ENC_NA);
1218         offset += 10;
1219         break;
1220
1221     case IN_LIST_PASSIVE_TARGET_REQ:
1222
1223         proto_tree_add_item(pn532_tree, hf_pn532_MaxTg, tvb, offset, 1, ENC_BIG_ENDIAN);
1224         offset += 1;
1225
1226         proto_tree_add_item(pn532_tree, hf_pn532_BrTy, tvb, offset, 1, ENC_BIG_ENDIAN);
1227         baudrate = tvb_get_guint8(tvb, offset);
1228         offset += 1;
1229
1230         if (command_data)
1231             command_data->data.baudrate = baudrate;
1232
1233         switch(baudrate) {
1234         case ISO_IEC_14443A_106:
1235             while (tvb_reported_length_remaining(tvb, offset) >= 4) {
1236                 proto_tree_add_item(pn532_tree, hf_pn532_14443a_uid, tvb, 6, 4, ENC_BIG_ENDIAN);
1237                 offset += 4;
1238             }
1239             break;
1240         case FELICA_212:
1241         case FELICA_424:
1242             next_tvb = tvb_new_subset_length(tvb, offset, 5);
1243             call_dissector(sub_handles[SUB_FELICA], next_tvb, pinfo, tree);
1244             offset += 5;
1245             break;
1246
1247         case ISO_IEC_14443B_106:
1248             proto_tree_add_item(pn532_tree, hf_pn532_afi, tvb, offset, 1, ENC_BIG_ENDIAN);
1249             offset += 1;
1250
1251             if (tvb_reported_length_remaining(tvb, offset) >= 1) {
1252                 proto_tree_add_item(pn532_tree, hf_pn532_polling_method, tvb, offset, 1, ENC_BIG_ENDIAN);
1253                 offset += 1;
1254             }
1255             break;
1256         case JEWEL_14443A_106:
1257             /* No parameter */
1258             break;
1259         }
1260         break;
1261
1262     case IN_LIST_PASSIVE_TARGET_RSP:
1263         proto_tree_add_item(pn532_tree, hf_pn532_NbTg, tvb, offset, 1, ENC_BIG_ENDIAN);
1264         value = tvb_get_guint8(tvb, offset);
1265         offset += 1;
1266
1267         if (command_data  && command_data->command == IN_LIST_PASSIVE_TARGET_REQ)
1268             baudrate = command_data->data.baudrate;
1269         else
1270             baudrate = -1; /* Force unknown baudrate... */
1271
1272         sub_item = proto_tree_add_uint(pn532_tree, hf_pn532_BrTy, tvb, offset, tvb_captured_length_remaining(tvb, offset), baudrate);
1273         PROTO_ITEM_SET_GENERATED(sub_item);
1274
1275         for (item_value = 1; item_value <= value; item_value += 1) {
1276             sub_item = proto_tree_add_item(pn532_tree, hf_pn532_target, tvb, offset, tvb_captured_length_remaining(tvb, offset), ENC_NA);
1277             sub_tree = proto_item_add_subtree(sub_item, ett_pn532_target);
1278             proto_item_append_text(sub_item, " %u/%u", item_value, value);
1279
1280             proto_tree_add_item(sub_tree, hf_pn532_Tg, tvb, offset, 1, ENC_BIG_ENDIAN);
1281             offset += 1;
1282
1283             switch (baudrate) {
1284             case ISO_IEC_14443A_106:
1285                 proto_tree_add_item(sub_tree, hf_pn532_sens_res, tvb, offset, 2, ENC_BIG_ENDIAN);
1286                 offset += 2;
1287
1288                 proto_tree_add_item(sub_tree, hf_pn532_sel_res, tvb, offset, 1, ENC_BIG_ENDIAN);
1289                 offset += 1;
1290
1291                 proto_tree_add_item(sub_tree, hf_pn532_nfc_id_length, tvb, offset, 1, ENC_BIG_ENDIAN);
1292                 length = tvb_get_guint8(tvb, offset);
1293                 offset += 1;
1294
1295                 proto_tree_add_item(sub_tree, hf_pn532_nfc_id_1, tvb, offset, length, ENC_NA);
1296                 offset += length;
1297
1298                 if (tvb_reported_length_remaining(tvb, offset)) {
1299                     proto_tree_add_item(sub_tree, hf_pn532_ats_length, tvb, offset, 1, ENC_BIG_ENDIAN);
1300                     length = tvb_get_guint8(tvb, offset);
1301                     offset += 1;
1302
1303                     proto_tree_add_item(sub_tree, hf_pn532_ats, tvb, offset, length - 1, ENC_NA);
1304                     offset += length - 1;
1305                 }
1306                 break;
1307             case FELICA_212:
1308             case FELICA_424:
1309                 proto_tree_add_item(sub_tree, hf_pn532_pol_res_length, tvb, offset, 1, ENC_BIG_ENDIAN);
1310                 offset += 1;
1311
1312                 proto_tree_add_item(sub_tree, hf_pn532_response_code, tvb, offset, 1, ENC_BIG_ENDIAN);
1313                 offset += 1;
1314
1315                 proto_tree_add_item(sub_tree, hf_pn532_nfc_id_2t, tvb, offset, 8, ENC_NA);
1316                 offset += 8;
1317
1318                 proto_tree_add_item(sub_tree, hf_pn532_pad, tvb, offset, 8, ENC_NA);
1319                 offset += 8;
1320
1321                 if (tvb_reported_length_remaining(tvb, offset) >= 2) {
1322                     proto_tree_add_item(sub_tree, hf_pn532_syst_code, tvb, offset, 2, ENC_BIG_ENDIAN);
1323                     offset += 2;
1324                 } else if (tvb_reported_length_remaining(tvb, offset) == 1) {
1325                     proto_tree_add_expert(pn532_tree, pinfo, &ei_unexpected_data, tvb, offset, 1);
1326                     offset += 1;
1327                 }
1328                 break;
1329             case ISO_IEC_14443B_106:
1330                 proto_tree_add_item(sub_tree, hf_pn532_atqb_response, tvb, offset, 12, ENC_NA);
1331                 offset += 12;
1332
1333                 proto_tree_add_item(sub_tree, hf_pn532_attrib_res_length, tvb, offset, 1, ENC_BIG_ENDIAN);
1334                 length = tvb_get_guint8(tvb, offset);
1335                 offset += 1;
1336
1337                 proto_tree_add_item(sub_tree, hf_pn532_attrib_res, tvb, offset, length, ENC_NA);
1338                 offset += length;
1339                 break;
1340             case JEWEL_14443A_106:
1341                 proto_tree_add_item(sub_tree, hf_pn532_sens_res, tvb, offset, 2, ENC_BIG_ENDIAN);
1342                 offset += 2;
1343
1344                 proto_tree_add_item(sub_tree, hf_pn532_jewel_id, tvb, offset, 4, ENC_NA);
1345                 offset += 4;
1346                 break;
1347             default:
1348                 proto_tree_add_expert(pn532_tree, pinfo, &ei_unknown_data, tvb, offset, tvb_captured_length_remaining(tvb, offset));
1349                 offset += tvb_captured_length_remaining(tvb, offset);
1350             }
1351
1352         }
1353         break;
1354
1355     case IN_ATR_REQ:
1356         proto_tree_add_item(pn532_tree, hf_pn532_Tg, tvb, offset, 1, ENC_BIG_ENDIAN);
1357         offset += 1;
1358
1359         proto_tree_add_item(pn532_tree, hf_pn532_next_not_used_2_7, tvb, offset, 1, ENC_BIG_ENDIAN);
1360         proto_tree_add_item(pn532_tree, hf_pn532_next_gi, tvb, offset, 1, ENC_BIG_ENDIAN);
1361         proto_tree_add_item(pn532_tree, hf_pn532_next_nfc_id_3i, tvb, offset, 1, ENC_BIG_ENDIAN);
1362         value = tvb_get_guint8(tvb, offset);
1363         offset += 1;
1364
1365         if (value & 0x01) {
1366             proto_tree_add_item(pn532_tree, hf_pn532_nfc_id_3i, tvb, offset, 10, ENC_NA);
1367             offset += 10;
1368         }
1369
1370         if (value & 0x02) {
1371             proto_tree_add_item(pn532_tree, hf_pn532_gi, tvb, offset, tvb_captured_length_remaining(tvb, offset), ENC_NA);
1372             offset += tvb_captured_length_remaining(tvb, offset);
1373         }
1374         break;
1375
1376     case IN_ATR_RSP:
1377         offset = dissect_status(pn532_tree, tvb, offset);
1378
1379         proto_tree_add_item(pn532_tree, hf_pn532_nfc_id_3t, tvb, offset, 10, ENC_NA);
1380         offset += 10;
1381
1382         proto_tree_add_item(pn532_tree, hf_pn532_did_target, tvb, offset, 1, ENC_BIG_ENDIAN);
1383         offset += 1;
1384
1385         proto_tree_add_item(pn532_tree, hf_pn532_send_bit_rate_target, tvb, offset, 1, ENC_BIG_ENDIAN);
1386         offset += 1;
1387
1388         proto_tree_add_item(pn532_tree, hf_pn532_receive_bit_rate_target, tvb, offset, 1, ENC_BIG_ENDIAN);
1389         offset += 1;
1390
1391         proto_tree_add_item(pn532_tree, hf_pn532_timeout, tvb, offset, 1, ENC_BIG_ENDIAN);
1392         offset += 1;
1393
1394         proto_tree_add_item(pn532_tree, hf_pn532_optional_parameters, tvb, offset, 1, ENC_BIG_ENDIAN);
1395         offset += 1;
1396
1397         proto_tree_add_item(pn532_tree, hf_pn532_gt, tvb, offset, 10, ENC_NA);
1398         offset += 10;
1399         break;
1400
1401     case IN_PSL_REQ:
1402         proto_tree_add_item(pn532_tree, hf_pn532_Tg, tvb, offset, 1, ENC_BIG_ENDIAN);
1403         offset += 1;
1404
1405         proto_tree_add_item(pn532_tree, hf_pn532_brit, tvb, offset, 1, ENC_BIG_ENDIAN);
1406         offset += 1;
1407
1408         proto_tree_add_item(pn532_tree, hf_pn532_brti, tvb, offset, 1, ENC_BIG_ENDIAN);
1409         offset += 1;
1410         break;
1411
1412     case IN_PSL_RSP:
1413         offset = dissect_status(pn532_tree, tvb, offset);
1414         break;
1415
1416     case IN_DATA_EXCHANGE_REQ:
1417         proto_tree_add_item(pn532_tree, hf_pn532_Tg, tvb, offset, 1, ENC_BIG_ENDIAN);
1418         offset += 1;
1419
1420         if (sub_selected == SUB_MIFARE) {
1421             /* Seems to work for payloads from LibNFC's "nfc-mfultralight" command */
1422             next_tvb = tvb_new_subset_remaining(tvb, offset);
1423             call_dissector(sub_handles[SUB_MIFARE], next_tvb, pinfo, tree);
1424             offset += tvb_captured_length_remaining(tvb, offset);
1425         } else if (sub_selected == SUB_ISO7816) {
1426             /* Seems to work for EMV payloads sent using TAMA shell scripts */
1427             next_tvb = tvb_new_subset_remaining(tvb, offset);
1428
1429             /* Need to do this, for the ISO7816 dissector to work, it seems */
1430             pinfo->p2p_dir = P2P_DIR_SENT;
1431             call_dissector(sub_handles[SUB_ISO7816], next_tvb, pinfo, tree);
1432             offset += tvb_captured_length_remaining(tvb, offset);
1433         } else {
1434             proto_tree_add_item(pn532_tree, hf_pn532_data_out, tvb, offset, tvb_captured_length_remaining(tvb, offset), ENC_NA);
1435             offset += tvb_captured_length_remaining(tvb, offset);
1436         }
1437
1438         break;
1439
1440     case IN_DATA_EXCHANGE_RSP:
1441         offset = dissect_status(pn532_tree, tvb, offset);
1442
1443         if (sub_selected == SUB_ISO7816) {
1444
1445             /* Seems to work for identifying responses to Select File requests...
1446                Might need to investigate "Status Words", later */
1447
1448             next_tvb = tvb_new_subset_remaining(tvb, offset);
1449
1450             /* Need to do this, for the ISO7816 dissector to work, it seems */
1451             pinfo->p2p_dir = P2P_DIR_RECV;
1452             call_dissector(sub_handles[SUB_ISO7816], next_tvb, pinfo, tree);
1453             offset += tvb_captured_length_remaining(tvb, offset);
1454         } else {
1455             proto_tree_add_item(pn532_tree, hf_pn532_data_in, tvb, offset, tvb_captured_length_remaining(tvb, offset), ENC_NA);
1456             offset += tvb_captured_length_remaining(tvb, offset);
1457         }
1458
1459         break;
1460
1461     case IN_COMMUNICATE_THRU_REQ:
1462         if (sub_selected == SUB_FELICA) {
1463
1464             /* Alleged payload length for FeliCa */
1465             proto_tree_add_item(pn532_tree, hf_pn532_payload_length, tvb, 2, 1, ENC_BIG_ENDIAN);
1466
1467             /* Attempt to dissect FeliCa payloads */
1468             next_tvb = tvb_new_subset_remaining(tvb, 3);
1469             call_dissector(sub_handles[SUB_FELICA], next_tvb, pinfo, tree);
1470         } else {
1471             /* NOTE: MiFare transmissions may identify as spurious FeliCa packets, in some cases */
1472
1473             proto_tree_add_item(pn532_tree, hf_pn532_data_out, tvb, offset, tvb_captured_length_remaining(tvb, offset), ENC_NA);
1474             offset += tvb_captured_length_remaining(tvb, offset);
1475         }
1476         break;
1477
1478     case IN_COMMUNICATE_THRU_RSP:
1479         offset = dissect_status(pn532_tree, tvb, offset);
1480
1481         if (sub_selected == SUB_FELICA) {
1482
1483             /* Alleged payload length for FeliCa */
1484             proto_tree_add_item(pn532_tree, hf_pn532_payload_length, tvb, 3, 1, ENC_BIG_ENDIAN);
1485
1486             /* Attempt to dissect FeliCa payloads */
1487             next_tvb = tvb_new_subset_remaining(tvb, 4);
1488             call_dissector(sub_handles[SUB_FELICA], next_tvb, pinfo, tree);
1489         } else {
1490             /* NOTE: MiFare transmissions may identify as spurious FeliCa packets, in some cases */
1491
1492             proto_tree_add_item(pn532_tree, hf_pn532_data_in, tvb, offset, tvb_captured_length_remaining(tvb, offset), ENC_NA);
1493             offset += tvb_captured_length_remaining(tvb, offset);
1494         }
1495         break;
1496
1497     case IN_DESELECT_REQ:
1498     case IN_RELEASE_REQ:
1499     case IN_SELECT_REQ:
1500         proto_tree_add_item(pn532_tree, hf_pn532_Tg, tvb, offset, 1, ENC_BIG_ENDIAN);
1501         offset += 1;
1502         break;
1503
1504     case IN_DESELECT_RSP:
1505     case IN_RELEASE_RSP:
1506     case IN_SELECT_RSP:
1507         offset = dissect_status(pn532_tree, tvb, offset);
1508         break;
1509
1510     case IN_AUTO_POLL_REQ:
1511         proto_tree_add_item(pn532_tree, hf_pn532_poll_number, tvb, offset, 1, ENC_BIG_ENDIAN);
1512         offset += 1;
1513
1514         proto_tree_add_item(pn532_tree, hf_pn532_period, tvb, offset, 1, ENC_BIG_ENDIAN);
1515         offset += 1;
1516
1517         /* This one is mandatory */
1518         sub_item = proto_tree_add_item(pn532_tree, hf_pn532_autopoll_type, tvb, offset, 1, ENC_BIG_ENDIAN);
1519         sub_tree = proto_item_add_subtree(sub_item, ett_pn532_autopoll_type);
1520         proto_tree_add_item(sub_tree, hf_pn532_autopoll_type_act, tvb, offset, 1, ENC_BIG_ENDIAN);
1521         proto_tree_add_item(sub_tree, hf_pn532_autopoll_type_dep, tvb, offset, 1, ENC_BIG_ENDIAN);
1522         proto_tree_add_item(sub_tree, hf_pn532_autopoll_type_tcl, tvb, offset, 1, ENC_BIG_ENDIAN);
1523         proto_tree_add_item(sub_tree, hf_pn532_autopoll_type_mf_fe, tvb, offset, 1, ENC_BIG_ENDIAN);
1524         proto_tree_add_item(sub_tree, hf_pn532_autopoll_type_not_used, tvb, offset, 1, ENC_BIG_ENDIAN);
1525         proto_tree_add_item(sub_tree, hf_pn532_autopoll_type_baudrate_and_modulation, tvb, offset, 1, ENC_BIG_ENDIAN);
1526         offset += 1;
1527
1528         while (tvb_reported_length_remaining(tvb, offset) >= 1) {
1529             sub_item = proto_tree_add_item(pn532_tree, hf_pn532_autopoll_type, tvb, offset, 1, ENC_BIG_ENDIAN);
1530             sub_tree = proto_item_add_subtree(sub_item, ett_pn532_autopoll_type);
1531             proto_tree_add_item(sub_tree, hf_pn532_autopoll_type_act, tvb, offset, 1, ENC_BIG_ENDIAN);
1532             proto_tree_add_item(sub_tree, hf_pn532_autopoll_type_dep, tvb, offset, 1, ENC_BIG_ENDIAN);
1533             proto_tree_add_item(sub_tree, hf_pn532_autopoll_type_tcl, tvb, offset, 1, ENC_BIG_ENDIAN);
1534             proto_tree_add_item(sub_tree, hf_pn532_autopoll_type_mf_fe, tvb, offset, 1, ENC_BIG_ENDIAN);
1535             proto_tree_add_item(sub_tree, hf_pn532_autopoll_type_not_used, tvb, offset, 1, ENC_BIG_ENDIAN);
1536             proto_tree_add_item(sub_tree, hf_pn532_autopoll_type_baudrate_and_modulation, tvb, offset, 1, ENC_BIG_ENDIAN);
1537             offset += 1;
1538         }
1539
1540         break;
1541
1542     case IN_AUTO_POLL_RSP:
1543         proto_tree_add_item(pn532_tree, hf_pn532_NbTg, tvb, offset, 1, ENC_BIG_ENDIAN);
1544         value = tvb_get_guint8(tvb, offset);
1545         offset += 1;
1546
1547         for (item_value = 1; item_value <= value; item_value += 1) {
1548             sub_item = proto_tree_add_item(pn532_tree, hf_pn532_target, tvb, offset, 4, ENC_NA);
1549             sub_tree = proto_item_add_subtree(sub_item, ett_pn532_target);
1550             proto_item_append_text(sub_item, " %u/%u", item_value, value);
1551
1552             next_item = proto_tree_add_item(sub_tree, hf_pn532_autopoll_type, tvb, offset, 1, ENC_BIG_ENDIAN);
1553             next_tree = proto_item_add_subtree(next_item, ett_pn532_autopoll_type);
1554             proto_tree_add_item(next_tree, hf_pn532_autopoll_type_act, tvb, offset, 1, ENC_BIG_ENDIAN);
1555             proto_tree_add_item(next_tree, hf_pn532_autopoll_type_dep, tvb, offset, 1, ENC_BIG_ENDIAN);
1556             proto_tree_add_item(next_tree, hf_pn532_autopoll_type_tcl, tvb, offset, 1, ENC_BIG_ENDIAN);
1557             proto_tree_add_item(next_tree, hf_pn532_autopoll_type_mf_fe, tvb, offset, 1, ENC_BIG_ENDIAN);
1558             proto_tree_add_item(next_tree, hf_pn532_autopoll_type_not_used, tvb, offset, 1, ENC_BIG_ENDIAN);
1559             proto_tree_add_item(next_tree, hf_pn532_autopoll_type_baudrate_and_modulation, tvb, offset, 1, ENC_BIG_ENDIAN);
1560             type = tvb_get_guint8(tvb, offset);
1561             offset += 1;
1562
1563             proto_tree_add_item(sub_tree, hf_pn532_target_data_length, tvb, offset, 1, ENC_BIG_ENDIAN);
1564             length = tvb_get_guint8(tvb, offset);
1565             proto_item_set_len(sub_item, length + 4);
1566             offset += 1;
1567
1568             if (type & 0x40) { /* DEP */
1569                 if (type & 0x80) { /* Passive mode */
1570                     proto_tree_add_item(pn532_tree, hf_pn532_target_data, tvb, offset, length, ENC_NA);
1571                     offset += length;
1572                 }
1573
1574                 proto_tree_add_item(pn532_tree, hf_pn532_nfc_id_3t, tvb, offset, 10, ENC_NA);
1575                 offset += 10;
1576
1577                 proto_tree_add_item(pn532_tree, hf_pn532_did_target, tvb, offset, 1, ENC_BIG_ENDIAN);
1578                 offset += 1;
1579
1580                 proto_tree_add_item(pn532_tree, hf_pn532_send_bit_rate_target, tvb, offset, 1, ENC_BIG_ENDIAN);
1581                 offset += 1;
1582
1583                 proto_tree_add_item(pn532_tree, hf_pn532_receive_bit_rate_target, tvb, offset, 1, ENC_BIG_ENDIAN);
1584                 offset += 1;
1585
1586                 proto_tree_add_item(pn532_tree, hf_pn532_timeout, tvb, offset, 1, ENC_BIG_ENDIAN);
1587                 offset += 1;
1588
1589                 proto_tree_add_item(pn532_tree, hf_pn532_optional_parameters, tvb, offset, 1, ENC_BIG_ENDIAN);
1590                 offset += 1;
1591
1592                 proto_tree_add_item(pn532_tree, hf_pn532_gt, tvb, offset, 10, ENC_NA);
1593                 offset += 10;
1594             } else { /* non-DEP */
1595                 proto_tree_add_item(pn532_tree, hf_pn532_target_data, tvb, offset, length, ENC_NA);
1596                 offset += length;
1597             }
1598         }
1599
1600         break;
1601
1602     case TG_INIT_AS_TARGET_REQ:
1603         proto_tree_add_item(pn532_tree, hf_pn532_mode_nu_3_7, tvb, offset, 1, ENC_BIG_ENDIAN);
1604         proto_tree_add_item(pn532_tree, hf_pn532_mode_picc_only, tvb, offset, 1, ENC_BIG_ENDIAN);
1605         proto_tree_add_item(pn532_tree, hf_pn532_mode_dep_only, tvb, offset, 1, ENC_BIG_ENDIAN);
1606         proto_tree_add_item(pn532_tree, hf_pn532_mode_passive_only, tvb, offset, 1, ENC_BIG_ENDIAN);
1607         offset += 1;
1608
1609         sub_item = proto_tree_add_item(pn532_tree, hf_pn532_mode_mifare_parameters, tvb, offset, 6, ENC_NA);
1610         sub_tree = proto_item_add_subtree(sub_item, ett_pn532_mifare_parameters);
1611
1612         proto_tree_add_item(sub_tree, hf_pn532_mode_mifare_parameters_sens_res, tvb, offset, 2, ENC_BIG_ENDIAN);
1613         offset += 2;
1614
1615         proto_tree_add_item(sub_tree, hf_pn532_mode_mifare_parameters_nfc_id_1t, tvb, offset, 3, ENC_NA);
1616         offset += 3;
1617
1618         proto_tree_add_item(sub_tree, hf_pn532_mode_mifare_parameters_sel_res, tvb, offset, 1, ENC_BIG_ENDIAN);
1619         offset += 1;
1620
1621         sub_item = proto_tree_add_item(pn532_tree, hf_pn532_mode_felica_parameters, tvb, offset, 18, ENC_NA);
1622         sub_tree = proto_item_add_subtree(sub_item, ett_pn532_felica_parameters);
1623
1624         proto_tree_add_item(sub_tree, hf_pn532_mode_felica_parameters_nfc_id_2t, tvb, offset, 8, ENC_NA);
1625         offset += 8;
1626
1627         proto_tree_add_item(sub_tree, hf_pn532_mode_felica_parameters_pad, tvb, offset, 8, ENC_NA);
1628         offset += 8;
1629
1630         proto_tree_add_item(sub_tree, hf_pn532_mode_felica_parameters_system_code, tvb, offset, 2, ENC_BIG_ENDIAN);
1631         offset += 2;
1632
1633         proto_tree_add_item(pn532_tree, hf_pn532_mode_nfc_id_3t, tvb, offset, 10, ENC_NA);
1634         offset += 10;
1635
1636         proto_tree_add_item(pn532_tree, hf_pn532_mode_gt_length, tvb, offset, 1, ENC_BIG_ENDIAN);
1637         length = tvb_get_guint8(tvb, offset);
1638         offset += 1;
1639
1640         if (length > 0) {
1641             proto_tree_add_item(pn532_tree, hf_pn532_mode_gt, tvb, offset, length, ENC_NA);
1642             offset += length;
1643         }
1644
1645         proto_tree_add_item(pn532_tree, hf_pn532_mode_tk_length, tvb, offset, 1, ENC_BIG_ENDIAN);
1646         length = tvb_get_guint8(tvb, offset);
1647         offset += 1;
1648
1649         if (length > 0) {
1650             proto_tree_add_item(pn532_tree, hf_pn532_mode_tk, tvb, offset, length, ENC_NA);
1651             offset += length;
1652         }
1653         break;
1654
1655     case TG_INIT_AS_TARGET_RSP:
1656         proto_tree_add_item(pn532_tree, hf_pn532_mode_nu_7, tvb, offset, 1, ENC_BIG_ENDIAN);
1657         proto_tree_add_item(pn532_tree, hf_pn532_mode_baudrate, tvb, offset, 1, ENC_BIG_ENDIAN);
1658         proto_tree_add_item(pn532_tree, hf_pn532_mode_iso_iec_14443_4_picc, tvb, offset, 1, ENC_BIG_ENDIAN);
1659         proto_tree_add_item(pn532_tree, hf_pn532_mode_dep, tvb, offset, 1, ENC_BIG_ENDIAN);
1660         proto_tree_add_item(pn532_tree, hf_pn532_mode_framing_type, tvb, offset, 1, ENC_BIG_ENDIAN);
1661         offset += 1;
1662
1663         proto_tree_add_item(pn532_tree, hf_pn532_initiator_command, tvb, offset, tvb_captured_length_remaining(tvb, offset), ENC_NA);
1664         offset += tvb_captured_length_remaining(tvb, offset);
1665         break;
1666
1667     case TG_SET_GENERAL_BYTES_REQ:
1668         proto_tree_add_item(pn532_tree, hf_pn532_gt, tvb, offset, tvb_captured_length_remaining(tvb, offset), ENC_NA);
1669         offset += tvb_captured_length_remaining(tvb, offset);
1670         break;
1671
1672     case TG_SET_GENERAL_BYTES_RSP:
1673         offset = dissect_status(pn532_tree, tvb, offset);
1674         break;
1675
1676     case TG_GET_DATA_REQ:
1677         /* No parameters */
1678         break;
1679
1680     case TG_GET_DATA_RSP:
1681         offset = dissect_status(pn532_tree, tvb, offset);
1682
1683         proto_tree_add_item(pn532_tree, hf_pn532_data_in, tvb, offset, tvb_captured_length_remaining(tvb, offset), ENC_NA);
1684         offset += tvb_captured_length_remaining(tvb, offset);
1685         break;
1686
1687     case TG_SET_DATA_REQ:
1688     case TG_SET_METADATA_REQ:
1689         proto_tree_add_item(pn532_tree, hf_pn532_data_out, tvb, offset, tvb_captured_length_remaining(tvb, offset), ENC_NA);
1690         offset += tvb_captured_length_remaining(tvb, offset);
1691         break;
1692
1693     case TG_SET_DATA_RSP:
1694     case TG_SET_METADATA_RSP:
1695         offset = dissect_status(pn532_tree, tvb, offset);
1696         break;
1697
1698     case TG_GET_INITIATOR_CMD_REQ:
1699         /* No parameters */
1700         break;
1701
1702     case TG_GET_INITIATOR_CMD_RSP:
1703         offset = dissect_status(pn532_tree, tvb, offset);
1704
1705         proto_tree_add_item(pn532_tree, hf_pn532_initiator_command, tvb, offset, tvb_captured_length_remaining(tvb, offset), ENC_NA);
1706         offset += tvb_captured_length_remaining(tvb, offset);
1707         break;
1708
1709     case TG_RESP_TO_INITIATOR_REQ:
1710         proto_tree_add_item(pn532_tree, hf_pn532_tg_response, tvb, offset, tvb_captured_length_remaining(tvb, offset), ENC_NA);
1711         offset += tvb_captured_length_remaining(tvb, offset);
1712         break;
1713
1714     case TG_RESP_TO_INITIATOR_RSP:
1715         offset = dissect_status(pn532_tree, tvb, offset);
1716         break;
1717
1718     case TG_GET_TARGET_STATUS_REQ:
1719         /* No parameters */
1720         break;
1721
1722     case TG_GET_TARGET_STATUS_RSP:
1723         proto_tree_add_item(pn532_tree, hf_pn532_state, tvb, offset, 1, ENC_BIG_ENDIAN);
1724         offset += 1;
1725
1726         proto_tree_add_item(pn532_tree, hf_pn532_brit_nu_7, tvb, offset, 1, ENC_BIG_ENDIAN);
1727         proto_tree_add_item(pn532_tree, hf_pn532_brit_speed_initiator, tvb, offset, 1, ENC_BIG_ENDIAN);
1728         proto_tree_add_item(pn532_tree, hf_pn532_brit_nu_3, tvb, offset, 1, ENC_BIG_ENDIAN);
1729         proto_tree_add_item(pn532_tree, hf_pn532_brit_speed_target, tvb, offset, 1, ENC_BIG_ENDIAN);
1730         offset += 1;
1731         break;
1732
1733     default:
1734         proto_tree_add_expert(pn532_tree, pinfo, &ei_unknown_data, tvb, offset, tvb_captured_length_remaining(tvb, offset));
1735         offset += tvb_captured_length_remaining(tvb, offset);
1736         break;
1737     }
1738
1739     if (tvb_reported_length_remaining(tvb, offset) > 0) {
1740         proto_tree_add_expert(pn532_tree, pinfo, &ei_unexpected_data, tvb, offset, tvb_captured_length_remaining(tvb, offset));
1741         offset += tvb_captured_length_remaining(tvb, offset);
1742     }
1743
1744     return offset;
1745 }
1746
1747 void proto_register_pn532(void)
1748 {
1749     module_t *pref_mod;
1750     expert_module_t *expert_pn532;
1751
1752     static hf_register_info hf[] = {
1753
1754         {&hf_pn532_command,
1755          {"Command", "pn532.cmd", FT_UINT8, BASE_HEX | BASE_EXT_STRING,
1756           &pn532_commands_ext, 0x0, NULL, HFILL}},
1757         {&hf_pn532_direction,
1758          {"Direction", "pn532.tfi", FT_UINT8, BASE_HEX,
1759           VALS(pn532_directions), 0x0, NULL, HFILL}},
1760         {&hf_pn532_status_nad_present,
1761          {"NAD Present", "pn532.status.nad_present", FT_UINT8, BASE_HEX,
1762           NULL, 0x80, NULL, HFILL}},
1763         {&hf_pn532_status_mi,
1764          {"MI", "pn532.status.mi", FT_UINT8, BASE_HEX,
1765           NULL, 0x40, NULL, HFILL}},
1766         {&hf_pn532_status_error_code,
1767          {"Error Code", "pn532.status.error_code", FT_UINT8, BASE_HEX,
1768           VALS(pn532_errors), 0x3F, NULL, HFILL}},
1769         {&hf_pn532_error,
1770          {"Last Error", "pn532.last_error", FT_UINT8, BASE_HEX,
1771           VALS(pn532_errors), 0x00, NULL, HFILL}},
1772         {&hf_pn532_BrTy,
1773          {"Baud Rate and Modulation", "pn532.BrTy", FT_UINT8, BASE_HEX,
1774           VALS(pn532_brtypes), 0x0, NULL, HFILL}},
1775         {&hf_pn532_MaxTg,
1776          {"Maximum Number of Targets", "pn532.MaxTg", FT_UINT8, BASE_DEC,
1777           NULL, 0x0, NULL, HFILL}},
1778         {&hf_pn532_Tg,
1779          {"Logical Target Number", "pn532.Tg", FT_INT8, BASE_DEC,
1780           NULL, 0x0, NULL, HFILL}},
1781         {&hf_pn532_NbTg,
1782          {"Number of Targets", "pn532.NbTg", FT_UINT8, BASE_DEC,
1783           NULL, 0x0, NULL, HFILL}},
1784         {&hf_pn532_payload_length,
1785          {"Payload Length", "pn532.payload.length", FT_INT8, BASE_DEC,
1786           NULL, 0x0, NULL, HFILL}},
1787         {&hf_pn532_ic_version,
1788          {"Integrated Circuit Version", "pn532.ic.version", FT_UINT8, BASE_HEX,
1789           NULL, 0x0, "Version of the IC. For PN532, the contain of this byte is 0x32", HFILL}},
1790         {&hf_pn532_fw_version,
1791          {"Firmware Version", "pn532.fw.version", FT_UINT8, BASE_DEC,
1792           NULL, 0x0, NULL, HFILL}},
1793         {&hf_pn532_fw_revision,
1794          {"Firmware Revision", "pn532.fw.revision", FT_UINT8, BASE_DEC,
1795           NULL, 0x0, NULL, HFILL}},
1796         {&hf_pn532_fw_support,
1797          {"Firmware Support", "pn532.fw.support", FT_UINT8, BASE_DEC,
1798           NULL, 0x0, NULL, HFILL}},
1799         {&hf_pn532_fw_support_rfu,
1800          {"RFU", "pn532.fw.support.rfu", FT_UINT8, BASE_HEX,
1801           NULL, 0xF8, NULL, HFILL}},
1802         {&hf_pn532_fw_support_iso_018092,
1803          {"ISO 018092", "pn532.fw.support.iso_018092", FT_BOOLEAN, 8,
1804           NULL, 0x04, NULL, HFILL}},
1805         {&hf_pn532_fw_support_iso_iec_14443_type_b,
1806          {"ISO/IEC 14443 Type B", "pn532.fw.support.iso_iec_14443_type_b", FT_BOOLEAN, 8,
1807           NULL, 0x02, NULL, HFILL}},
1808         {&hf_pn532_fw_support_iso_iec_14443_type_a,
1809          {"ISO/IEC 14443 Type A", "pn532.fw.support.iso_iec_14443_type_a", FT_BOOLEAN, 8,
1810           NULL, 0x01, NULL, HFILL}},
1811         {&hf_pn532_14443a_uid,
1812          {"ISO/IEC 14443-A UID", "pn532.iso.14443a.uid", FT_UINT64, BASE_HEX,
1813           NULL, 0x0, NULL, HFILL}},
1814         {&hf_pn532_sam_mode,
1815          {"SAM Mode", "pn532.sam.mode", FT_UINT8, BASE_HEX,
1816           VALS(pn532_sam_modes), 0x0, NULL, HFILL}},
1817         {&hf_pn532_sam_timeout,
1818          {"SAM Timeout", "pn532.sam.timeout", FT_UINT8, BASE_CUSTOM,
1819           CF_FUNC(sam_timeout_base), 0x0, NULL, HFILL}},
1820         {&hf_pn532_sam_irq,
1821          {"SAM IRQ", "pn532.sam.irq", FT_UINT8, BASE_HEX,
1822           NULL, 0x0, NULL, HFILL}},
1823         {&hf_pn532_config,
1824          {"Config Item", "pn532.config", FT_UINT8, BASE_HEX,
1825           VALS(pn532_config_vals), 0x0, NULL, HFILL}},
1826         {&hf_pn532_config_not_used,
1827          {"Not used", "pn532.config.not_used", FT_UINT8, BASE_HEX,
1828           NULL, 0xFC, NULL, HFILL}},
1829         {&hf_pn532_config_auto_rfca,
1830          {"Auto RFCA", "pn532.config.auto_rfca", FT_BOOLEAN, 8,
1831           NULL, 0x02, NULL, HFILL}},
1832         {&hf_pn532_config_rf,
1833          {"RF", "pn532.config.rf", FT_BOOLEAN, 8,
1834           NULL, 0x01, NULL, HFILL}},
1835         {&hf_pn532_config_rfu,
1836          {"RFU", "pn532.config.rfu", FT_UINT8, BASE_HEX,
1837           NULL, 0x00, NULL, HFILL}},
1838         {&hf_pn532_config_atr_res_timeout,
1839          {"ATR Res Timeout", "pn532.config.atr_res_timeout", FT_UINT8, BASE_HEX,
1840           VALS(pn532_config_timeout_vals), 0x00, NULL, HFILL}},
1841         {&hf_pn532_config_timeout_non_dep,
1842          {"TimeOut during non-DEP communications", "pn532.config.timeout_non_dep", FT_UINT8, BASE_HEX,
1843           VALS(pn532_config_timeout_vals), 0x00, NULL, HFILL}},
1844         {&hf_pn532_config_max_rty_com,
1845          {"Max Retry COM", "pn532.config.max_rty_com", FT_UINT8, BASE_HEX,
1846           NULL, 0x00, NULL, HFILL}},
1847         {&hf_pn532_config_max_rty_atr,
1848          {"Max Retry ATR", "pn532.config.max_rty_atr", FT_UINT8, BASE_DEC,
1849           NULL, 0x00, NULL, HFILL}},
1850         {&hf_pn532_config_max_rty_psl,
1851          {"Max Retry PSL", "pn532.config.max_rty_psl", FT_UINT8, BASE_DEC,
1852           NULL, 0x00, NULL, HFILL}},
1853         {&hf_pn532_config_max_rty_passive_activation,
1854          {"Max Retry Passive Activation", "pn532.config.max_rty_passive_activation", FT_UINT8, BASE_DEC,
1855           NULL, 0x00, NULL, HFILL}},
1856         {&hf_pn532_afi,
1857          {"AFI", "pn532.afi", FT_UINT8, BASE_DEC,
1858           NULL, 0x00, NULL, HFILL}},
1859         {&hf_pn532_polling_method,
1860          {"Polling Method", "pn532.polling_method", FT_UINT8, BASE_DEC,
1861           VALS(pn532_polling_method_vals), 0x00, NULL, HFILL}},
1862         {&hf_pn532_config_ciu_rf_cfg,
1863          {"CIU RF Cfg", "pn532.ciu_rf_cfg", FT_UINT8, BASE_HEX,
1864           NULL, 0x00, NULL, HFILL}},
1865         {&hf_pn532_config_ciu_gs_n_on,
1866          {"CIU GsN On", "pn532.ciu_gs_n_on", FT_UINT8, BASE_HEX,
1867           NULL, 0x00, NULL, HFILL}},
1868         {&hf_pn532_config_ciu_gs_n_off,
1869          {"CIU GsN Off", "pn532.ciu_gs_n_off", FT_UINT8, BASE_HEX,
1870           NULL, 0x00, NULL, HFILL}},
1871         {&hf_pn532_config_ciu_cw_gs_p,
1872          {"CIU CW GsP", "pn532.ciu_cw_gs_p", FT_UINT8, BASE_HEX,
1873           NULL, 0x00, NULL, HFILL}},
1874         {&hf_pn532_config_ciu_demon_rf_on,
1875          {"CIU Demon when RF is On", "pn532.ciu_demon_rf_on", FT_UINT8, BASE_HEX,
1876           NULL, 0x00, NULL, HFILL}},
1877         {&hf_pn532_config_ciu_demon_rf_off,
1878          {"CIU Demon when RF is Off", "pn532.ciu_demon_rf_off", FT_UINT8, BASE_HEX,
1879           NULL, 0x00, NULL, HFILL}},
1880         {&hf_pn532_config_ciu_rx_threshold,
1881          {"CIU RX Threshold", "pn532.ciu_rx_threshold", FT_UINT8, BASE_HEX,
1882           NULL, 0x00, NULL, HFILL}},
1883         {&hf_pn532_config_ciu_mod_width,
1884          {"CIU Mod Width", "pn532.ciu_mod_width", FT_UINT8, BASE_HEX,
1885           NULL, 0x00, NULL, HFILL}},
1886         {&hf_pn532_config_ciu_mod_gs_p,
1887          {"CIU Mod GsP", "pn532.ciu_mod_gs_p", FT_UINT8, BASE_HEX,
1888           NULL, 0x00, NULL, HFILL}},
1889         {&hf_pn532_config_ciu_mif_nfc,
1890          {"CIU Mif NFC", "pn532.ciu_mif_nfc", FT_UINT8, BASE_HEX,
1891           NULL, 0x00, NULL, HFILL}},
1892         {&hf_pn532_config_ciu_tx_bit_phase,
1893          {"CIU TX Bit Phase", "pn532.ciu_tx_bit_phase", FT_UINT8, BASE_HEX,
1894           NULL, 0x00, NULL, HFILL}},
1895         {&hf_pn532_config_212_kbps,
1896          {"212 kbps settings", "pn532.212_kbps", FT_UINT24, BASE_HEX,
1897           NULL, 0x00, NULL, HFILL}},
1898         {&hf_pn532_config_424_kbps,
1899          {"424 kbps settings", "pn532.424_kbps", FT_UINT24, BASE_HEX,
1900           NULL, 0x00, NULL, HFILL}},
1901         {&hf_pn532_config_848_kbps,
1902          {"848 kbps settings", "pn532.848_kbps", FT_UINT24, BASE_HEX,
1903           NULL, 0x00, NULL, HFILL}},
1904         {&hf_pn532_state,
1905          {"State", "pn532.state", FT_UINT8, BASE_HEX,
1906           VALS(pn532_state_vals), 0x00, NULL, HFILL}},
1907         {&hf_pn532_brit_nu_7,
1908          {"Not Used", "pn532.brit.not_used.7", FT_UINT8, BASE_HEX,
1909           NULL, 0x80, NULL, HFILL}},
1910         {&hf_pn532_brit_speed_initiator,
1911          {"Speed Initiator", "pn532.brit.speed_initiator", FT_UINT8, BASE_HEX,
1912           VALS(pn532_speed_vals), 0x70, NULL, HFILL}},
1913         {&hf_pn532_brit_nu_3,
1914          {"Not Used", "pn532.brit.not_used.3", FT_UINT8, BASE_HEX,
1915           NULL, 0x08, NULL, HFILL}},
1916         {&hf_pn532_brit_speed_target,
1917          {"Speed Target", "pn532.brit.speed_target", FT_UINT8, BASE_HEX,
1918           VALS(pn532_speed_vals), 0x07, NULL, HFILL}},
1919         {&hf_pn532_tg_response,
1920          {"TG Response", "pn532.tg_response", FT_BYTES, BASE_NONE,
1921           NULL, 0x00, NULL, HFILL}},
1922         {&hf_pn532_initiator_command,
1923          {"Initiator Command", "pn532.initiator_command", FT_BYTES, BASE_NONE,
1924           NULL, 0x00, NULL, HFILL}},
1925         {&hf_pn532_data_out,
1926          {"Data Out", "pn532.data_out", FT_BYTES, BASE_NONE,
1927           NULL, 0x00, NULL, HFILL}},
1928         {&hf_pn532_data_in,
1929          {"Data In", "pn532.data_in", FT_BYTES, BASE_NONE,
1930           NULL, 0x00, NULL, HFILL}},
1931         {&hf_pn532_gt,
1932          {"Gt", "pn532.gt", FT_BYTES, BASE_NONE,
1933           NULL, 0x00, NULL, HFILL}},
1934         {&hf_pn532_gi,
1935          {"Gi", "pn532.gi", FT_BYTES, BASE_NONE,
1936           NULL, 0x00, NULL, HFILL}},
1937         {&hf_pn532_mode_nu_3_7,
1938          {"Not Used", "pn532.mode.not_used.3_7", FT_UINT8, BASE_HEX,
1939           NULL, 0xF8, NULL, HFILL}},
1940         {&hf_pn532_mode_picc_only,
1941          {"PICC Only", "pn532.mode.picc_only", FT_BOOLEAN, 8,
1942           NULL, 0x04, NULL, HFILL}},
1943         {&hf_pn532_mode_dep_only,
1944          {"DEP Only", "pn532.mode.dep_only", FT_BOOLEAN, 8,
1945           NULL, 0x02, NULL, HFILL}},
1946         {&hf_pn532_mode_passive_only,
1947          {"Passive Only", "pn532.mode.passive_only", FT_BOOLEAN, 8,
1948           NULL, 0x01, NULL, HFILL}},
1949         {&hf_pn532_mode_mifare_parameters,
1950          {"Mifare Parameters", "pn532.mode.mifare_parameters", FT_NONE, BASE_NONE,
1951           NULL, 0x00, NULL, HFILL}},
1952         {&hf_pn532_mode_mifare_parameters_sens_res,
1953          {"SENS RES", "pn532.mode.mifare_parameters.sens_res", FT_UINT16, BASE_HEX,
1954           NULL, 0x00, NULL, HFILL}},
1955         {&hf_pn532_mode_mifare_parameters_nfc_id_1t,
1956          {"NFC ID 1t", "pn532.mode.mifare_parameters.nfc_id_1t", FT_BYTES, BASE_NONE,
1957           NULL, 0x00, NULL, HFILL}},
1958         {&hf_pn532_mode_mifare_parameters_sel_res,
1959          {"SEL RES", "pn532.mode.mifare_parameters.sel_res", FT_UINT8, BASE_HEX,
1960           NULL, 0x00, NULL, HFILL}},
1961         {&hf_pn532_mode_felica_parameters,
1962          {"FeliCA Parameters", "pn532.mode.felica_parameters", FT_NONE, BASE_NONE,
1963           NULL, 0x00, NULL, HFILL}},
1964         {&hf_pn532_mode_felica_parameters_nfc_id_2t,
1965          {"NFC ID 2t", "pn532.mode.felica_parameters.nfc_id_2t", FT_BYTES, BASE_NONE,
1966           NULL, 0x00, NULL, HFILL}},
1967         {&hf_pn532_mode_felica_parameters_pad,
1968          {"Pad", "pn532.mode.felica_parameters.pad", FT_BYTES, BASE_NONE,
1969           NULL, 0x00, NULL, HFILL}},
1970         {&hf_pn532_mode_felica_parameters_system_code,
1971          {"System Code", "pn532.mode.felica_parameters.system_code", FT_UINT16, BASE_HEX,
1972           NULL, 0x00, NULL, HFILL}},
1973         {&hf_pn532_mode_nfc_id_3t,
1974          {"NFC ID 3t", "pn532.mode.nfc_id_3t", FT_BYTES, BASE_NONE,
1975           NULL, 0x00, NULL, HFILL}},
1976         {&hf_pn532_mode_gt,
1977          {"Gt", "pn532.mode.gt", FT_BYTES, BASE_NONE,
1978           NULL, 0x00, NULL, HFILL}},
1979         {&hf_pn532_mode_gt_length,
1980          {"Gt Length", "pn532.mode.gt.length", FT_UINT8, BASE_DEC,
1981           NULL, 0x00, NULL, HFILL}},
1982         {&hf_pn532_mode_tk,
1983          {"Tk", "pn532.mode.tk", FT_BYTES, BASE_NONE,
1984           NULL, 0x00, NULL, HFILL}},
1985         {&hf_pn532_mode_tk_length,
1986          {"Tk Length", "pn532.mode.tk.length", FT_UINT8, BASE_DEC,
1987           NULL, 0x00, NULL, HFILL}},
1988         {&hf_pn532_mode_nu_7,
1989          {"Not Used", "pn532.mode.not_used.7", FT_BOOLEAN, 8,
1990           NULL, 0x80, NULL, HFILL}},
1991         {&hf_pn532_mode_baudrate,
1992          {"Baudrate", "pn532.mode.baudrate", FT_UINT8, BASE_HEX,
1993           VALS(pn532_speed_vals), 0x70, NULL, HFILL}},
1994         {&hf_pn532_mode_iso_iec_14443_4_picc,
1995          {"ISO/IEC 14443-4 PICC", "pn532.mode.iso_iec_14443_4_picc", FT_BOOLEAN, 8,
1996           NULL, 0x08, NULL, HFILL}},
1997         {&hf_pn532_mode_dep,
1998          {"DEP", "pn532.mode.dep", FT_BOOLEAN, 8,
1999           NULL, 0x04, NULL, HFILL}},
2000         {&hf_pn532_mode_framing_type,
2001          {"Framing Type", "pn532.mode.framing_type", FT_UINT8, BASE_HEX,
2002           VALS(pn532_framing_type_vals), 0x03, NULL, HFILL}},
2003         {&hf_pn532_brit,
2004          {"BRit", "pn532.brit", FT_UINT8, BASE_HEX,
2005           VALS(pn532_speed_vals), 0x00, NULL, HFILL}},
2006         {&hf_pn532_brti,
2007          {"BRti", "pn532.brti", FT_UINT8, BASE_HEX,
2008           VALS(pn532_speed_vals), 0x00, NULL, HFILL}},
2009         {&hf_pn532_txmode_nu_7,
2010          {"Not Used", "pn532.txmode.not_used.7", FT_BOOLEAN, 8,
2011           NULL, 0x80, NULL, HFILL}},
2012         {&hf_pn532_txmode_tx_speed,
2013          {"Tx Speed", "pn532.txmode.txspeed", FT_UINT8, BASE_HEX,
2014           VALS(pn532_txspeed_vals), 0x70, NULL, HFILL}},
2015         {&hf_pn532_txmode_nu_2_3,
2016          {"Not Used", "pn532.txmode.not_used.2_3", FT_UINT8, BASE_HEX,
2017           NULL, 0xC0, NULL, HFILL}},
2018         {&hf_pn532_txmode_tx_framing,
2019          {"Tx Framing", "pn532.txmode.not_used.2_3", FT_UINT8, BASE_HEX,
2020           VALS(pn532_txframing_vals), 0x03, NULL, HFILL}},
2021         {&hf_pn532_baudrate,
2022          {"Baudrate", "pn532.baudrate", FT_UINT8, BASE_HEX,
2023           VALS(pn532_baudrate_vals), 0x00, NULL, HFILL}},
2024         {&hf_pn532_flags,
2025          {"Flags", "pn532.flags", FT_UINT8, BASE_HEX,
2026           NULL, 0x00, NULL, HFILL}},
2027         {&hf_pn532_flags_rfu_7,
2028          {"RFU", "pn532.flags.rfu.7", FT_BOOLEAN, 8,
2029           NULL, 0x80, NULL, HFILL}},
2030         {&hf_pn532_flags_remove_preamble_and_postamble,
2031          {"Remove Preamble and Postamble", "pn532.flags.remove_preamble_and_postamble", FT_BOOLEAN, 8,
2032           NULL, 0x40, NULL, HFILL}},
2033         {&hf_pn532_flags_iso_14443_4_picc_emulation,
2034          {"ISO 14443-4 PICC Emulation", "pn532.flags.iso_14443_4_picc_emulation", FT_BOOLEAN, 8,
2035           NULL, 0x20, NULL, HFILL}},
2036         {&hf_pn532_flags_automatic_rats,
2037          {"Automatic RATS", "pn532.flags.automatic_rats", FT_BOOLEAN, 8,
2038           NULL, 0x10, NULL, HFILL}},
2039         {&hf_pn532_flags_rfu_3,
2040          {"RFU", "pn532.flags.rfu.3", FT_BOOLEAN, 8,
2041           NULL, 0x08, NULL, HFILL}},
2042         {&hf_pn532_flags_automatic_atr_res,
2043          {"Automatic ATR RES", "pn532.flags.automatic_atr_res", FT_BOOLEAN, 8,
2044           NULL, 0x04, NULL, HFILL}},
2045         {&hf_pn532_flags_did_used,
2046          {"DID Used", "pn532.flags.did_used", FT_BOOLEAN, 8,
2047           NULL, 0x02, NULL, HFILL}},
2048         {&hf_pn532_flags_nad_used,
2049          {"NAD Used", "pn532.flags.nad_used", FT_BOOLEAN, 8,
2050           NULL, 0x01, NULL, HFILL}},
2051         {&hf_pn532_wakeup_enable,
2052          {"Wakeup Enable", "pn532.wakeup_enable", FT_UINT8, BASE_HEX,
2053           NULL, 0x00, NULL, HFILL}},
2054         {&hf_pn532_target,
2055          {"Target", "pn532.target", FT_NONE, BASE_NONE,
2056           NULL, 0x00, NULL, HFILL}},
2057         {&hf_pn532_generate_irq,
2058          {"Generate IRQ", "pn532.generate_irq", FT_UINT8, BASE_HEX,
2059           NULL, 0x00, NULL, HFILL}},
2060         {&hf_pn532_register_address,
2061          {"Register Address", "pn532.register.address", FT_UINT16, BASE_HEX,
2062           NULL, 0x00, NULL, HFILL}},
2063         {&hf_pn532_register_value,
2064          {"Register Value", "pn532.register.value", FT_UINT8, BASE_HEX,
2065           NULL, 0x00, NULL, HFILL}},
2066         {&hf_pn532_field,
2067          {"Field", "pn532.field", FT_BOOLEAN, BASE_NONE,
2068           TFS(&tfs_present_not_present), 0x00, "Field indicates if an external RF field is present and detected by the PN532", HFILL}},
2069         {&hf_pn532_brrx,
2070          {"Baudrate Rx", "pn532.brrx", FT_UINT8, BASE_HEX,
2071           VALS(pn532_speed_vals), 0x00, NULL, HFILL}},
2072         {&hf_pn532_brtx,
2073          {"Baudrate Tx", "pn532.brtx", FT_UINT8, BASE_HEX,
2074           VALS(pn532_speed_vals), 0x00, NULL, HFILL}},
2075         {&hf_pn532_type,
2076          {"Type", "pn532.type", FT_UINT8, BASE_HEX,
2077           VALS(pn532_type_vals), 0x00, NULL, HFILL}},
2078         {&hf_pn532_sam_status,
2079          {"SAM Status", "pn532.sam.status", FT_UINT8, BASE_HEX,
2080           NULL, 0x00, NULL, HFILL}},
2081         {&hf_pn532_wakeup_enable_i2c,
2082          {"I2C", "pn532.wakeup_enable.i2c", FT_BOOLEAN, 8,
2083           NULL, 0x80, NULL, HFILL}},
2084         {&hf_pn532_wakeup_enable_gpio,
2085          {"GPIO", "pn532.wakeup_enable.gpio", FT_BOOLEAN, 8,
2086           NULL, 0x40, NULL, HFILL}},
2087         {&hf_pn532_wakeup_enable_spi,
2088          {"SPI", "pn532.wakeup_enable.spi", FT_BOOLEAN, 8,
2089           NULL, 0x20, NULL, HFILL}},
2090         {&hf_pn532_wakeup_enable_hsu,
2091          {"HSU", "pn532.wakeup_enable.hsu", FT_BOOLEAN, 8,
2092           NULL, 0x10, NULL, HFILL}},
2093         {&hf_pn532_wakeup_enable_rf_level_detector,
2094          {"RF Level Detector", "pn532.wakeup_enable.rf_level_detector", FT_BOOLEAN, 8,
2095           NULL, 0x08, NULL, HFILL}},
2096         {&hf_pn532_wakeup_enable_rfu_2,
2097          {"RFU", "pn532.wakeup_enable.rfu_2", FT_BOOLEAN, 8,
2098           NULL, 0x04, NULL, HFILL}},
2099         {&hf_pn532_wakeup_enable_int_1,
2100          {"I2C", "pn532.wakeup_enable.int.1", FT_BOOLEAN, 8,
2101           NULL, 0x02, NULL, HFILL}},
2102         {&hf_pn532_wakeup_enable_int_0,
2103          {"I2C", "pn532.wakeup_enable.int.0", FT_BOOLEAN, 8,
2104           NULL, 0x01, NULL, HFILL}},
2105         {&hf_pn532_gpio_ioi1,
2106          {"GPIO IOI1", "pn532.gpio.ioi1", FT_UINT8, BASE_HEX,
2107           NULL, 0xFF, NULL, HFILL}},
2108         {&hf_pn532_gpio_p3,
2109          {"GPIO P3", "pn532.gpio.p3", FT_UINT8, BASE_HEX,
2110           NULL, 0xFF, NULL, HFILL}},
2111         {&hf_pn532_gpio_p7,
2112          {"GPIO P7", "pn532.gpio.p7", FT_UINT8, BASE_HEX,
2113           NULL, 0xFF, NULL, HFILL}},
2114         {&hf_pn532_poll_number,
2115          {"Poll Number", "pn532.poll_number", FT_UINT8, BASE_DEC,
2116           NULL, 0x00, NULL, HFILL}},
2117         {&hf_pn532_period,
2118          {"Period", "pn532.period", FT_UINT8, BASE_DEC,
2119           NULL, 0x00, NULL, HFILL}},
2120         {&hf_pn532_autopoll_type,
2121          {"Type", "pn532.autopoll_type", FT_UINT8, BASE_HEX,
2122           NULL, 0x00, NULL, HFILL}},
2123         {&hf_pn532_target_data,
2124          {"Target Data", "pn532.target_data", FT_BYTES, BASE_NONE,
2125           NULL, 0x00, NULL, HFILL}},
2126         {&hf_pn532_target_data_length,
2127          {"Target Data Length", "pn532.target_data.length", FT_UINT8, BASE_DEC,
2128           NULL, 0x00, NULL, HFILL}},
2129         {&hf_pn532_autopoll_type_act,
2130          {"Active Mode", "pn532.autopoll_type.active", FT_BOOLEAN, 8,
2131           NULL, 0x80, NULL, HFILL}},
2132         {&hf_pn532_autopoll_type_dep,
2133          {"DEP", "pn532.autopoll_type.dep", FT_BOOLEAN, 8,
2134           NULL, 0x40, NULL, HFILL}},
2135         {&hf_pn532_autopoll_type_tcl,
2136          {"TCL", "pn532.autopoll_type.tcl", FT_BOOLEAN, 8,
2137           NULL, 0x20, NULL, HFILL}},
2138         {&hf_pn532_autopoll_type_mf_fe,
2139          {"Mf_Fe", "pn532.autopoll_type.mf_fe", FT_BOOLEAN, 8,
2140           NULL, 0x10, NULL, HFILL}},
2141         {&hf_pn532_autopoll_type_not_used,
2142          {"Not used", "pn532.autopoll_type.not_used", FT_BOOLEAN, 8,
2143           NULL, 0x08, NULL, HFILL}},
2144         {&hf_pn532_autopoll_type_baudrate_and_modulation,
2145          {"Baudrate and Modulation", "pn532.autopoll_type.baudrate_and_modulation", FT_UINT8, BASE_HEX,
2146           VALS(pn532_brtypes), 0x07, NULL, HFILL}},
2147         {&hf_pn532_nfc_id_3i,
2148          {"NFC ID 3i", "pn532.nfc_id_3i", FT_BYTES, BASE_NONE,
2149           NULL, 0x00, NULL, HFILL}},
2150         {&hf_pn532_next_not_used_2_7,
2151          {"Not Used", "pn532.next.not_used.2_7", FT_BOOLEAN, 8,
2152           NULL, 0xFC, NULL, HFILL}},
2153         {&hf_pn532_next_gi,
2154          {"Gi", "pn532.next.gi", FT_BOOLEAN, 8,
2155           TFS(&tfs_present_not_present), 0x02, NULL, HFILL}},
2156         {&hf_pn532_next_nfc_id_3i,
2157          {"NFC ID 3i", "pn532.next.nfc_id_3i", FT_BOOLEAN, 8,
2158           TFS(&tfs_present_not_present), 0x01, NULL, HFILL}},
2159         {&hf_pn532_nfc_id_3t,
2160          {"NFC ID 3t", "pn532.nfc_id_3t", FT_BYTES, BASE_NONE,
2161           NULL, 0x00, NULL, HFILL}},
2162         {&hf_pn532_communication_mode,
2163          {"Communication Mode", "pn532.communication_mode", FT_UINT8, BASE_HEX,
2164           VALS(pn532_communication_mode_vals), 0x00, NULL, HFILL}},
2165         {&hf_pn532_activation_baudrate,
2166          {"Baudrate", "pn532.activation_baudrate", FT_UINT8, BASE_HEX,
2167           VALS(pn532_speed_vals), 0x70, NULL, HFILL}},
2168         {&hf_pn532_jump_next_not_used_3_7,
2169          {"Not Used", "pn532.jump_next.not_used.3_7", FT_BOOLEAN, 8,
2170           NULL, 0xF8, NULL, HFILL}},
2171         {&hf_pn532_jump_next_gi,
2172          {"Gi", "pn532.jump_next.gi", FT_BOOLEAN, 8,
2173           TFS(&tfs_present_not_present), 0x04, NULL, HFILL}},
2174         {&hf_pn532_jump_next_nfc_id_3i,
2175          {"NFC ID 3i", "pn532.jump_next.nfc_id_3i", FT_BOOLEAN, 8,
2176           TFS(&tfs_present_not_present), 0x02, NULL, HFILL}},
2177         {&hf_pn532_jump_next_passive_initiator_data,
2178          {"Passive Initiator Data", "pn532.jump_next.passive_initiator_data", FT_BOOLEAN, 8,
2179           TFS(&tfs_present_not_present), 0x01, NULL, HFILL}},
2180         {&hf_pn532_passive_initiator_data,
2181          {"Passive Initiator Data", "pn532.passive_initiator_data", FT_BYTES, BASE_NONE,
2182           NULL, 0x00, NULL, HFILL}},
2183         {&hf_pn532_did_target,
2184          {"DID Target", "pn532.did_target", FT_UINT8, BASE_HEX_DEC,
2185           NULL, 0x00, NULL, HFILL}},
2186         {&hf_pn532_send_bit_rate_target,
2187          {"Send Bit Rate Target", "pn532.send_bit_rate_target", FT_UINT8, BASE_DEC_HEX,
2188           NULL, 0x00, NULL, HFILL}},
2189         {&hf_pn532_receive_bit_rate_target,
2190          {"Receive Bit Rate Target", "pn532.receive_bit_rate_target", FT_UINT8, BASE_DEC_HEX,
2191           NULL, 0x00, NULL, HFILL}},
2192         {&hf_pn532_timeout,
2193          {"Timeout", "pn532.timeout", FT_UINT8, BASE_DEC_HEX,
2194           NULL, 0x00, NULL, HFILL}},
2195         {&hf_pn532_optional_parameters,
2196          {"Optional Parameters", "pn532.optional_parameters", FT_UINT8, BASE_HEX,
2197           NULL, 0x00, NULL, HFILL}},
2198         {&hf_pn532_test_number,
2199          {"Test Number", "pn532.test_number", FT_UINT8, BASE_HEX,
2200           VALS(pn532_test_number_vals), 0x00, NULL, HFILL}},
2201         {&hf_pn532_parameters,
2202          {"Parameters", "pn532.diagnose_parameters", FT_BYTES, BASE_NONE,
2203           NULL, 0x00, NULL, HFILL}},
2204         {&hf_pn532_parameters_length,
2205          {"Parameters Length", "pn532.diagnose_parameters.length", FT_UINT8, BASE_DEC,
2206           NULL, 0x00, NULL, HFILL}},
2207         {&hf_pn532_sens_res,
2208          {"SENS RES", "pn532.sens_res", FT_UINT16, BASE_HEX,
2209           NULL, 0x00, NULL, HFILL}},
2210         {&hf_pn532_sel_res,
2211          {"SEL RES", "pn532.sel_res", FT_UINT8, BASE_HEX,
2212           NULL, 0x00, NULL, HFILL}},
2213         {&hf_pn532_nfc_id_length,
2214          {"NFC ID Length", "pn532.nfc_id_length", FT_UINT8, BASE_DEC,
2215           NULL, 0x00, NULL, HFILL}},
2216         {&hf_pn532_nfc_id_1,
2217          {"NFC ID 1", "pn532.nfc_id_1", FT_BYTES, BASE_NONE,
2218           NULL, 0x00, NULL, HFILL}},
2219         {&hf_pn532_ats_length,
2220          {"ATS Length", "pn532.ats_length", FT_UINT8, BASE_DEC,
2221           NULL, 0x00, NULL, HFILL}},
2222         {&hf_pn532_ats,
2223          {"ATS", "pn532.ats", FT_BYTES, BASE_NONE,
2224           NULL, 0x00, NULL, HFILL}},
2225         {&hf_pn532_pol_res_length,
2226          {"POL RES Length", "pn532.pol_res_length", FT_UINT8, BASE_DEC,
2227           NULL, 0x00, NULL, HFILL}},
2228         {&hf_pn532_response_code,
2229          {"Response Code", "pn532.response_code", FT_UINT8, BASE_HEX,
2230           NULL, 0x00, NULL, HFILL}},
2231         {&hf_pn532_nfc_id_2t,
2232          {"NFC ID 2t", "pn532.nfc_id_2t", FT_BYTES, BASE_NONE,
2233           NULL, 0x00, NULL, HFILL}},
2234         {&hf_pn532_pad,
2235          {"Pad", "pn532.pad", FT_BYTES, BASE_NONE,
2236           NULL, 0x00, NULL, HFILL}},
2237         {&hf_pn532_syst_code,
2238          {"Syst Code", "pn532.syst_code", FT_UINT16, BASE_HEX,
2239           NULL, 0x00, NULL, HFILL}},
2240         {&hf_pn532_atqb_response,
2241          {"ATQB Response", "pn532.atqb_response", FT_BYTES, BASE_NONE,
2242           NULL, 0x00, NULL, HFILL}},
2243         {&hf_pn532_attrib_res_length,
2244          {"Attrib RES Length", "pn532.attrib_res_length", FT_UINT8, BASE_DEC,
2245           NULL, 0x00, NULL, HFILL}},
2246         {&hf_pn532_attrib_res,
2247          {"Attrib RES", "pn532.attrib_res", FT_BYTES, BASE_NONE,
2248           NULL, 0x00, NULL, HFILL}},
2249         {&hf_pn532_jewel_id,
2250          {"Jewel ID", "pn532.jewel_id", FT_BYTES, BASE_NONE,
2251           NULL, 0x00, NULL, HFILL}},
2252         {&hf_pn532_response_for,
2253          { "Response for", "pn532.response_for", FT_FRAMENUM, BASE_NONE,
2254           NULL, 0x00, NULL, HFILL}},
2255         {&hf_pn532_diagnose_baudrate,
2256          {"Diagnose Baudrate", "pn532.diagnose_baudrate", FT_UINT8, BASE_HEX,
2257           VALS(pn532_diagnose_baudrate_vals), 0x00, NULL, HFILL}},
2258         {&hf_pn532_reply_delay,
2259          {"Reply Delay", "pn532.sam.reply_delay", FT_UINT8, BASE_CUSTOM,
2260           CF_FUNC(replay_delay_base), 0x0, NULL, HFILL}},
2261         {&hf_pn532_ciu_tx_mode,
2262          {"CIU Tx Mode", "pn532.ciu_tx_mode", FT_UINT8, BASE_HEX,
2263           NULL, 0x00, NULL, HFILL}},
2264         {&hf_pn532_ciu_rx_mode,
2265          {"CIU Rx Mode", "pn532.ciu_rx_mode", FT_UINT8, BASE_HEX,
2266           NULL, 0x00, NULL, HFILL}},
2267         {&hf_pn532_diagnose_number_of_fails,
2268          {"Number of Fails", "pn532.number_of_fails", FT_UINT8, BASE_DEC,
2269           NULL, 0x00, NULL, HFILL}},
2270         {&hf_pn532_diagnose_result,
2271          {"Result", "pn532.result", FT_BOOLEAN, BASE_NONE,
2272           TFS(&tfs_ok_error), 0x00, NULL, HFILL}},
2273         {&hf_pn532_andet_bot,
2274          {"Andet Bot", "pn532.andet.bot", FT_BOOLEAN, 8,
2275           NULL, 0x80, NULL, HFILL}},
2276         {&hf_pn532_andet_up,
2277          {"Andet Up", "pn532.andet.up", FT_BOOLEAN, 8,
2278           NULL, 0x40, NULL, HFILL}},
2279         {&hf_pn532_andet_ith,
2280          {"Andet Ith", "pn532.andet.ith", FT_BOOLEAN, 8,
2281           NULL, 0x3E, NULL, HFILL}},
2282         {&hf_pn532_andet_en,
2283          {"Andet En", "pn532.andet.en", FT_BOOLEAN, 8,
2284           NULL, 0x01, NULL, HFILL}}
2285     };
2286
2287     static ei_register_info ei[] = {
2288         { &ei_unknown_data,    { "pn532.expert.unknown_data",    PI_PROTOCOL, PI_NOTE, "Unknown data", EXPFILL }},
2289         { &ei_unexpected_data, { "pn532.expert.unexpected_data", PI_PROTOCOL, PI_WARN, "Unexpected data", EXPFILL }},
2290     };
2291
2292     static gint *ett[] = {
2293         &ett_pn532,
2294         &ett_pn532_flags,
2295         &ett_pn532_target,
2296         &ett_pn532_fw_support,
2297         &ett_pn532_config_212_kbps,
2298         &ett_pn532_config_424_kbps,
2299         &ett_pn532_config_848_kbps,
2300         &ett_pn532_mifare_parameters,
2301         &ett_pn532_felica_parameters,
2302         &ett_pn532_wakeup_enable,
2303         &ett_pn532_autopoll_type
2304     };
2305
2306     static const enum_val_t sub_enum_vals[] = {
2307         { "data",    "Data",        SUB_DATA    },
2308         { "felica",  "Sony FeliCa", SUB_FELICA  },
2309         { "mifare",  "NXP MiFare",  SUB_MIFARE  },
2310         { "iso7816", "ISO 7816",    SUB_ISO7816 },
2311         { NULL, NULL, 0 }
2312     };
2313
2314     command_info = wmem_tree_new_autoreset(wmem_epan_scope(), wmem_file_scope());
2315
2316     proto_pn532 = proto_register_protocol("NXP PN532", "PN532", "pn532");
2317     proto_register_field_array(proto_pn532, hf, array_length(hf));
2318     proto_register_subtree_array(ett, array_length(ett));
2319
2320     expert_pn532 = expert_register_protocol(proto_pn532);
2321     expert_register_field_array(expert_pn532, ei, array_length(ei));
2322
2323     pref_mod = prefs_register_protocol(proto_pn532, NULL);
2324     prefs_register_static_text_preference(pref_mod, "version",
2325             "PN532 protocol version is based on: \"UM0701-02; PN532 User Manual\"",
2326             "Version of protocol supported by this dissector.");
2327     prefs_register_enum_preference(pref_mod, "prtype532", "Payload Type", "Protocol payload type",
2328         &sub_selected, sub_enum_vals, FALSE);
2329
2330     new_register_dissector("pn532", dissect_pn532, proto_pn532);
2331 }
2332
2333 /* Handler registration */
2334 void proto_reg_handoff_pn532(void)
2335 {
2336     sub_handles[SUB_DATA] = find_dissector("data");
2337     sub_handles[SUB_FELICA] = find_dissector("felica");
2338     sub_handles[SUB_MIFARE] = find_dissector("mifare");
2339     sub_handles[SUB_ISO7816] = find_dissector("iso7816");
2340 }
2341
2342 /*
2343  * Editor modelines - http://www.wireshark.org/tools/modelines.html
2344  *
2345  * Local variables:
2346  * c-basic-offset: 4
2347  * tab-width: 8
2348  * indent-tabs-mode: nil
2349  * End:
2350  *
2351  * ex: set shiftwidth=4 tabstop=8 expandtab:
2352  * :indentSize=4:tabSize=8:noTabs=true:
2353  */