Merge tag 'drm-intel-gt-next-2023-03-16' of git://anongit.freedesktop.org/drm/drm...

Driver Changes:

- Fix issue #6333: "list_add corruption" and full system lockup from
  performance monitoring (Janusz)
- Give the punit time to settle before fatally failing (Aravind, Chris)
- Don't use stolen memory or BAR for ring buffers on LLC platforms (John)
- Add missing ecodes and correct timeline seqno on GuC error captures (John)
- Make sure DSM size has correct 1MiB granularity on Gen12+ (Nirmoy,
  Lucas)
- Fix potential SSEU max_subslices array-index-out-of-bounds access on Gen11 (Andrea)
- Whitelist COMMON_SLICE_CHICKEN3 for UMD access on Gen12+ (Matt R.)
- Apply Wa_1408615072/Wa_1407596294 correctly on Gen11 (Matt R)
- Apply LNCF/LBCF workarounds correctly on XeHP SDV/PVC/DG2 (Matt R)
- Implement Wa_1606376872 for Xe_LP (Gustavo)
- Consider GSI offset when doing MCR lookups on Meteorlake+ (Matt R.)
- Add engine TLB invalidation for Meteorlake (Matt R.)
- Fix GSC Driver-FLR completion on Meteorlake (Alan)
- Fix GSC races on driver load/unload on Meteorlake+ (Daniele)
- Disable MC6 for MTL A step (Badal)

- Consolidate TLB invalidation flow (Tvrtko)
- Improve debug GuC/HuC debug messages (Michal Wa., John)
- Move fd_install after last use of fence (Rob)
- Initialize the obj flags for shmem objects (Aravind)
- Fix missing debug object activation (Nirmoy)
- Probe lmem before the stolen portion (Matt A)
- Improve clean up of GuC busyness stats worker (John)
- Fix missing return code checks in GuC submission init (John)
- Annotate two more workaround/tuning registers as MCR on PVC (Matt R)
- Fix GEN8_MISCCPCTL definition and remove unused INF_UNIT_LEVEL_CLKGATE (Lucas)
- Use sysfs_emit() and sysfs_emit_at() (Nirmoy)
- Make kobj_type structures constant (Thomas W.)
- make kobj attributes const on gt/ (Jani)
- Remove the unused virtualized start hack on buddy allocator (Matt A)
- Remove redundant check for DG1 (Lucas)
- Move DG2 tuning to the right function (Lucas)
- Rename dev_priv to i915 for private data naming consistency in gt/ (Andi)
- Remove unnecessary whitelisting of CS_CTX_TIMESTAMP on Xe_HP platforms (Matt R.)
-

- Escape wildcard in method names in kerneldoc (Bagas)
- Selftest improvements (Chris, Jonathan, Tvrtko, Anshuman, Tejas)
- Fix sparse warnings (Jani)

[airlied: fix unused variable in intel_workarounds]
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ZBMSb42yjjzczRhj@jlahtine-mobl.ger.corp.intel.com

diff --cc drivers/gpu/drm/i915/gem/i915_gem_stolen.c
Simple merge

diff --cc drivers/gpu/drm/i915/gt/intel_gt.c
Simple merge

diff --cc drivers/gpu/drm/i915/gt/intel_gt_pm.c
Simple merge

diff --cc drivers/gpu/drm/i915/gt/intel_gt_regs.h
Simple merge

diff --cc drivers/gpu/drm/i915/gt/intel_rc6.c
Simple merge

diff --cc drivers/gpu/drm/i915/gt/intel_workarounds.c
index 8859eb118510cd5e20ed6c71b30cbb0d6481067c,60e9cf273c5ef6c0939a24fd6213b8a397d02979..e7ee24bcad893761e4bfa8cfc658c0d30851567c
--- 1/drivers/gpu/drm/i915/gt/intel_workarounds.c
--- 2/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@@ -1472,15 -1476,44 +1476,11 @@@ gen12_gt_workarounds_init(struct intel_
  static void
  dg1_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
  {
--      struct drm_i915_private *i915 = gt->i915;
--
        gen12_gt_workarounds_init(gt, wal);
  
 -      /* Wa_1607087056:dg1 */
 -      if (IS_DG1_GRAPHICS_STEP(i915, STEP_A0, STEP_B0))
 -              wa_write_or(wal,
 -                          GEN11_SLICE_UNIT_LEVEL_CLKGATE,
 -                          L3_CLKGATE_DIS | L3_CR2X_CLKGATE_DIS);
 -
        /* Wa_1409420604:dg1 */
-       if (IS_DG1(i915))
-               wa_mcr_write_or(wal,
-                               SUBSLICE_UNIT_LEVEL_CLKGATE2,
-                               CPSSUNIT_CLKGATE_DIS);
+       wa_mcr_write_or(wal, SUBSLICE_UNIT_LEVEL_CLKGATE2,
+                       CPSSUNIT_CLKGATE_DIS);
  
        /* Wa_1408615072:dg1 */
        /* Empirical testing shows this register is unaffected by engine reset. */
@@@ -2160,11 -2232,20 +2197,6 @@@ static void tgl_whitelist_build(struct 
        }
  }
  
- static void xehpsdv_whitelist_build(struct intel_engine_cs *engine)
 -static void dg1_whitelist_build(struct intel_engine_cs *engine)
--{
-       allow_read_ctx_timestamp(engine);
 -      struct i915_wa_list *w = &engine->whitelist;
 -
 -      tgl_whitelist_build(engine);
 -
 -      /* GEN:BUG:1409280441:dg1 */
 -      if (IS_DG1_GRAPHICS_STEP(engine->i915, STEP_A0, STEP_B0) &&
 -          (engine->class == RENDER_CLASS ||
 -           engine->class == COPY_ENGINE_CLASS))
 -              whitelist_reg_ext(w, RING_ID(engine->mmio_base),
 -                                RING_FORCE_TO_NONPRIV_ACCESS_RD);
--}
--
  static void dg2_whitelist_build(struct intel_engine_cs *engine)
  {
        struct i915_wa_list *w = &engine->whitelist;
@@@ -2238,7 -2333,9 +2284,7 @@@ void intel_engine_init_whitelist(struc
        else if (IS_DG2(i915))
                dg2_whitelist_build(engine);
        else if (IS_XEHPSDV(i915))
-               xehpsdv_whitelist_build(engine);
+               ; /* none needed */
 -      else if (IS_DG1(i915))
 -              dg1_whitelist_build(engine);
        else if (GRAPHICS_VER(i915) == 12)
                tgl_whitelist_build(engine);
        else if (GRAPHICS_VER(i915) == 11)

diff --cc drivers/gpu/drm/i915/i915_driver.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_reg.h
Simple merge

diff --cc drivers/gpu/drm/i915/intel_uncore.c
Simple merge