arm64/sysreg: Convert HCRX_EL2 to automatic generation

Convert HCRX_EL2 to be automatically generated as per DDI04187H.a, n
functional changes.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Kristina Martsenko <kristina.martsenko@arm.com>
Link: https://lore.kernel.org/r/20220905225425.1871461-21-broonie@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 99a8c433db230dc31a0cc133c167ea291ead05a5..74690363ae39126a3f1d155db45a08dcbb99bf17 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -533,7 +533,6 @@
 #define SYS_HFGWTR_EL2                 sys_reg(3, 4, 1, 1, 5)
 #define SYS_HFGITR_EL2                 sys_reg(3, 4, 1, 1, 6)
 #define SYS_TRFCR_EL2                  sys_reg(3, 4, 1, 2, 1)
-#define SYS_HCRX_EL2                   sys_reg(3, 4, 1, 2, 2)
 #define SYS_HDFGRTR_EL2                        sys_reg(3, 4, 3, 1, 4)
 #define SYS_HDFGWTR_EL2                        sys_reg(3, 4, 3, 1, 5)
 #define SYS_HAFGRTR_EL2                        sys_reg(3, 4, 3, 1, 6)
@@ -1023,9 +1022,6 @@
 #define TRFCR_ELx_ExTRE                        BIT(1)
 #define TRFCR_ELx_E0TRE                        BIT(0)
 
-/* HCRX_EL2 definitions */
-#define HCRX_EL2_SMPME_MASK            (1 << 5)
-
 /* GIC Hypervisor interface registers */
 /* ICH_MISR_EL2 bit definitions */
 #define ICH_MISR_EOI           (1 << 0)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 185bc5b0faf7520224e405d55eb702a6223c7cff..746d4d40133e2f3e73f25550362a3e82d7d27b4f 100644 (file)
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -516,6 +516,22 @@ Sysreg     ZCR_EL2 3       4       1       2       0
 Fields ZCR_ELx
 EndSysreg
 
+Sysreg HCRX_EL2        3       4       1       2       2
+Res0   63:12
+Field  11      MSCEn
+Field  10      MCE2
+Field  9       CMOW
+Field  8       VFNMI
+Field  7       VINMI
+Field  6       TALLINT
+Field  5       SMPME
+Field  4       FGTnXS
+Field  3       FnXS
+Field  2       EnASR
+Field  1       EnALS
+Field  0       EnAS0
+EndSysreg
+
 Sysreg SMPRIMAP_EL2    3       4       1       2       5
 Field  63:60   P15
 Field  59:56   P14