ASoC: fsl_micfil: fold fsl_set_clock_params() into its only user
authorSascha Hauer <s.hauer@pengutronix.de>
Thu, 14 Apr 2022 16:22:48 +0000 (18:22 +0200)
committerMark Brown <broonie@kernel.org>
Tue, 19 Apr 2022 11:06:30 +0000 (12:06 +0100)
fsl_set_clock_params() is used only once and easily be folded into its
caller, do so.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shengjiu Wang <shengjiu.wang@gmail.com>
Link: https://lore.kernel.org/r/20220414162249.3934543-21-s.hauer@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/fsl/fsl_micfil.c

index a603033daed699e146f94d4de05f4dcbe8076482..8c7b15dbd1d45891148d62e21a8f512a482975d2 100644 (file)
@@ -252,29 +252,6 @@ static int fsl_micfil_trigger(struct snd_pcm_substream *substream, int cmd,
        return 0;
 }
 
-static int fsl_set_clock_params(struct device *dev, unsigned int rate)
-{
-       struct fsl_micfil *micfil = dev_get_drvdata(dev);
-       int clk_div = 8;
-       int osr = MICFIL_OSR_DEFAULT;
-       int ret;
-
-       ret = clk_set_rate(micfil->mclk, rate * clk_div * osr * 8);
-       if (ret)
-               return ret;
-
-       ret = micfil_set_quality(micfil);
-       if (ret)
-               return ret;
-
-       ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2,
-                                MICFIL_CTRL2_CLKDIV | MICFIL_CTRL2_CICOSR,
-                                FIELD_PREP(MICFIL_CTRL2_CLKDIV, clk_div) |
-                                FIELD_PREP(MICFIL_CTRL2_CICOSR, 16 - osr));
-
-       return ret;
-}
-
 static int fsl_micfil_hw_params(struct snd_pcm_substream *substream,
                                struct snd_pcm_hw_params *params,
                                struct snd_soc_dai *dai)
@@ -282,7 +259,8 @@ static int fsl_micfil_hw_params(struct snd_pcm_substream *substream,
        struct fsl_micfil *micfil = snd_soc_dai_get_drvdata(dai);
        unsigned int channels = params_channels(params);
        unsigned int rate = params_rate(params);
-       struct device *dev = &micfil->pdev->dev;
+       int clk_div = 8;
+       int osr = MICFIL_OSR_DEFAULT;
        int ret;
 
        /* 1. Disable the module */
@@ -297,11 +275,18 @@ static int fsl_micfil_hw_params(struct snd_pcm_substream *substream,
        if (ret)
                return ret;
 
-       ret = fsl_set_clock_params(dev, rate);
-       if (ret < 0) {
-               dev_err(dev, "Failed to set clock parameters [%d]\n", ret);
+       ret = clk_set_rate(micfil->mclk, rate * clk_div * osr * 8);
+       if (ret)
                return ret;
-       }
+
+       ret = micfil_set_quality(micfil);
+       if (ret)
+               return ret;
+
+       ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2,
+                                MICFIL_CTRL2_CLKDIV | MICFIL_CTRL2_CICOSR,
+                                FIELD_PREP(MICFIL_CTRL2_CLKDIV, clk_div) |
+                                FIELD_PREP(MICFIL_CTRL2_CICOSR, 16 - osr));
 
        micfil->dma_params_rx.peripheral_config = &micfil->sdmacfg;
        micfil->dma_params_rx.peripheral_size = sizeof(micfil->sdmacfg);