drm/i915: Bypass LMEMBAR/GTTMMADR for MTL stolen memory access
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 2 Feb 2024 22:43:28 +0000 (00:43 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 6 Feb 2024 23:58:54 +0000 (01:58 +0200)
On MTL accessing stolen memory via the BARs is somehow borked,
and it can hang the machine. As a workaround let's bypass the
BARs and just go straight to DSMBASE/GSMBASE instead.

Note that on every other platform this itself would hang the
machine, but on MTL the system firmware is expected to relax
the access permission guarding stolen memory to enable this
workaround, and thus direct CPU accesses should be fine.

The raw stolen memory areas won't be passed to VMs so we'll
need to risk using the BAR there for the initial setup. Once
command submission is up we should switch to MI_UPDATE_GTT
which at least shouldn't hang the whole machine.

v2: Don't use direct GSM/DSM access on guests
    Add w/a number
v3: Check register 0x138914 to see if pcode did its job
    Add some debug prints

Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
Tested-by: Paz Zcharya <pazz@chromium.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240202224340.30647-5-ville.syrjala@linux.intel.com
drivers/gpu/drm/i915/gem/i915_gem_stolen.c
drivers/gpu/drm/i915/gt/intel_ggtt.c
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/i915_utils.c
drivers/gpu/drm/i915/i915_utils.h

index ee237043c302fa36d68ef4b16ed75540df382ddb..9ddcae9b399728e3f0755a57098669e1fc09bbb9 100644 (file)
@@ -941,7 +941,11 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, u16 type,
                dsm_size = ALIGN_DOWN(lmem_size - dsm_base, SZ_1M);
        }
 
-       if (pci_resource_len(pdev, GEN12_LMEM_BAR) < lmem_size) {
+       if (i915_direct_stolen_access(i915)) {
+               drm_dbg(&i915->drm, "Using direct DSM access\n");
+               io_start = intel_uncore_read64(uncore, GEN12_DSMBASE) & GEN12_BDSM_MASK;
+               io_size = dsm_size;
+       } else if (pci_resource_len(pdev, GEN12_LMEM_BAR) < lmem_size) {
                io_start = 0;
                io_size = 0;
        } else {
index 21a7e3191c1827be0632bce4103af1465f560ebb..bce5d80253401031e24302e2a4901641e079e2c5 100644 (file)
@@ -24,6 +24,7 @@
 #include "intel_ring.h"
 #include "i915_drv.h"
 #include "i915_pci.h"
+#include "i915_reg.h"
 #include "i915_request.h"
 #include "i915_scatterlist.h"
 #include "i915_utils.h"
@@ -1152,13 +1153,20 @@ static unsigned int gen6_gttadr_offset(struct drm_i915_private *i915)
 static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 size)
 {
        struct drm_i915_private *i915 = ggtt->vm.i915;
+       struct intel_uncore *uncore = ggtt->vm.gt->uncore;
        struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
        phys_addr_t phys_addr;
        u32 pte_flags;
        int ret;
 
        GEM_WARN_ON(pci_resource_len(pdev, GEN4_GTTMMADR_BAR) != gen6_gttmmadr_size(i915));
-       phys_addr = pci_resource_start(pdev, GEN4_GTTMMADR_BAR) + gen6_gttadr_offset(i915);
+
+       if (i915_direct_stolen_access(i915)) {
+               drm_dbg(&i915->drm, "Using direct GSM access\n");
+               phys_addr = intel_uncore_read64(uncore, GEN12_GSMBASE) & GEN12_BDSM_MASK;
+       } else {
+               phys_addr = pci_resource_start(pdev, GEN4_GTTMMADR_BAR) + gen6_gttadr_offset(i915);
+       }
 
        if (needs_wc_ggtt_mapping(i915))
                ggtt->gsm = ioremap_wc(phys_addr, size);
index 0b9e018256c76bc8aed1266e565812e1dfd37b61..c1bf70d62ead00a997bcd4de2ecdae09b654d7af 100644 (file)
 #define   GEN6_PCODE_FREQ_RING_RATIO_SHIFT     16
 #define GEN6_PCODE_DATA1                       _MMIO(0x13812C)
 
+#define MTL_PCODE_STOLEN_ACCESS                        _MMIO(0x138914)
+#define   STOLEN_ACCESS_ALLOWED                        0x1
+
 /* IVYBRIDGE DPF */
 #define GEN7_L3CDERRST1(slice)         _MMIO(0xB008 + (slice) * 0x200) /* L3CD Error Status 1 */
 #define   GEN7_L3CDERRST1_ROW_MASK     (0x7ff << 14)
index 29fd02bf5ea8c5d96eb904b2d9265a6c7259abc3..6f9e7b354b5441dbe518827ad6e48df99cdbccea 100644 (file)
@@ -8,6 +8,7 @@
 #include <drm/drm_drv.h>
 
 #include "i915_drv.h"
+#include "i915_reg.h"
 #include "i915_utils.h"
 
 #define FDO_BUG_MSG "Please file a bug on drm/i915; see " FDO_BUG_URL " for details."
@@ -125,3 +126,19 @@ bool i915_vtd_active(struct drm_i915_private *i915)
        /* Running as a guest, we assume the host is enforcing VT'd */
        return i915_run_as_guest();
 }
+
+bool i915_direct_stolen_access(struct drm_i915_private *i915)
+{
+       /*
+        * Wa_22018444074
+        *
+        * Access via BAR can hang MTL, go directly to GSM/DSM,
+        * except for VM guests which won't have access to it.
+        *
+        * Normally this would not work but on MTL the system firmware
+        * should have relaxed the access permissions sufficiently.
+        * 0x138914==0x1 indicates that the firmware has done its job.
+        */
+       return IS_METEORLAKE(i915) && !i915_run_as_guest() &&
+               intel_uncore_read(&i915->uncore, MTL_PCODE_STOLEN_ACCESS) == STOLEN_ACCESS_ALLOWED;
+}
index f98577967b7fc91480d7355c9ace095a09f98573..b45ef0560611a8fc5653b6bb4237d12db806c55f 100644 (file)
@@ -391,4 +391,6 @@ static inline bool i915_run_as_guest(void)
 
 bool i915_vtd_active(struct drm_i915_private *i915);
 
+bool i915_direct_stolen_access(struct drm_i915_private *i915);
+
 #endif /* !__I915_UTILS_H */