drm/msm/a6xx: restore previous freq on resume
authorRob Clark <robdclark@chromium.org>
Mon, 18 Nov 2019 23:39:11 +0000 (15:39 -0800)
committerRob Clark <robdclark@chromium.org>
Thu, 2 Jan 2020 22:07:30 +0000 (14:07 -0800)
Previously, if the freq were overriden (ie. via sysfs), it would get
reset to max on resume.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
drivers/gpu/drm/msm/adreno/a6xx_gmu.c
drivers/gpu/drm/msm/adreno/a6xx_gmu.h

index 85f14feafdecd4d383dc78724fc0964e3a55f2f0..2e82e04e3bfc464de276f06528ba4f846ea0fe3b 100644 (file)
@@ -149,6 +149,8 @@ void a6xx_gmu_set_freq(struct msm_gpu *gpu, unsigned long freq)
                if (freq == gmu->gpu_freqs[perf_index])
                        break;
 
+       gmu->current_perf_index = perf_index;
+
        __a6xx_gmu_set_freq(gmu, perf_index);
 }
 
@@ -741,8 +743,8 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu)
        gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_MASK, ~A6XX_HFI_IRQ_MASK);
        enable_irq(gmu->hfi_irq);
 
-       /* Set the GPU to the highest power frequency */
-       __a6xx_gmu_set_freq(gmu, gmu->nr_gpu_freqs - 1);
+       /* Set the GPU to the current freq */
+       __a6xx_gmu_set_freq(gmu, gmu->current_perf_index);
 
        /*
         * "enable" the GX power domain which won't actually do anything but it
@@ -1166,6 +1168,8 @@ static int a6xx_gmu_pwrlevels_probe(struct a6xx_gmu *gmu)
        gmu->nr_gpu_freqs = a6xx_gmu_build_freq_table(&gpu->pdev->dev,
                gmu->gpu_freqs, ARRAY_SIZE(gmu->gpu_freqs));
 
+       gmu->current_perf_index = gmu->nr_gpu_freqs - 1;
+
        /* Build the list of RPMh votes that we'll send to the GMU */
        return a6xx_gmu_rpmh_votes_init(gmu);
 }
index 39a26dd6367440d77f3b95bccbeadf61ce717f26..2af91ed7ed0ca498f992453118b565cf4cfb4d39 100644 (file)
@@ -63,6 +63,9 @@ struct a6xx_gmu {
        struct clk_bulk_data *clocks;
        struct clk *core_clk;
 
+       /* current performance index set externally */
+       int current_perf_index;
+
        int nr_gpu_freqs;
        unsigned long gpu_freqs[16];
        u32 gx_arc_votes[16];