drm/i915: Avoid using dev_priv->info.gen directly.
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 26 Sep 2017 21:13:46 +0000 (14:13 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Wed, 27 Sep 2017 15:38:14 +0000 (08:38 -0700)
Let's stop this usage before it spreads so much.

1. This check is not part of usual searches happening when adding
new platform.
2. There is already a duplication here with INTEL_INFO(dev_priv)->gen
and INTEL_GEN(dev_priv).

So let's please avoid yet another way.

Cc: Lyude <cpaul@redhat.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170926211346.12009-1-rodrigo.vivi@intel.com
drivers/gpu/drm/i915/intel_display.c

index 8a185971798b36a9d2b2a80c2cfe2c9fc9b295cf..aa9ccc3ecff9fc3da67374d8a21a01f8554a1d04 100644 (file)
@@ -9310,11 +9310,11 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
        pipe_config->gamma_mode =
                I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK;
 
-       if (IS_BROADWELL(dev_priv) || dev_priv->info.gen >= 9) {
+       if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9) {
                u32 tmp = I915_READ(PIPEMISC(crtc->pipe));
                bool clrspace_yuv = tmp & PIPEMISC_OUTPUT_COLORSPACE_YUV;
 
-               if (IS_GEMINILAKE(dev_priv) || dev_priv->info.gen >= 10) {
+               if (IS_GEMINILAKE(dev_priv) || INTEL_GEN(dev_priv) >= 10) {
                        bool blend_mode_420 = tmp &
                                              PIPEMISC_YUV420_MODE_FULL_BLEND;
 
@@ -14280,7 +14280,7 @@ void intel_init_display_hooks(struct drm_i915_private *dev_priv)
                dev_priv->display.fdi_link_train = hsw_fdi_link_train;
        }
 
-       if (dev_priv->info.gen >= 9)
+       if (INTEL_GEN(dev_priv) >= 9)
                dev_priv->display.update_crtcs = skl_update_crtcs;
        else
                dev_priv->display.update_crtcs = intel_update_crtcs;