drm/i915/icl: Fix signal_levels
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Wed, 17 Oct 2018 21:56:52 +0000 (14:56 -0700)
committerJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Thu, 18 Oct 2018 07:31:07 +0000 (10:31 +0300)
Since when it was introduced we forgot to add
this case so ICL was using a wrong signal_levels
as reference.

Fixes: fb5c8e9d4350 ("drm/i915/icl: Implement voltage swing programming sequence for Combo PHY DDI")
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181017215652.26841-1-rodrigo.vivi@intel.com
(cherry picked from commit 61cdfb9e194d2a327eef301e8fc80b63e3e1dc7a)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
drivers/gpu/drm/i915/intel_dp.c

index 06e91d7b6d8e64957bf90b49e94bb0bc56de67e8..3fae4dab295f093892491ecd010970dc7fc28128 100644 (file)
@@ -3734,7 +3734,7 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp)
        uint32_t signal_levels, mask = 0;
        uint8_t train_set = intel_dp->train_set[0];
 
-       if (IS_GEN9_LP(dev_priv) || IS_CANNONLAKE(dev_priv)) {
+       if (IS_GEN9_LP(dev_priv) || INTEL_GEN(dev_priv) >= 10) {
                signal_levels = bxt_signal_levels(intel_dp);
        } else if (HAS_DDI(dev_priv)) {
                signal_levels = ddi_signal_levels(intel_dp);