drm/i915: Pass intel_gt to intel_engines_init_mmio
authorTvrtko Ursulin <tvrtko.ursulin@intel.com>
Tue, 22 Oct 2019 09:47:15 +0000 (10:47 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Tue, 22 Oct 2019 11:16:42 +0000 (12:16 +0100)
Engines belong to the GT so make it indicative in the API.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191022094726.3001-2-tvrtko.ursulin@linux.intel.com
drivers/gpu/drm/i915/gt/intel_engine.h
drivers/gpu/drm/i915/gt/intel_engine_cs.c
drivers/gpu/drm/i915/i915_drv.c

index 93ea367fe624682c3275fc933eb3cac11cec58c3..638b19544acd556564187cb71c31c9fe8470340d 100644 (file)
@@ -20,6 +20,8 @@
 
 struct drm_printer;
 
+struct intel_gt;
+
 /* Early gen2 devices have a cacheline of just 32 bytes, using 64 is overkill,
  * but keeps the logic simple. Indeed, the whole purpose of this macro is just
  * to give some inclination as to some of the magic values used in the various
@@ -322,7 +324,7 @@ __intel_ring_space(unsigned int head, unsigned int tail, unsigned int size)
        return (head - tail - CACHELINE_BYTES) & (size - 1);
 }
 
-int intel_engines_init_mmio(struct drm_i915_private *i915);
+int intel_engines_init_mmio(struct intel_gt *gt);
 int intel_engines_setup(struct drm_i915_private *i915);
 int intel_engines_init(struct drm_i915_private *i915);
 void intel_engines_cleanup(struct drm_i915_private *i915);
index 051734c9b73338e810f1299b168197c809b477be..735037f11cc57d6fcd1f1b909caad4733cd6ae37 100644 (file)
@@ -396,12 +396,13 @@ void intel_engines_cleanup(struct drm_i915_private *i915)
 
 /**
  * intel_engines_init_mmio() - allocate and prepare the Engine Command Streamers
- * @i915: the i915 device
+ * @gt: pointer to struct intel_gt
  *
  * Return: non-zero if the initialization failed.
  */
-int intel_engines_init_mmio(struct drm_i915_private *i915)
+int intel_engines_init_mmio(struct intel_gt *gt)
 {
+       struct drm_i915_private *i915 = gt->i915;
        struct intel_device_info *device_info = mkwrite_device_info(i915);
        const unsigned int engine_mask = INTEL_INFO(i915)->engine_mask;
        unsigned int mask = 0;
@@ -419,7 +420,7 @@ int intel_engines_init_mmio(struct drm_i915_private *i915)
                if (!HAS_ENGINE(i915, i))
                        continue;
 
-               err = intel_engine_setup(&i915->gt, i);
+               err = intel_engine_setup(gt, i);
                if (err)
                        goto cleanup;
 
@@ -436,7 +437,7 @@ int intel_engines_init_mmio(struct drm_i915_private *i915)
 
        RUNTIME_INFO(i915)->num_engines = hweight32(mask);
 
-       intel_gt_check_and_clear_faults(&i915->gt);
+       intel_gt_check_and_clear_faults(gt);
 
        intel_setup_engine_capabilities(i915);
 
index 157ed22052a25176220e250e498a6563d80663f8..c4c7caa73f237058ddc11949c46d8a4216708ed0 100644 (file)
@@ -598,7 +598,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
 
        intel_uc_init_mmio(&dev_priv->gt.uc);
 
-       ret = intel_engines_init_mmio(dev_priv);
+       ret = intel_engines_init_mmio(&dev_priv->gt);
        if (ret)
                goto err_uncore;