Merge branch 'x86/cpu' into x86/core, to resolve conflicts

Conflicts:
	arch/x86/include/asm/cpufeatures.h

Signed-off-by: Ingo Molnar <mingo@kernel.org>

diff --cc arch/x86/include/asm/cpufeatures.h
index c5bda3553a2826ffe715dd2e97a0eff806506a98,5cd22090e53de5d6a994effd18e9acdcd0d9ea44..9a59e2e73bee7a4aa8fb266ef67664b3fa735af5
--- 1/arch/x86/include/asm/cpufeatures.h
--- 2/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@@ -390,8 -387,10 +387,11 @@@
  #define X86_FEATURE_TSXLDTRK          (18*32+16) /* TSX Suspend Load Address Tracking */
  #define X86_FEATURE_PCONFIG           (18*32+18) /* Intel PCONFIG */
  #define X86_FEATURE_ARCH_LBR          (18*32+19) /* Intel ARCH LBR */
 +#define X86_FEATURE_IBT                       (18*32+20) /* Indirect Branch Tracking */
+ #define X86_FEATURE_AMX_BF16          (18*32+22) /* AMX bf16 Support */
  #define X86_FEATURE_AVX512_FP16               (18*32+23) /* AVX512 FP16 */
+ #define X86_FEATURE_AMX_TILE          (18*32+24) /* AMX tile Support */
+ #define X86_FEATURE_AMX_INT8          (18*32+25) /* AMX int8 Support */
  #define X86_FEATURE_SPEC_CTRL         (18*32+26) /* "" Speculation Control (IBRS + IBPB) */
  #define X86_FEATURE_INTEL_STIBP               (18*32+27) /* "" Single Thread Indirect Branch Predictors */
  #define X86_FEATURE_FLUSH_L1D         (18*32+28) /* Flush L1D cache */

diff --cc arch/x86/include/asm/processor.h
Simple merge

diff --cc arch/x86/kernel/cpu/common.c
Simple merge

diff --cc arch/x86/kernel/process.c
Simple merge