ARM: dts: sunxi: Move wakeup-capable IRQs to r_intc
authorSamuel Holland <samuel@sholland.org>
Mon, 18 Jan 2021 05:50:38 +0000 (23:50 -0600)
committerChen-Yu Tsai <wens@csie.org>
Sat, 6 Mar 2021 07:39:18 +0000 (15:39 +0800)
All IRQs that can be used to wake up the system must be routed through
r_intc, so they are visible to firmware while the system is suspended.

In addition to the external NMI input, which is already routed through
r_intc, these include PIO and R_PIO (gpio-keys), the LRADC, and the RTC.

Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
arch/arm/boot/dts/sun6i-a31.dtsi
arch/arm/boot/dts/sun8i-a23-a33.dtsi
arch/arm/boot/dts/sun8i-a83t.dtsi
arch/arm/boot/dts/sunxi-h3-h5.dtsi

index 9532331af8ef0a7f2e1c4136e7bd0f8dfa6c8993..a31f9072bf79da6f3a13e82b49f1ded7c2fc684a 100644 (file)
                pio: pinctrl@1c20800 {
                        compatible = "allwinner,sun6i-a31-pinctrl";
                        reg = <0x01c20800 0x400>;
+                       interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
                lradc: lradc@1c22800 {
                        compatible = "allwinner,sun4i-a10-lradc-keys";
                        reg = <0x01c22800 0x100>;
+                       interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
                };
                        #clock-cells = <1>;
                        compatible = "allwinner,sun6i-a31-rtc";
                        reg = <0x01f00000 0x54>;
+                       interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&osc32k>;
                r_pio: pinctrl@1f02c00 {
                        compatible = "allwinner,sun6i-a31-r-pinctrl";
                        reg = <0x01f02c00 0x400>;
+                       interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;
index a84c90a660ca0ae98f5b262373958aadfdd5a35b..4461d5098b20b7c423a67af3519c6733bfcd3e86 100644 (file)
                pio: pinctrl@1c20800 {
                        /* compatible gets set in SoC specific dtsi file */
                        reg = <0x01c20800 0x400>;
+                       interrupt-parent = <&r_intc>;
                        /* interrupts get set in SoC specific dtsi file */
                        clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
                        clock-names = "apb", "hosc", "losc";
                lradc: lradc@1c22800 {
                        compatible = "allwinner,sun4i-a10-lradc-keys";
                        reg = <0x01c22800 0x100>;
+                       interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
                };
                rtc: rtc@1f00000 {
                        compatible = "allwinner,sun8i-a23-rtc";
                        reg = <0x01f00000 0x400>;
+                       interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
                        clock-output-names = "osc32k", "osc32k-out";
                r_pio: pinctrl@1f02c00 {
                        compatible = "allwinner,sun8i-a23-r-pinctrl";
                        reg = <0x01f02c00 0x400>;
+                       interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;
                        clock-names = "apb", "hosc", "losc";
index 335f4beda917e4be4668e977d25df392b9abc5e9..ac97eac91349b93a2c7a190d8ccf7eeb05100ac3 100644 (file)
 
                pio: pinctrl@1c20800 {
                        compatible = "allwinner,sun8i-a83t-pinctrl";
+                       interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
                r_lradc: lradc@1f03c00 {
                        compatible = "allwinner,sun8i-a83t-r-lradc";
                        reg = <0x01f03c00 0x100>;
+                       interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
                };
                r_pio: pinctrl@1f02c00 {
                        compatible = "allwinner,sun8i-a83t-r-pinctrl";
                        reg = <0x01f02c00 0x400>;
+                       interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>,
                                 <&osc16Md512>;
index 4bf25c5b873effceba02cc5a6f60fe9972d008c4..c7428df9469e65fa3d4662ef9736fcf1cf32f0a6 100644 (file)
                pio: pinctrl@1c20800 {
                        /* compatible is in per SoC .dtsi file */
                        reg = <0x01c20800 0x400>;
+                       interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
                rtc: rtc@1f00000 {
                        /* compatible is in per SoC .dtsi file */
                        reg = <0x01f00000 0x400>;
+                       interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
                        clock-output-names = "osc32k", "osc32k-out", "iosc";
                r_pio: pinctrl@1f02c00 {
                        compatible = "allwinner,sun8i-h3-r-pinctrl";
                        reg = <0x01f02c00 0x400>;
+                       interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>;
                        clock-names = "apb", "hosc", "losc";