ARM: dts: imx6-sr-som: add ethernet PHY configuration

Add ethernet PHY configuration ahead of removing the quirk that
configures the clocking mode for the PHY.  The RGMII delay is
already set correctly.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi
index 6d7f6b9035bc173eae0ba1369a07c07e94162049..b06577808ff4eb13b644a489af529b2df7ee7ea7 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi
@@ -53,10 +53,21 @@
 &fec {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
+       phy-handle = <&phy>;
        phy-mode = "rgmii-id";
        phy-reset-duration = <2>;
        phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
        status = "okay";
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               phy: ethernet-phy@0 {
+                       reg = <0>;
+                       qca,clk-out-frequency = <125000000>;
+               };
+       };
 };
 
 &iomuxc {