dt-bindings: clk: at91: add an I2S mux clock

The I2S mux clock can be used to select the I2S input clock. The
available parents are the peripheral and the generated clocks.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt b/Documentation/devicetree/bindings/clock/at91-clock.txt
index 51c259a92d0294e31be12a2b4552e074b7d38e70..d0adbf5ae1447d35761fd4169d52cdabe9e92e2c 100644 (file)
--- a/Documentation/devicetree/bindings/clock/at91-clock.txt
+++ b/Documentation/devicetree/bindings/clock/at91-clock.txt
@@ -91,6 +91,9 @@ Required properties:
                at91 audio pll output on AUDIOPLLCLK that feeds the PMC
                and can be used by peripheral clock or generic clock
 
+       "atmel,sama5d2-clk-i2s-mux" (under pmc node):
+               at91 I2S clock source selection
+
 Required properties for SCKC node:
 - reg : defines the IO memory reserved for the SCKC.
 - #size-cells : shall be 0 (reg is used to encode clk id).
@@ -507,3 +510,35 @@ For example:
                        atmel,clk-output-range = <0 83000000>;
                };
        };
+
+Required properties for I2S mux clocks:
+- #size-cells : shall be 0 (reg is used to encode I2S bus id).
+- #address-cells : shall be 1 (reg is used to encode I2S bus id).
+- name: device tree node describing a specific mux clock.
+       * #clock-cells : from common clock binding; shall be set to 0.
+       * clocks : shall be the mux clock parent phandles; shall be 2 phandles:
+         peripheral and generated clock; the first phandle shall belong to the
+         peripheral clock and the second one shall belong to the generated
+         clock; "clock-indices" property can be user to specify
+         the correct order.
+       * reg: I2S bus id of the corresponding mux clock.
+         e.g. reg = <0>; for i2s0, reg = <1>; for i2s1
+
+For example:
+       i2s_clkmux {
+               compatible = "atmel,sama5d2-clk-i2s-mux";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               i2s0muxck: i2s0_muxclk {
+                       clocks = <&i2s0_clk>, <&i2s0_gclk>;
+                       #clock-cells = <0>;
+                       reg = <0>;
+               };
+
+               i2s1muxck: i2s1_muxclk {
+                       clocks = <&i2s1_clk>, <&i2s1_gclk>;
+                       #clock-cells = <0>;
+                       reg = <1>;
+               };
+       };