arm64: dts: qcom: ipq6018: switch USB QMP PHY to new style of bindings
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Thu, 24 Aug 2023 21:19:43 +0000 (00:19 +0300)
committerBjorn Andersson <andersson@kernel.org>
Tue, 14 Nov 2023 17:03:45 +0000 (11:03 -0600)
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230824211952.1397699-8-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/ipq6018.dtsi

index 9aec89d5e095bcc226151d94e947bb9eb7328ce6..a89b6f54d3a787ede4de45a44d1d5cea08d72020 100644 (file)
 
                ssphy_0: ssphy@78000 {
                        compatible = "qcom,ipq6018-qmp-usb3-phy";
-                       reg = <0x0 0x00078000 0x0 0x1c4>;
-                       #address-cells = <2>;
-                       #size-cells = <2>;
-                       ranges;
+                       reg = <0x0 0x00078000 0x0 0x1000>;
 
                        clocks = <&gcc GCC_USB0_AUX_CLK>,
-                                <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, <&xo>;
-                       clock-names = "aux", "cfg_ahb", "ref";
+                                <&xo>,
+                                <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
+                                <&gcc GCC_USB0_PIPE_CLK>;
+                       clock-names = "aux",
+                                     "ref",
+                                     "cfg_ahb",
+                                     "pipe";
+                       clock-output-names = "gcc_usb0_pipe_clk_src";
+                       #clock-cells = <0>;
+                       #phy-cells = <0>;
 
                        resets = <&gcc GCC_USB0_PHY_BCR>,
                                 <&gcc GCC_USB3PHY_0_PHY_BCR>;
-                       reset-names = "phy","common";
-                       status = "disabled";
+                       reset-names = "phy",
+                                     "phy_phy";
 
-                       usb0_ssphy: phy@78200 {
-                               reg = <0x0 0x00078200 0x0 0x130>, /* Tx */
-                                     <0x0 0x00078400 0x0 0x200>, /* Rx */
-                                     <0x0 0x00078800 0x0 0x1f8>, /* PCS */
-                                     <0x0 0x00078600 0x0 0x044>; /* PCS misc */
-                               #phy-cells = <0>;
-                               #clock-cells = <0>;
-                               clocks = <&gcc GCC_USB0_PIPE_CLK>;
-                               clock-names = "pipe0";
-                               clock-output-names = "gcc_usb0_pipe_clk_src";
-                       };
+                       status = "disabled";
                };
 
                qusb_phy_0: qusb@79000 {
                                compatible = "snps,dwc3";
                                reg = <0x0 0x08a00000 0x0 0xcd00>;
                                interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
-                               phys = <&qusb_phy_0>, <&usb0_ssphy>;
+                               phys = <&qusb_phy_0>, <&ssphy_0>;
                                phy-names = "usb2-phy", "usb3-phy";
                                clocks = <&xo>;
                                clock-names = "ref";