Merge drm/drm-next into drm-misc-next
authorMaxime Ripard <mripard@kernel.org>
Wed, 15 Nov 2023 09:45:19 +0000 (10:45 +0100)
committerMaxime Ripard <mripard@kernel.org>
Wed, 15 Nov 2023 09:56:44 +0000 (10:56 +0100)
Let's kickstart the v6.8 release cycle.

Signed-off-by: Maxime Ripard <mripard@kernel.org>
29 files changed:
1  2 
MAINTAINERS
drivers/accel/ivpu/ivpu_drv.c
drivers/accel/ivpu/ivpu_drv.h
drivers/accel/ivpu/ivpu_fw.c
drivers/accel/ivpu/ivpu_hw.h
drivers/accel/ivpu/ivpu_hw_37xx.c
drivers/accel/ivpu/ivpu_hw_40xx.c
drivers/accel/ivpu/ivpu_ipc.c
drivers/accel/ivpu/ivpu_job.h
drivers/accel/ivpu/ivpu_mmu_context.c
drivers/accel/ivpu/ivpu_pm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/drm_atomic_helper.c
drivers/gpu/drm/drm_edid.c
drivers/gpu/drm/gud/gud_pipe.c
drivers/gpu/drm/i915/display/intel_sdvo.c
drivers/gpu/drm/msm/adreno/adreno_device.c
drivers/gpu/drm/nouveau/dispnv50/disp.c
drivers/gpu/drm/nouveau/nouveau_drv.h
drivers/gpu/drm/nouveau/nouveau_sched.c
drivers/gpu/drm/panel/panel-edp.c
drivers/gpu/drm/panfrost/panfrost_device.h
drivers/gpu/drm/panfrost/panfrost_drv.c
drivers/gpu/drm/tiny/simpledrm.c
include/drm/gpu_scheduler.h
sound/soc/codecs/hdac_hdmi.c
sound/soc/codecs/hdmi-codec.c

diff --cc MAINTAINERS
Simple merge
index 51fa60b6254ce56337eaa92cec2cbe8cb5bebf1d,7906030176538e5ca068b8f0f24aaf2f13af8bf1..bc15b06e17440e24606dff7af3aca15051ff5dd3
@@@ -390,7 -389,13 +388,14 @@@ void ivpu_prepare_for_reset(struct ivpu
        disable_irq(vdev->irq);
        ivpu_ipc_disable(vdev);
        ivpu_mmu_disable(vdev);
 +      ivpu_job_done_thread_disable(vdev);
+ }
+ int ivpu_shutdown(struct ivpu_device *vdev)
+ {
+       int ret;
+       ivpu_prepare_for_reset(vdev);
  
        ret = ivpu_hw_power_down(vdev);
        if (ret)
Simple merge
index 3d0c18d68f6c6c03139a0ac079c2428a004a4941,691da521dde57426b2d5cb7df6d1644f519991b5..6576232f3e678ee7c2532b07c830b74733c06960
@@@ -476,19 -428,11 +476,20 @@@ void ivpu_fw_boot_params_setup(struct i
  {
        struct ivpu_bo *ipc_mem_rx = vdev->ipc->mem_rx;
  
 -      /* In case of warm boot we only have to reset the entrypoint addr */
 +      /* In case of warm boot only update variable params */
        if (!ivpu_fw_is_cold_boot(vdev)) {
 +              boot_params->d0i3_residency_time_us =
 +                      ktime_us_delta(ktime_get_boottime(), vdev->hw->d0i3_entry_host_ts);
 +              boot_params->d0i3_entry_vpu_ts = vdev->hw->d0i3_entry_vpu_ts;
 +
 +              ivpu_dbg(vdev, FW_BOOT, "boot_params.d0i3_residency_time_us = %lld\n",
 +                       boot_params->d0i3_residency_time_us);
 +              ivpu_dbg(vdev, FW_BOOT, "boot_params.d0i3_entry_vpu_ts = %llu\n",
 +                       boot_params->d0i3_entry_vpu_ts);
 +
                boot_params->save_restore_ret_address = 0;
                vdev->pm->is_warmboot = true;
+               wmb(); /* Flush WC buffers after writing save_restore_ret_address */
                return;
        }
  
index aa52e5c29a65f2580121d26fa972f22018a2b2f0,1079e06255ba6dd33b375b2485611a012eeb6d6f..b2909168a0a6902b4fb061910796ac19d5caf6e1
@@@ -13,12 -13,10 +13,13 @@@ struct ivpu_hw_ops 
        int (*power_up)(struct ivpu_device *vdev);
        int (*boot_fw)(struct ivpu_device *vdev);
        int (*power_down)(struct ivpu_device *vdev);
+       int (*reset)(struct ivpu_device *vdev);
        bool (*is_idle)(struct ivpu_device *vdev);
 +      int (*wait_for_idle)(struct ivpu_device *vdev);
        void (*wdt_disable)(struct ivpu_device *vdev);
        void (*diagnose_failure)(struct ivpu_device *vdev);
 +      u32 (*profiling_freq_get)(struct ivpu_device *vdev);
 +      void (*profiling_freq_drive)(struct ivpu_device *vdev, bool enable);
        u32 (*reg_pll_freq_get)(struct ivpu_device *vdev);
        u32 (*reg_telemetry_offset_get)(struct ivpu_device *vdev);
        u32 (*reg_telemetry_size_get)(struct ivpu_device *vdev);
index 81f81046d39a3e3c611e5bf638f74e7786b745f9,5c0246b9e52287ff9aae57efe93480d774d49b49..a172cfb1c31f8f7de26cfe2c9fe085ab3dd2f2c5
@@@ -1018,8 -993,8 +1017,9 @@@ const struct ivpu_hw_ops ivpu_hw_37xx_o
        .info_init = ivpu_hw_37xx_info_init,
        .power_up = ivpu_hw_37xx_power_up,
        .is_idle = ivpu_hw_37xx_is_idle,
 +      .wait_for_idle = ivpu_hw_37xx_wait_for_idle,
        .power_down = ivpu_hw_37xx_power_down,
+       .reset = ivpu_hw_37xx_reset,
        .boot_fw = ivpu_hw_37xx_boot_fw,
        .wdt_disable = ivpu_hw_37xx_wdt_disable,
        .diagnose_failure = ivpu_hw_37xx_diagnose_failure,
index a779b905f8b15f3c23275ab9eed4258913cbdc59,e691c49c984105b4784ddd77fcc50abd2993ab00..f7e1f5c0667bdfc1f6f943326efa63b6dafed358
@@@ -1190,8 -1185,8 +1209,9 @@@ const struct ivpu_hw_ops ivpu_hw_40xx_o
        .info_init = ivpu_hw_40xx_info_init,
        .power_up = ivpu_hw_40xx_power_up,
        .is_idle = ivpu_hw_40xx_is_idle,
 +      .wait_for_idle = ivpu_hw_40xx_wait_for_idle,
        .power_down = ivpu_hw_40xx_power_down,
+       .reset = ivpu_hw_40xx_reset,
        .boot_fw = ivpu_hw_40xx_boot_fw,
        .wdt_disable = ivpu_hw_40xx_wdt_disable,
        .diagnose_failure = ivpu_hw_40xx_diagnose_failure,
index 618dbc17df801cfbc3f56a2d835f26fab7ba2733,a4ca40b184d4e6002fef9ea2642ea1dd9ade81a8..88453762c9d53bbab79dd3fca0e27aff638c5c14
@@@ -227,9 -210,10 +227,9 @@@ int ivpu_ipc_receive(struct ivpu_devic
        struct ivpu_ipc_rx_msg *rx_msg;
        int wait_ret, ret = 0;
  
-       wait_ret = wait_event_interruptible_timeout(cons->rx_msg_wq,
-                                                   ivpu_ipc_rx_need_wakeup(cons),
-                                                   msecs_to_jiffies(timeout_ms));
+       wait_ret = wait_event_timeout(cons->rx_msg_wq,
 -                                    (IS_KTHREAD() && kthread_should_stop()) ||
 -                                    !list_empty(&cons->rx_msg_list),
++                                    ivpu_ipc_rx_need_wakeup(cons),
+                                     msecs_to_jiffies(timeout_ms));
  
        if (IS_KTHREAD() && kthread_should_stop())
                return -EINTR;
Simple merge
index 122c90fecf6657f6bbcf5a6dc7f991af39dc3cc4,c1050a2df954344f4f206335a3a492927aaf1f19..12a8c09d4547d7d9b81cd91d93307e59e648e14f
@@@ -335,17 -327,10 +336,13 @@@ ivpu_mmu_context_map_sgt(struct ivpu_de
        u64 prot;
        u64 i;
  
 +      if (drm_WARN_ON(&vdev->drm, !ctx))
 +              return -EINVAL;
 +
        if (!IS_ALIGNED(vpu_addr, IVPU_MMU_PAGE_SIZE))
                return -EINVAL;
-       /*
-        * VPU is only 32 bit, but DMA engine is 38 bit
-        * Ranges < 2 GB are reserved for VPU internal registers
-        * Limit range to 8 GB
-        */
-       if (vpu_addr < SZ_2G || vpu_addr > SZ_8G)
+       if (vpu_addr & ~IVPU_MMU_VPU_ADDRESS_MASK)
                return -EINVAL;
  
        prot = IVPU_MMU_ENTRY_MAPPED;
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge