irqchip: gicv3-its: Fix domain free in multi-MSI case

Fix stupid thinko on the path freeing the interrupts, where only
the first interrupt would get reset, and none of the others.

This should only affect multi-MSI allocations.

Reported-by: Wuyun Wu (Abel) <wuyun.wu@huawei.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Robert Richter <robert.richter@caviumnetworks.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index e9d16151eed62fa4ed38c7d12dd8e7a170e5ed49..ab0185225857d9448c44d51fa4b05331b3271d7a 100644 (file)
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -1210,7 +1210,7 @@ static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq,
                clear_bit(event, its_dev->lpi_map);
 
                /* Nuke the entry in the domain */
-               irq_domain_reset_irq_data(d);
+               irq_domain_reset_irq_data(data);
        }
 
        /* If all interrupts have been freed, start mopping the floor */