arm64: dts: qcom: sm8250: Add TLMM pinctrl node
authorBjorn Andersson <bjorn.andersson@linaro.org>
Thu, 30 Apr 2020 18:17:16 +0000 (11:17 -0700)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Sun, 21 Jun 2020 19:36:35 +0000 (12:36 -0700)
Add the TLMM pinctrl node for SM8250 and reserve pins 28-31 and 40-43 on
the MTP as firmware does not allow Linux to touch these pins.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200430181716.3797842-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/sm8250-mtp.dts
arch/arm64/boot/dts/qcom/sm8250.dtsi

index aa37eb112d858726c0d8d7947859b8af595f121e..2fc9e7ff006014d57dfa0a1b7016ead21c179c28 100644 (file)
        status = "okay";
 };
 
+&tlmm {
+       gpio-reserved-ranges = <28 4>, <40 4>;
+};
+
 &uart2 {
        status = "okay";
 };
index daad5d45e6bd0fe789b73cd87610c9f83f300f06..169cfcad561dc534eeb1f1d4a290b7f81862096b 100644 (file)
                        #interrupt-cells = <4>;
                };
 
+               tlmm: pinctrl@f100000 {
+                       compatible = "qcom,sm8250-pinctrl";
+                       reg = <0 0x0f100000 0 0x300000>,
+                             <0 0x0f500000 0 0x300000>,
+                             <0 0x0f900000 0 0x300000>;
+                       reg-names = "west", "south", "north";
+                       interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+                       gpio-ranges = <&tlmm 0 0 180>;
+                       wakeup-parent = <&pdc>;
+               };
+
                intc: interrupt-controller@17a00000 {
                        compatible = "arm,gic-v3";
                        #interrupt-cells = <3>;