ARM: dts: meson8: Add more L2 (PL310) cache properties

Add more L2 cache properties which are used by the 3.10 vendor kernel
but have not made it upstream yet.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20230114233455.2005047-2-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index 0f8bac8bac8bb37985eb5c8d2f8b1790bd714493..a86f6afb8f87c987d82b0f761b9f3c73fac47945 100644 (file)
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -651,6 +651,9 @@
        arm,filter-ranges = <0x100000 0xc0000000>;
        prefetch-data = <1>;
        prefetch-instr = <1>;
+       arm,prefetch-offset = <7>;
+       arm,double-linefill = <1>;
+       arm,prefetch-drop = <1>;
        arm,shared-override;
 };