2 * arizona.c - Wolfson Arizona class device shared support
4 * Copyright 2012 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/gcd.h>
15 #include <linux/module.h>
16 #include <linux/pm_runtime.h>
17 #include <sound/pcm.h>
18 #include <sound/pcm_params.h>
19 #include <sound/tlv.h>
21 #include <linux/mfd/arizona/core.h>
22 #include <linux/mfd/arizona/registers.h>
26 #define ARIZONA_AIF_BCLK_CTRL 0x00
27 #define ARIZONA_AIF_TX_PIN_CTRL 0x01
28 #define ARIZONA_AIF_RX_PIN_CTRL 0x02
29 #define ARIZONA_AIF_RATE_CTRL 0x03
30 #define ARIZONA_AIF_FORMAT 0x04
31 #define ARIZONA_AIF_TX_BCLK_RATE 0x05
32 #define ARIZONA_AIF_RX_BCLK_RATE 0x06
33 #define ARIZONA_AIF_FRAME_CTRL_1 0x07
34 #define ARIZONA_AIF_FRAME_CTRL_2 0x08
35 #define ARIZONA_AIF_FRAME_CTRL_3 0x09
36 #define ARIZONA_AIF_FRAME_CTRL_4 0x0A
37 #define ARIZONA_AIF_FRAME_CTRL_5 0x0B
38 #define ARIZONA_AIF_FRAME_CTRL_6 0x0C
39 #define ARIZONA_AIF_FRAME_CTRL_7 0x0D
40 #define ARIZONA_AIF_FRAME_CTRL_8 0x0E
41 #define ARIZONA_AIF_FRAME_CTRL_9 0x0F
42 #define ARIZONA_AIF_FRAME_CTRL_10 0x10
43 #define ARIZONA_AIF_FRAME_CTRL_11 0x11
44 #define ARIZONA_AIF_FRAME_CTRL_12 0x12
45 #define ARIZONA_AIF_FRAME_CTRL_13 0x13
46 #define ARIZONA_AIF_FRAME_CTRL_14 0x14
47 #define ARIZONA_AIF_FRAME_CTRL_15 0x15
48 #define ARIZONA_AIF_FRAME_CTRL_16 0x16
49 #define ARIZONA_AIF_FRAME_CTRL_17 0x17
50 #define ARIZONA_AIF_FRAME_CTRL_18 0x18
51 #define ARIZONA_AIF_TX_ENABLES 0x19
52 #define ARIZONA_AIF_RX_ENABLES 0x1A
53 #define ARIZONA_AIF_FORCE_WRITE 0x1B
55 #define ARIZONA_FLL_VCO_CORNER 141900000
56 #define ARIZONA_FLL_MAX_FREF 13500000
57 #define ARIZONA_FLL_MIN_FVCO 90000000
58 #define ARIZONA_FLL_MAX_FRATIO 16
59 #define ARIZONA_FLL_MAX_REFDIV 8
60 #define ARIZONA_FLL_MIN_OUTDIV 2
61 #define ARIZONA_FLL_MAX_OUTDIV 7
63 #define ARIZONA_FMT_DSP_MODE_A 0
64 #define ARIZONA_FMT_DSP_MODE_B 1
65 #define ARIZONA_FMT_I2S_MODE 2
66 #define ARIZONA_FMT_LEFT_JUSTIFIED_MODE 3
68 #define arizona_fll_err(_fll, fmt, ...) \
69 dev_err(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
70 #define arizona_fll_warn(_fll, fmt, ...) \
71 dev_warn(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
72 #define arizona_fll_dbg(_fll, fmt, ...) \
73 dev_dbg(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
75 #define arizona_aif_err(_dai, fmt, ...) \
76 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
77 #define arizona_aif_warn(_dai, fmt, ...) \
78 dev_warn(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
79 #define arizona_aif_dbg(_dai, fmt, ...) \
80 dev_dbg(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
82 static int arizona_spk_ev(struct snd_soc_dapm_widget *w,
83 struct snd_kcontrol *kcontrol,
86 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
87 struct arizona *arizona = dev_get_drvdata(codec->dev->parent);
91 case SND_SOC_DAPM_POST_PMU:
92 val = snd_soc_read(codec, ARIZONA_INTERRUPT_RAW_STATUS_3);
93 if (val & ARIZONA_SPK_OVERHEAT_STS) {
94 dev_crit(arizona->dev,
95 "Speaker not enabled due to temperature\n");
99 regmap_update_bits_async(arizona->regmap,
100 ARIZONA_OUTPUT_ENABLES_1,
101 1 << w->shift, 1 << w->shift);
103 case SND_SOC_DAPM_PRE_PMD:
104 regmap_update_bits_async(arizona->regmap,
105 ARIZONA_OUTPUT_ENABLES_1,
115 static irqreturn_t arizona_thermal_warn(int irq, void *data)
117 struct arizona *arizona = data;
121 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_3,
124 dev_err(arizona->dev, "Failed to read thermal status: %d\n",
126 } else if (val & ARIZONA_SPK_OVERHEAT_WARN_STS) {
127 dev_crit(arizona->dev, "Thermal warning\n");
133 static irqreturn_t arizona_thermal_shutdown(int irq, void *data)
135 struct arizona *arizona = data;
139 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_3,
142 dev_err(arizona->dev, "Failed to read thermal status: %d\n",
144 } else if (val & ARIZONA_SPK_OVERHEAT_STS) {
145 dev_crit(arizona->dev, "Thermal shutdown\n");
146 ret = regmap_update_bits(arizona->regmap,
147 ARIZONA_OUTPUT_ENABLES_1,
149 ARIZONA_OUT4R_ENA, 0);
151 dev_crit(arizona->dev,
152 "Failed to disable speaker outputs: %d\n",
159 static const struct snd_soc_dapm_widget arizona_spkl =
160 SND_SOC_DAPM_PGA_E("OUT4L", SND_SOC_NOPM,
161 ARIZONA_OUT4L_ENA_SHIFT, 0, NULL, 0, arizona_spk_ev,
162 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU);
164 static const struct snd_soc_dapm_widget arizona_spkr =
165 SND_SOC_DAPM_PGA_E("OUT4R", SND_SOC_NOPM,
166 ARIZONA_OUT4R_ENA_SHIFT, 0, NULL, 0, arizona_spk_ev,
167 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU);
169 int arizona_init_spk(struct snd_soc_codec *codec)
171 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
172 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
173 struct arizona *arizona = priv->arizona;
176 ret = snd_soc_dapm_new_controls(dapm, &arizona_spkl, 1);
180 switch (arizona->type) {
186 ret = snd_soc_dapm_new_controls(dapm, &arizona_spkr, 1);
192 ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT_WARN,
193 "Thermal warning", arizona_thermal_warn,
196 dev_err(arizona->dev,
197 "Failed to get thermal warning IRQ: %d\n",
200 ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT,
201 "Thermal shutdown", arizona_thermal_shutdown,
204 dev_err(arizona->dev,
205 "Failed to get thermal shutdown IRQ: %d\n",
210 EXPORT_SYMBOL_GPL(arizona_init_spk);
212 int arizona_free_spk(struct snd_soc_codec *codec)
214 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
215 struct arizona *arizona = priv->arizona;
217 arizona_free_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT_WARN, arizona);
218 arizona_free_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT, arizona);
222 EXPORT_SYMBOL_GPL(arizona_free_spk);
224 static const struct snd_soc_dapm_route arizona_mono_routes[] = {
225 { "OUT1R", NULL, "OUT1L" },
226 { "OUT2R", NULL, "OUT2L" },
227 { "OUT3R", NULL, "OUT3L" },
228 { "OUT4R", NULL, "OUT4L" },
229 { "OUT5R", NULL, "OUT5L" },
230 { "OUT6R", NULL, "OUT6L" },
233 int arizona_init_mono(struct snd_soc_codec *codec)
235 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
236 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
237 struct arizona *arizona = priv->arizona;
240 for (i = 0; i < ARIZONA_MAX_OUTPUT; ++i) {
241 if (arizona->pdata.out_mono[i])
242 snd_soc_dapm_add_routes(dapm,
243 &arizona_mono_routes[i], 1);
248 EXPORT_SYMBOL_GPL(arizona_init_mono);
250 int arizona_init_gpio(struct snd_soc_codec *codec)
252 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
253 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
254 struct arizona *arizona = priv->arizona;
257 switch (arizona->type) {
260 snd_soc_dapm_disable_pin(dapm, "DRC2 Signal Activity");
266 snd_soc_dapm_disable_pin(dapm, "DRC1 Signal Activity");
268 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
269 switch (arizona->pdata.gpio_defaults[i] & ARIZONA_GPN_FN_MASK) {
270 case ARIZONA_GP_FN_DRC1_SIGNAL_DETECT:
271 snd_soc_dapm_enable_pin(dapm, "DRC1 Signal Activity");
273 case ARIZONA_GP_FN_DRC2_SIGNAL_DETECT:
274 snd_soc_dapm_enable_pin(dapm, "DRC2 Signal Activity");
283 EXPORT_SYMBOL_GPL(arizona_init_gpio);
285 int arizona_init_notifiers(struct snd_soc_codec *codec)
287 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
288 struct arizona *arizona = priv->arizona;
290 BLOCKING_INIT_NOTIFIER_HEAD(&arizona->notifier);
294 EXPORT_SYMBOL_GPL(arizona_init_notifiers);
296 const char * const arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = {
402 EXPORT_SYMBOL_GPL(arizona_mixer_texts);
404 unsigned int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = {
411 0x0c, /* Noise mixer */
412 0x0d, /* Comfort noise */
485 0xa0, /* ISRC1INT1 */
489 0xa4, /* ISRC1DEC1 */
493 0xa8, /* ISRC2DEC1 */
497 0xac, /* ISRC2INT1 */
501 0xb0, /* ISRC3DEC1 */
505 0xb4, /* ISRC3INT1 */
510 EXPORT_SYMBOL_GPL(arizona_mixer_values);
512 const DECLARE_TLV_DB_SCALE(arizona_mixer_tlv, -3200, 100, 0);
513 EXPORT_SYMBOL_GPL(arizona_mixer_tlv);
515 const char * const arizona_sample_rate_text[ARIZONA_SAMPLE_RATE_ENUM_SIZE] = {
516 "12kHz", "24kHz", "48kHz", "96kHz", "192kHz",
517 "11.025kHz", "22.05kHz", "44.1kHz", "88.2kHz", "176.4kHz",
518 "4kHz", "8kHz", "16kHz", "32kHz",
520 EXPORT_SYMBOL_GPL(arizona_sample_rate_text);
522 const unsigned int arizona_sample_rate_val[ARIZONA_SAMPLE_RATE_ENUM_SIZE] = {
523 0x01, 0x02, 0x03, 0x04, 0x05, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
524 0x10, 0x11, 0x12, 0x13,
526 EXPORT_SYMBOL_GPL(arizona_sample_rate_val);
528 const char *arizona_sample_rate_val_to_name(unsigned int rate_val)
532 for (i = 0; i < ARRAY_SIZE(arizona_sample_rate_val); ++i) {
533 if (arizona_sample_rate_val[i] == rate_val)
534 return arizona_sample_rate_text[i];
539 EXPORT_SYMBOL_GPL(arizona_sample_rate_val_to_name);
541 const char * const arizona_rate_text[ARIZONA_RATE_ENUM_SIZE] = {
542 "SYNCCLK rate", "8kHz", "16kHz", "ASYNCCLK rate",
544 EXPORT_SYMBOL_GPL(arizona_rate_text);
546 const unsigned int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE] = {
549 EXPORT_SYMBOL_GPL(arizona_rate_val);
552 const struct soc_enum arizona_isrc_fsh[] = {
553 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_1,
554 ARIZONA_ISRC1_FSH_SHIFT, 0xf,
555 ARIZONA_RATE_ENUM_SIZE,
556 arizona_rate_text, arizona_rate_val),
557 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_2_CTRL_1,
558 ARIZONA_ISRC2_FSH_SHIFT, 0xf,
559 ARIZONA_RATE_ENUM_SIZE,
560 arizona_rate_text, arizona_rate_val),
561 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_3_CTRL_1,
562 ARIZONA_ISRC3_FSH_SHIFT, 0xf,
563 ARIZONA_RATE_ENUM_SIZE,
564 arizona_rate_text, arizona_rate_val),
566 EXPORT_SYMBOL_GPL(arizona_isrc_fsh);
568 const struct soc_enum arizona_isrc_fsl[] = {
569 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_2,
570 ARIZONA_ISRC1_FSL_SHIFT, 0xf,
571 ARIZONA_RATE_ENUM_SIZE,
572 arizona_rate_text, arizona_rate_val),
573 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_2_CTRL_2,
574 ARIZONA_ISRC2_FSL_SHIFT, 0xf,
575 ARIZONA_RATE_ENUM_SIZE,
576 arizona_rate_text, arizona_rate_val),
577 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_3_CTRL_2,
578 ARIZONA_ISRC3_FSL_SHIFT, 0xf,
579 ARIZONA_RATE_ENUM_SIZE,
580 arizona_rate_text, arizona_rate_val),
582 EXPORT_SYMBOL_GPL(arizona_isrc_fsl);
584 const struct soc_enum arizona_asrc_rate1 =
585 SOC_VALUE_ENUM_SINGLE(ARIZONA_ASRC_RATE1,
586 ARIZONA_ASRC_RATE1_SHIFT, 0xf,
587 ARIZONA_RATE_ENUM_SIZE - 1,
588 arizona_rate_text, arizona_rate_val);
589 EXPORT_SYMBOL_GPL(arizona_asrc_rate1);
591 static const char * const arizona_vol_ramp_text[] = {
592 "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB",
593 "15ms/6dB", "30ms/6dB",
596 SOC_ENUM_SINGLE_DECL(arizona_in_vd_ramp,
597 ARIZONA_INPUT_VOLUME_RAMP,
598 ARIZONA_IN_VD_RAMP_SHIFT,
599 arizona_vol_ramp_text);
600 EXPORT_SYMBOL_GPL(arizona_in_vd_ramp);
602 SOC_ENUM_SINGLE_DECL(arizona_in_vi_ramp,
603 ARIZONA_INPUT_VOLUME_RAMP,
604 ARIZONA_IN_VI_RAMP_SHIFT,
605 arizona_vol_ramp_text);
606 EXPORT_SYMBOL_GPL(arizona_in_vi_ramp);
608 SOC_ENUM_SINGLE_DECL(arizona_out_vd_ramp,
609 ARIZONA_OUTPUT_VOLUME_RAMP,
610 ARIZONA_OUT_VD_RAMP_SHIFT,
611 arizona_vol_ramp_text);
612 EXPORT_SYMBOL_GPL(arizona_out_vd_ramp);
614 SOC_ENUM_SINGLE_DECL(arizona_out_vi_ramp,
615 ARIZONA_OUTPUT_VOLUME_RAMP,
616 ARIZONA_OUT_VI_RAMP_SHIFT,
617 arizona_vol_ramp_text);
618 EXPORT_SYMBOL_GPL(arizona_out_vi_ramp);
620 static const char * const arizona_lhpf_mode_text[] = {
621 "Low-pass", "High-pass"
624 SOC_ENUM_SINGLE_DECL(arizona_lhpf1_mode,
626 ARIZONA_LHPF1_MODE_SHIFT,
627 arizona_lhpf_mode_text);
628 EXPORT_SYMBOL_GPL(arizona_lhpf1_mode);
630 SOC_ENUM_SINGLE_DECL(arizona_lhpf2_mode,
632 ARIZONA_LHPF2_MODE_SHIFT,
633 arizona_lhpf_mode_text);
634 EXPORT_SYMBOL_GPL(arizona_lhpf2_mode);
636 SOC_ENUM_SINGLE_DECL(arizona_lhpf3_mode,
638 ARIZONA_LHPF3_MODE_SHIFT,
639 arizona_lhpf_mode_text);
640 EXPORT_SYMBOL_GPL(arizona_lhpf3_mode);
642 SOC_ENUM_SINGLE_DECL(arizona_lhpf4_mode,
644 ARIZONA_LHPF4_MODE_SHIFT,
645 arizona_lhpf_mode_text);
646 EXPORT_SYMBOL_GPL(arizona_lhpf4_mode);
648 static const char * const arizona_ng_hold_text[] = {
649 "30ms", "120ms", "250ms", "500ms",
652 SOC_ENUM_SINGLE_DECL(arizona_ng_hold,
653 ARIZONA_NOISE_GATE_CONTROL,
654 ARIZONA_NGATE_HOLD_SHIFT,
655 arizona_ng_hold_text);
656 EXPORT_SYMBOL_GPL(arizona_ng_hold);
658 static const char * const arizona_in_hpf_cut_text[] = {
659 "2.5Hz", "5Hz", "10Hz", "20Hz", "40Hz"
662 SOC_ENUM_SINGLE_DECL(arizona_in_hpf_cut_enum,
664 ARIZONA_IN_HPF_CUT_SHIFT,
665 arizona_in_hpf_cut_text);
666 EXPORT_SYMBOL_GPL(arizona_in_hpf_cut_enum);
668 static const char * const arizona_in_dmic_osr_text[] = {
669 "1.536MHz", "3.072MHz", "6.144MHz", "768kHz",
672 const struct soc_enum arizona_in_dmic_osr[] = {
673 SOC_ENUM_SINGLE(ARIZONA_IN1L_CONTROL, ARIZONA_IN1_OSR_SHIFT,
674 ARRAY_SIZE(arizona_in_dmic_osr_text),
675 arizona_in_dmic_osr_text),
676 SOC_ENUM_SINGLE(ARIZONA_IN2L_CONTROL, ARIZONA_IN2_OSR_SHIFT,
677 ARRAY_SIZE(arizona_in_dmic_osr_text),
678 arizona_in_dmic_osr_text),
679 SOC_ENUM_SINGLE(ARIZONA_IN3L_CONTROL, ARIZONA_IN3_OSR_SHIFT,
680 ARRAY_SIZE(arizona_in_dmic_osr_text),
681 arizona_in_dmic_osr_text),
682 SOC_ENUM_SINGLE(ARIZONA_IN4L_CONTROL, ARIZONA_IN4_OSR_SHIFT,
683 ARRAY_SIZE(arizona_in_dmic_osr_text),
684 arizona_in_dmic_osr_text),
686 EXPORT_SYMBOL_GPL(arizona_in_dmic_osr);
688 static const char * const arizona_anc_input_src_text[] = {
689 "None", "IN1", "IN2", "IN3", "IN4",
692 static const char * const arizona_anc_channel_src_text[] = {
693 "None", "Left", "Right", "Combine",
696 const struct soc_enum arizona_anc_input_src[] = {
697 SOC_ENUM_SINGLE(ARIZONA_ANC_SRC,
698 ARIZONA_IN_RXANCL_SEL_SHIFT,
699 ARRAY_SIZE(arizona_anc_input_src_text),
700 arizona_anc_input_src_text),
701 SOC_ENUM_SINGLE(ARIZONA_FCL_ADC_REFORMATTER_CONTROL,
702 ARIZONA_FCL_MIC_MODE_SEL,
703 ARRAY_SIZE(arizona_anc_channel_src_text),
704 arizona_anc_channel_src_text),
705 SOC_ENUM_SINGLE(ARIZONA_ANC_SRC,
706 ARIZONA_IN_RXANCR_SEL_SHIFT,
707 ARRAY_SIZE(arizona_anc_input_src_text),
708 arizona_anc_input_src_text),
709 SOC_ENUM_SINGLE(ARIZONA_FCR_ADC_REFORMATTER_CONTROL,
710 ARIZONA_FCR_MIC_MODE_SEL,
711 ARRAY_SIZE(arizona_anc_channel_src_text),
712 arizona_anc_channel_src_text),
714 EXPORT_SYMBOL_GPL(arizona_anc_input_src);
716 static const char * const arizona_anc_ng_texts[] = {
722 SOC_ENUM_SINGLE_DECL(arizona_anc_ng_enum, SND_SOC_NOPM, 0,
723 arizona_anc_ng_texts);
724 EXPORT_SYMBOL_GPL(arizona_anc_ng_enum);
726 static const char * const arizona_output_anc_src_text[] = {
727 "None", "RXANCL", "RXANCR",
730 const struct soc_enum arizona_output_anc_src[] = {
731 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_1L,
732 ARIZONA_OUT1L_ANC_SRC_SHIFT,
733 ARRAY_SIZE(arizona_output_anc_src_text),
734 arizona_output_anc_src_text),
735 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_1R,
736 ARIZONA_OUT1R_ANC_SRC_SHIFT,
737 ARRAY_SIZE(arizona_output_anc_src_text),
738 arizona_output_anc_src_text),
739 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_2L,
740 ARIZONA_OUT2L_ANC_SRC_SHIFT,
741 ARRAY_SIZE(arizona_output_anc_src_text),
742 arizona_output_anc_src_text),
743 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_2R,
744 ARIZONA_OUT2R_ANC_SRC_SHIFT,
745 ARRAY_SIZE(arizona_output_anc_src_text),
746 arizona_output_anc_src_text),
747 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_3L,
748 ARIZONA_OUT3L_ANC_SRC_SHIFT,
749 ARRAY_SIZE(arizona_output_anc_src_text),
750 arizona_output_anc_src_text),
751 SOC_ENUM_SINGLE(ARIZONA_DAC_VOLUME_LIMIT_3R,
752 ARIZONA_OUT3R_ANC_SRC_SHIFT,
753 ARRAY_SIZE(arizona_output_anc_src_text),
754 arizona_output_anc_src_text),
755 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_4L,
756 ARIZONA_OUT4L_ANC_SRC_SHIFT,
757 ARRAY_SIZE(arizona_output_anc_src_text),
758 arizona_output_anc_src_text),
759 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_4R,
760 ARIZONA_OUT4R_ANC_SRC_SHIFT,
761 ARRAY_SIZE(arizona_output_anc_src_text),
762 arizona_output_anc_src_text),
763 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_5L,
764 ARIZONA_OUT5L_ANC_SRC_SHIFT,
765 ARRAY_SIZE(arizona_output_anc_src_text),
766 arizona_output_anc_src_text),
767 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_5R,
768 ARIZONA_OUT5R_ANC_SRC_SHIFT,
769 ARRAY_SIZE(arizona_output_anc_src_text),
770 arizona_output_anc_src_text),
771 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_6L,
772 ARIZONA_OUT6L_ANC_SRC_SHIFT,
773 ARRAY_SIZE(arizona_output_anc_src_text),
774 arizona_output_anc_src_text),
775 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_6R,
776 ARIZONA_OUT6R_ANC_SRC_SHIFT,
777 ARRAY_SIZE(arizona_output_anc_src_text),
778 arizona_output_anc_src_text),
780 EXPORT_SYMBOL_GPL(arizona_output_anc_src);
782 const struct snd_kcontrol_new arizona_voice_trigger_switch[] = {
783 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0),
784 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 1, 1, 0),
785 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 2, 1, 0),
786 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 3, 1, 0),
788 EXPORT_SYMBOL_GPL(arizona_voice_trigger_switch);
790 static void arizona_in_set_vu(struct snd_soc_codec *codec, int ena)
792 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
801 for (i = 0; i < priv->num_inputs; i++)
802 snd_soc_update_bits(codec,
803 ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 4),
807 bool arizona_input_analog(struct snd_soc_codec *codec, int shift)
809 unsigned int reg = ARIZONA_IN1L_CONTROL + ((shift / 2) * 8);
810 unsigned int val = snd_soc_read(codec, reg);
812 return !(val & ARIZONA_IN1_MODE_MASK);
814 EXPORT_SYMBOL_GPL(arizona_input_analog);
816 int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol,
819 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
820 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
824 reg = ARIZONA_ADC_DIGITAL_VOLUME_1L + ((w->shift / 2) * 8);
826 reg = ARIZONA_ADC_DIGITAL_VOLUME_1R + ((w->shift / 2) * 8);
829 case SND_SOC_DAPM_PRE_PMU:
832 case SND_SOC_DAPM_POST_PMU:
833 snd_soc_update_bits(codec, reg, ARIZONA_IN1L_MUTE, 0);
835 /* If this is the last input pending then allow VU */
837 if (priv->in_pending == 0) {
839 arizona_in_set_vu(codec, 1);
842 case SND_SOC_DAPM_PRE_PMD:
843 snd_soc_update_bits(codec, reg,
844 ARIZONA_IN1L_MUTE | ARIZONA_IN_VU,
845 ARIZONA_IN1L_MUTE | ARIZONA_IN_VU);
847 case SND_SOC_DAPM_POST_PMD:
848 /* Disable volume updates if no inputs are enabled */
849 reg = snd_soc_read(codec, ARIZONA_INPUT_ENABLES);
851 arizona_in_set_vu(codec, 0);
859 EXPORT_SYMBOL_GPL(arizona_in_ev);
861 int arizona_out_ev(struct snd_soc_dapm_widget *w,
862 struct snd_kcontrol *kcontrol,
865 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
866 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
869 case SND_SOC_DAPM_PRE_PMU:
871 case ARIZONA_OUT1L_ENA_SHIFT:
872 case ARIZONA_OUT1R_ENA_SHIFT:
873 case ARIZONA_OUT2L_ENA_SHIFT:
874 case ARIZONA_OUT2R_ENA_SHIFT:
875 case ARIZONA_OUT3L_ENA_SHIFT:
876 case ARIZONA_OUT3R_ENA_SHIFT:
877 priv->out_up_pending++;
878 priv->out_up_delay += 17;
884 case SND_SOC_DAPM_POST_PMU:
886 case ARIZONA_OUT1L_ENA_SHIFT:
887 case ARIZONA_OUT1R_ENA_SHIFT:
888 case ARIZONA_OUT2L_ENA_SHIFT:
889 case ARIZONA_OUT2R_ENA_SHIFT:
890 case ARIZONA_OUT3L_ENA_SHIFT:
891 case ARIZONA_OUT3R_ENA_SHIFT:
892 priv->out_up_pending--;
893 if (!priv->out_up_pending) {
894 dev_dbg(codec->dev, "Power up delay: %d\n",
896 msleep(priv->out_up_delay);
897 priv->out_up_delay = 0;
905 case SND_SOC_DAPM_PRE_PMD:
907 case ARIZONA_OUT1L_ENA_SHIFT:
908 case ARIZONA_OUT1R_ENA_SHIFT:
909 case ARIZONA_OUT2L_ENA_SHIFT:
910 case ARIZONA_OUT2R_ENA_SHIFT:
911 case ARIZONA_OUT3L_ENA_SHIFT:
912 case ARIZONA_OUT3R_ENA_SHIFT:
913 priv->out_down_pending++;
914 priv->out_down_delay++;
920 case SND_SOC_DAPM_POST_PMD:
922 case ARIZONA_OUT1L_ENA_SHIFT:
923 case ARIZONA_OUT1R_ENA_SHIFT:
924 case ARIZONA_OUT2L_ENA_SHIFT:
925 case ARIZONA_OUT2R_ENA_SHIFT:
926 case ARIZONA_OUT3L_ENA_SHIFT:
927 case ARIZONA_OUT3R_ENA_SHIFT:
928 priv->out_down_pending--;
929 if (!priv->out_down_pending) {
930 dev_dbg(codec->dev, "Power down delay: %d\n",
931 priv->out_down_delay);
932 msleep(priv->out_down_delay);
933 priv->out_down_delay = 0;
946 EXPORT_SYMBOL_GPL(arizona_out_ev);
948 int arizona_hp_ev(struct snd_soc_dapm_widget *w,
949 struct snd_kcontrol *kcontrol,
952 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
953 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
954 struct arizona *arizona = priv->arizona;
955 unsigned int mask = 1 << w->shift;
959 case SND_SOC_DAPM_POST_PMU:
962 case SND_SOC_DAPM_PRE_PMD:
965 case SND_SOC_DAPM_PRE_PMU:
966 case SND_SOC_DAPM_POST_PMD:
967 return arizona_out_ev(w, kcontrol, event);
972 /* Store the desired state for the HP outputs */
973 priv->arizona->hp_ena &= ~mask;
974 priv->arizona->hp_ena |= val;
976 /* Force off if HPDET clamp is active */
977 if (priv->arizona->hpdet_clamp)
980 regmap_update_bits_async(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1,
983 return arizona_out_ev(w, kcontrol, event);
985 EXPORT_SYMBOL_GPL(arizona_hp_ev);
987 static int arizona_dvfs_enable(struct snd_soc_codec *codec)
989 const struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
990 struct arizona *arizona = priv->arizona;
993 ret = regulator_set_voltage(arizona->dcvdd, 1800000, 1800000);
995 dev_err(codec->dev, "Failed to boost DCVDD: %d\n", ret);
999 ret = regmap_update_bits(arizona->regmap,
1000 ARIZONA_DYNAMIC_FREQUENCY_SCALING_1,
1001 ARIZONA_SUBSYS_MAX_FREQ,
1002 ARIZONA_SUBSYS_MAX_FREQ);
1004 dev_err(codec->dev, "Failed to enable subsys max: %d\n", ret);
1005 regulator_set_voltage(arizona->dcvdd, 1200000, 1800000);
1012 static int arizona_dvfs_disable(struct snd_soc_codec *codec)
1014 const struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1015 struct arizona *arizona = priv->arizona;
1018 ret = regmap_update_bits(arizona->regmap,
1019 ARIZONA_DYNAMIC_FREQUENCY_SCALING_1,
1020 ARIZONA_SUBSYS_MAX_FREQ, 0);
1022 dev_err(codec->dev, "Failed to disable subsys max: %d\n", ret);
1026 ret = regulator_set_voltage(arizona->dcvdd, 1200000, 1800000);
1028 dev_err(codec->dev, "Failed to unboost DCVDD: %d\n", ret);
1035 int arizona_dvfs_up(struct snd_soc_codec *codec, unsigned int flags)
1037 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1040 mutex_lock(&priv->dvfs_lock);
1042 if (!priv->dvfs_cached && !priv->dvfs_reqs) {
1043 ret = arizona_dvfs_enable(codec);
1048 priv->dvfs_reqs |= flags;
1050 mutex_unlock(&priv->dvfs_lock);
1053 EXPORT_SYMBOL_GPL(arizona_dvfs_up);
1055 int arizona_dvfs_down(struct snd_soc_codec *codec, unsigned int flags)
1057 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1058 unsigned int old_reqs;
1061 mutex_lock(&priv->dvfs_lock);
1063 old_reqs = priv->dvfs_reqs;
1064 priv->dvfs_reqs &= ~flags;
1066 if (!priv->dvfs_cached && old_reqs && !priv->dvfs_reqs)
1067 ret = arizona_dvfs_disable(codec);
1069 mutex_unlock(&priv->dvfs_lock);
1072 EXPORT_SYMBOL_GPL(arizona_dvfs_down);
1074 int arizona_dvfs_sysclk_ev(struct snd_soc_dapm_widget *w,
1075 struct snd_kcontrol *kcontrol, int event)
1077 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1078 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1081 mutex_lock(&priv->dvfs_lock);
1084 case SND_SOC_DAPM_POST_PMU:
1085 if (priv->dvfs_reqs)
1086 ret = arizona_dvfs_enable(codec);
1088 priv->dvfs_cached = false;
1090 case SND_SOC_DAPM_PRE_PMD:
1091 /* We must ensure DVFS is disabled before the codec goes into
1092 * suspend so that we are never in an illegal state of DVFS
1093 * enabled without enough DCVDD
1095 priv->dvfs_cached = true;
1097 if (priv->dvfs_reqs)
1098 ret = arizona_dvfs_disable(codec);
1104 mutex_unlock(&priv->dvfs_lock);
1107 EXPORT_SYMBOL_GPL(arizona_dvfs_sysclk_ev);
1109 void arizona_init_dvfs(struct arizona_priv *priv)
1111 mutex_init(&priv->dvfs_lock);
1113 EXPORT_SYMBOL_GPL(arizona_init_dvfs);
1115 int arizona_anc_ev(struct snd_soc_dapm_widget *w,
1116 struct snd_kcontrol *kcontrol,
1119 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1123 case SND_SOC_DAPM_POST_PMU:
1124 val = 1 << w->shift;
1126 case SND_SOC_DAPM_PRE_PMD:
1127 val = 1 << (w->shift + 1);
1133 snd_soc_write(codec, ARIZONA_CLOCK_CONTROL, val);
1137 EXPORT_SYMBOL_GPL(arizona_anc_ev);
1139 static unsigned int arizona_opclk_ref_48k_rates[] = {
1146 static unsigned int arizona_opclk_ref_44k1_rates[] = {
1153 static int arizona_set_opclk(struct snd_soc_codec *codec, unsigned int clk,
1156 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1158 unsigned int *rates;
1159 int ref, div, refclk;
1162 case ARIZONA_CLK_OPCLK:
1163 reg = ARIZONA_OUTPUT_SYSTEM_CLOCK;
1164 refclk = priv->sysclk;
1166 case ARIZONA_CLK_ASYNC_OPCLK:
1167 reg = ARIZONA_OUTPUT_ASYNC_CLOCK;
1168 refclk = priv->asyncclk;
1175 rates = arizona_opclk_ref_44k1_rates;
1177 rates = arizona_opclk_ref_48k_rates;
1179 for (ref = 0; ref < ARRAY_SIZE(arizona_opclk_ref_48k_rates) &&
1180 rates[ref] <= refclk; ref++) {
1182 while (rates[ref] / div >= freq && div < 32) {
1183 if (rates[ref] / div == freq) {
1184 dev_dbg(codec->dev, "Configured %dHz OPCLK\n",
1186 snd_soc_update_bits(codec, reg,
1187 ARIZONA_OPCLK_DIV_MASK |
1188 ARIZONA_OPCLK_SEL_MASK,
1190 ARIZONA_OPCLK_DIV_SHIFT) |
1198 dev_err(codec->dev, "Unable to generate %dHz OPCLK\n", freq);
1202 int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id,
1203 int source, unsigned int freq, int dir)
1205 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1206 struct arizona *arizona = priv->arizona;
1209 unsigned int mask = ARIZONA_SYSCLK_FREQ_MASK | ARIZONA_SYSCLK_SRC_MASK;
1210 unsigned int val = source << ARIZONA_SYSCLK_SRC_SHIFT;
1214 case ARIZONA_CLK_SYSCLK:
1216 reg = ARIZONA_SYSTEM_CLOCK_1;
1217 clk = &priv->sysclk;
1218 mask |= ARIZONA_SYSCLK_FRAC;
1220 case ARIZONA_CLK_ASYNCCLK:
1222 reg = ARIZONA_ASYNC_CLOCK_1;
1223 clk = &priv->asyncclk;
1225 case ARIZONA_CLK_OPCLK:
1226 case ARIZONA_CLK_ASYNC_OPCLK:
1227 return arizona_set_opclk(codec, clk_id, freq);
1238 val |= ARIZONA_CLK_12MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1242 val |= ARIZONA_CLK_24MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1246 val |= ARIZONA_CLK_49MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1250 val |= ARIZONA_CLK_73MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1254 val |= ARIZONA_CLK_98MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1258 val |= ARIZONA_CLK_147MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1261 dev_dbg(arizona->dev, "%s cleared\n", name);
1271 val |= ARIZONA_SYSCLK_FRAC;
1273 dev_dbg(arizona->dev, "%s set to %uHz", name, freq);
1275 return regmap_update_bits(arizona->regmap, reg, mask, val);
1277 EXPORT_SYMBOL_GPL(arizona_set_sysclk);
1279 static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1281 struct snd_soc_codec *codec = dai->codec;
1282 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1283 struct arizona *arizona = priv->arizona;
1284 int lrclk, bclk, mode, base;
1286 base = dai->driver->base;
1291 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1292 case SND_SOC_DAIFMT_DSP_A:
1293 mode = ARIZONA_FMT_DSP_MODE_A;
1295 case SND_SOC_DAIFMT_DSP_B:
1296 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK)
1297 != SND_SOC_DAIFMT_CBM_CFM) {
1298 arizona_aif_err(dai, "DSP_B not valid in slave mode\n");
1301 mode = ARIZONA_FMT_DSP_MODE_B;
1303 case SND_SOC_DAIFMT_I2S:
1304 mode = ARIZONA_FMT_I2S_MODE;
1306 case SND_SOC_DAIFMT_LEFT_J:
1307 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK)
1308 != SND_SOC_DAIFMT_CBM_CFM) {
1309 arizona_aif_err(dai, "LEFT_J not valid in slave mode\n");
1312 mode = ARIZONA_FMT_LEFT_JUSTIFIED_MODE;
1315 arizona_aif_err(dai, "Unsupported DAI format %d\n",
1316 fmt & SND_SOC_DAIFMT_FORMAT_MASK);
1320 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1321 case SND_SOC_DAIFMT_CBS_CFS:
1323 case SND_SOC_DAIFMT_CBS_CFM:
1324 lrclk |= ARIZONA_AIF1TX_LRCLK_MSTR;
1326 case SND_SOC_DAIFMT_CBM_CFS:
1327 bclk |= ARIZONA_AIF1_BCLK_MSTR;
1329 case SND_SOC_DAIFMT_CBM_CFM:
1330 bclk |= ARIZONA_AIF1_BCLK_MSTR;
1331 lrclk |= ARIZONA_AIF1TX_LRCLK_MSTR;
1334 arizona_aif_err(dai, "Unsupported master mode %d\n",
1335 fmt & SND_SOC_DAIFMT_MASTER_MASK);
1339 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1340 case SND_SOC_DAIFMT_NB_NF:
1342 case SND_SOC_DAIFMT_IB_IF:
1343 bclk |= ARIZONA_AIF1_BCLK_INV;
1344 lrclk |= ARIZONA_AIF1TX_LRCLK_INV;
1346 case SND_SOC_DAIFMT_IB_NF:
1347 bclk |= ARIZONA_AIF1_BCLK_INV;
1349 case SND_SOC_DAIFMT_NB_IF:
1350 lrclk |= ARIZONA_AIF1TX_LRCLK_INV;
1356 regmap_update_bits_async(arizona->regmap, base + ARIZONA_AIF_BCLK_CTRL,
1357 ARIZONA_AIF1_BCLK_INV |
1358 ARIZONA_AIF1_BCLK_MSTR,
1360 regmap_update_bits_async(arizona->regmap, base + ARIZONA_AIF_TX_PIN_CTRL,
1361 ARIZONA_AIF1TX_LRCLK_INV |
1362 ARIZONA_AIF1TX_LRCLK_MSTR, lrclk);
1363 regmap_update_bits_async(arizona->regmap,
1364 base + ARIZONA_AIF_RX_PIN_CTRL,
1365 ARIZONA_AIF1RX_LRCLK_INV |
1366 ARIZONA_AIF1RX_LRCLK_MSTR, lrclk);
1367 regmap_update_bits(arizona->regmap, base + ARIZONA_AIF_FORMAT,
1368 ARIZONA_AIF1_FMT_MASK, mode);
1373 static const int arizona_48k_bclk_rates[] = {
1395 static const int arizona_44k1_bclk_rates[] = {
1417 static const unsigned int arizona_sr_vals[] = {
1444 #define ARIZONA_48K_RATE_MASK 0x0F003E
1445 #define ARIZONA_44K1_RATE_MASK 0x003E00
1446 #define ARIZONA_RATE_MASK (ARIZONA_48K_RATE_MASK | ARIZONA_44K1_RATE_MASK)
1448 static const struct snd_pcm_hw_constraint_list arizona_constraint = {
1449 .count = ARRAY_SIZE(arizona_sr_vals),
1450 .list = arizona_sr_vals,
1453 static int arizona_startup(struct snd_pcm_substream *substream,
1454 struct snd_soc_dai *dai)
1456 struct snd_soc_codec *codec = dai->codec;
1457 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1458 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
1459 unsigned int base_rate;
1461 if (!substream->runtime)
1464 switch (dai_priv->clk) {
1465 case ARIZONA_CLK_SYSCLK:
1466 base_rate = priv->sysclk;
1468 case ARIZONA_CLK_ASYNCCLK:
1469 base_rate = priv->asyncclk;
1476 dai_priv->constraint.mask = ARIZONA_RATE_MASK;
1477 else if (base_rate % 8000)
1478 dai_priv->constraint.mask = ARIZONA_44K1_RATE_MASK;
1480 dai_priv->constraint.mask = ARIZONA_48K_RATE_MASK;
1482 return snd_pcm_hw_constraint_list(substream->runtime, 0,
1483 SNDRV_PCM_HW_PARAM_RATE,
1484 &dai_priv->constraint);
1487 static void arizona_wm5102_set_dac_comp(struct snd_soc_codec *codec,
1490 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1491 struct arizona *arizona = priv->arizona;
1492 struct reg_sequence dac_comp[] = {
1494 { ARIZONA_DAC_COMP_1, 0 },
1495 { ARIZONA_DAC_COMP_2, 0 },
1499 mutex_lock(&arizona->dac_comp_lock);
1501 dac_comp[1].def = arizona->dac_comp_coeff;
1503 dac_comp[2].def = arizona->dac_comp_enabled;
1505 mutex_unlock(&arizona->dac_comp_lock);
1507 regmap_multi_reg_write(arizona->regmap,
1509 ARRAY_SIZE(dac_comp));
1512 static int arizona_hw_params_rate(struct snd_pcm_substream *substream,
1513 struct snd_pcm_hw_params *params,
1514 struct snd_soc_dai *dai)
1516 struct snd_soc_codec *codec = dai->codec;
1517 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1518 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
1519 int base = dai->driver->base;
1523 * We will need to be more flexible than this in future,
1524 * currently we use a single sample rate for SYSCLK.
1526 for (i = 0; i < ARRAY_SIZE(arizona_sr_vals); i++)
1527 if (arizona_sr_vals[i] == params_rate(params))
1529 if (i == ARRAY_SIZE(arizona_sr_vals)) {
1530 arizona_aif_err(dai, "Unsupported sample rate %dHz\n",
1531 params_rate(params));
1536 switch (priv->arizona->type) {
1539 if (arizona_sr_vals[sr_val] >= 88200)
1540 ret = arizona_dvfs_up(codec, ARIZONA_DVFS_SR1_RQ);
1542 ret = arizona_dvfs_down(codec, ARIZONA_DVFS_SR1_RQ);
1545 arizona_aif_err(dai, "Failed to change DVFS %d\n", ret);
1553 switch (dai_priv->clk) {
1554 case ARIZONA_CLK_SYSCLK:
1555 switch (priv->arizona->type) {
1557 arizona_wm5102_set_dac_comp(codec,
1558 params_rate(params));
1564 snd_soc_update_bits(codec, ARIZONA_SAMPLE_RATE_1,
1565 ARIZONA_SAMPLE_RATE_1_MASK, sr_val);
1567 snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
1568 ARIZONA_AIF1_RATE_MASK, 0);
1570 case ARIZONA_CLK_ASYNCCLK:
1571 snd_soc_update_bits(codec, ARIZONA_ASYNC_SAMPLE_RATE_1,
1572 ARIZONA_ASYNC_SAMPLE_RATE_1_MASK, sr_val);
1574 snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
1575 ARIZONA_AIF1_RATE_MASK,
1576 8 << ARIZONA_AIF1_RATE_SHIFT);
1579 arizona_aif_err(dai, "Invalid clock %d\n", dai_priv->clk);
1586 static bool arizona_aif_cfg_changed(struct snd_soc_codec *codec,
1587 int base, int bclk, int lrclk, int frame)
1591 val = snd_soc_read(codec, base + ARIZONA_AIF_BCLK_CTRL);
1592 if (bclk != (val & ARIZONA_AIF1_BCLK_FREQ_MASK))
1595 val = snd_soc_read(codec, base + ARIZONA_AIF_TX_BCLK_RATE);
1596 if (lrclk != (val & ARIZONA_AIF1TX_BCPF_MASK))
1599 val = snd_soc_read(codec, base + ARIZONA_AIF_FRAME_CTRL_1);
1600 if (frame != (val & (ARIZONA_AIF1TX_WL_MASK |
1601 ARIZONA_AIF1TX_SLOT_LEN_MASK)))
1607 static int arizona_hw_params(struct snd_pcm_substream *substream,
1608 struct snd_pcm_hw_params *params,
1609 struct snd_soc_dai *dai)
1611 struct snd_soc_codec *codec = dai->codec;
1612 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1613 struct arizona *arizona = priv->arizona;
1614 int base = dai->driver->base;
1617 int channels = params_channels(params);
1618 int chan_limit = arizona->pdata.max_channels_clocked[dai->id - 1];
1619 int tdm_width = arizona->tdm_width[dai->id - 1];
1620 int tdm_slots = arizona->tdm_slots[dai->id - 1];
1621 int bclk, lrclk, wl, frame, bclk_target;
1623 unsigned int aif_tx_state, aif_rx_state;
1625 if (params_rate(params) % 4000)
1626 rates = &arizona_44k1_bclk_rates[0];
1628 rates = &arizona_48k_bclk_rates[0];
1630 wl = params_width(params);
1633 arizona_aif_dbg(dai, "Configuring for %d %d bit TDM slots\n",
1634 tdm_slots, tdm_width);
1635 bclk_target = tdm_slots * tdm_width * params_rate(params);
1636 channels = tdm_slots;
1638 bclk_target = snd_soc_params_to_bclk(params);
1642 if (chan_limit && chan_limit < channels) {
1643 arizona_aif_dbg(dai, "Limiting to %d channels\n", chan_limit);
1644 bclk_target /= channels;
1645 bclk_target *= chan_limit;
1648 /* Force multiple of 2 channels for I2S mode */
1649 val = snd_soc_read(codec, base + ARIZONA_AIF_FORMAT);
1650 val &= ARIZONA_AIF1_FMT_MASK;
1651 if ((channels & 1) && (val == ARIZONA_FMT_I2S_MODE)) {
1652 arizona_aif_dbg(dai, "Forcing stereo mode\n");
1653 bclk_target /= channels;
1654 bclk_target *= channels + 1;
1657 for (i = 0; i < ARRAY_SIZE(arizona_44k1_bclk_rates); i++) {
1658 if (rates[i] >= bclk_target &&
1659 rates[i] % params_rate(params) == 0) {
1664 if (i == ARRAY_SIZE(arizona_44k1_bclk_rates)) {
1665 arizona_aif_err(dai, "Unsupported sample rate %dHz\n",
1666 params_rate(params));
1670 lrclk = rates[bclk] / params_rate(params);
1672 arizona_aif_dbg(dai, "BCLK %dHz LRCLK %dHz\n",
1673 rates[bclk], rates[bclk] / lrclk);
1675 frame = wl << ARIZONA_AIF1TX_WL_SHIFT | tdm_width;
1677 reconfig = arizona_aif_cfg_changed(codec, base, bclk, lrclk, frame);
1680 /* Save AIF TX/RX state */
1681 aif_tx_state = snd_soc_read(codec,
1682 base + ARIZONA_AIF_TX_ENABLES);
1683 aif_rx_state = snd_soc_read(codec,
1684 base + ARIZONA_AIF_RX_ENABLES);
1685 /* Disable AIF TX/RX before reconfiguring it */
1686 regmap_update_bits_async(arizona->regmap,
1687 base + ARIZONA_AIF_TX_ENABLES, 0xff, 0x0);
1688 regmap_update_bits(arizona->regmap,
1689 base + ARIZONA_AIF_RX_ENABLES, 0xff, 0x0);
1692 ret = arizona_hw_params_rate(substream, params, dai);
1697 regmap_update_bits_async(arizona->regmap,
1698 base + ARIZONA_AIF_BCLK_CTRL,
1699 ARIZONA_AIF1_BCLK_FREQ_MASK, bclk);
1700 regmap_update_bits_async(arizona->regmap,
1701 base + ARIZONA_AIF_TX_BCLK_RATE,
1702 ARIZONA_AIF1TX_BCPF_MASK, lrclk);
1703 regmap_update_bits_async(arizona->regmap,
1704 base + ARIZONA_AIF_RX_BCLK_RATE,
1705 ARIZONA_AIF1RX_BCPF_MASK, lrclk);
1706 regmap_update_bits_async(arizona->regmap,
1707 base + ARIZONA_AIF_FRAME_CTRL_1,
1708 ARIZONA_AIF1TX_WL_MASK |
1709 ARIZONA_AIF1TX_SLOT_LEN_MASK, frame);
1710 regmap_update_bits(arizona->regmap,
1711 base + ARIZONA_AIF_FRAME_CTRL_2,
1712 ARIZONA_AIF1RX_WL_MASK |
1713 ARIZONA_AIF1RX_SLOT_LEN_MASK, frame);
1718 /* Restore AIF TX/RX state */
1719 regmap_update_bits_async(arizona->regmap,
1720 base + ARIZONA_AIF_TX_ENABLES,
1721 0xff, aif_tx_state);
1722 regmap_update_bits(arizona->regmap,
1723 base + ARIZONA_AIF_RX_ENABLES,
1724 0xff, aif_rx_state);
1729 static const char *arizona_dai_clk_str(int clk_id)
1732 case ARIZONA_CLK_SYSCLK:
1734 case ARIZONA_CLK_ASYNCCLK:
1737 return "Unknown clock";
1741 static int arizona_dai_set_sysclk(struct snd_soc_dai *dai,
1742 int clk_id, unsigned int freq, int dir)
1744 struct snd_soc_codec *codec = dai->codec;
1745 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
1746 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1747 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
1748 struct snd_soc_dapm_route routes[2];
1751 case ARIZONA_CLK_SYSCLK:
1752 case ARIZONA_CLK_ASYNCCLK:
1758 if (clk_id == dai_priv->clk)
1762 dev_err(codec->dev, "Can't change clock on active DAI %d\n",
1767 dev_dbg(codec->dev, "Setting AIF%d to %s\n", dai->id + 1,
1768 arizona_dai_clk_str(clk_id));
1770 memset(&routes, 0, sizeof(routes));
1771 routes[0].sink = dai->driver->capture.stream_name;
1772 routes[1].sink = dai->driver->playback.stream_name;
1774 routes[0].source = arizona_dai_clk_str(dai_priv->clk);
1775 routes[1].source = arizona_dai_clk_str(dai_priv->clk);
1776 snd_soc_dapm_del_routes(dapm, routes, ARRAY_SIZE(routes));
1778 routes[0].source = arizona_dai_clk_str(clk_id);
1779 routes[1].source = arizona_dai_clk_str(clk_id);
1780 snd_soc_dapm_add_routes(dapm, routes, ARRAY_SIZE(routes));
1782 dai_priv->clk = clk_id;
1784 return snd_soc_dapm_sync(dapm);
1787 static int arizona_set_tristate(struct snd_soc_dai *dai, int tristate)
1789 struct snd_soc_codec *codec = dai->codec;
1790 int base = dai->driver->base;
1794 reg = ARIZONA_AIF1_TRI;
1798 return snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
1799 ARIZONA_AIF1_TRI, reg);
1802 static void arizona_set_channels_to_mask(struct snd_soc_dai *dai,
1804 int channels, unsigned int mask)
1806 struct snd_soc_codec *codec = dai->codec;
1807 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1808 struct arizona *arizona = priv->arizona;
1811 for (i = 0; i < channels; ++i) {
1812 slot = ffs(mask) - 1;
1816 regmap_write(arizona->regmap, base + i, slot);
1818 mask &= ~(1 << slot);
1822 arizona_aif_warn(dai, "Too many channels in TDM mask\n");
1825 static int arizona_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
1826 unsigned int rx_mask, int slots, int slot_width)
1828 struct snd_soc_codec *codec = dai->codec;
1829 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1830 struct arizona *arizona = priv->arizona;
1831 int base = dai->driver->base;
1832 int rx_max_chan = dai->driver->playback.channels_max;
1833 int tx_max_chan = dai->driver->capture.channels_max;
1835 /* Only support TDM for the physical AIFs */
1836 if (dai->id > ARIZONA_MAX_AIF)
1840 tx_mask = (1 << tx_max_chan) - 1;
1841 rx_mask = (1 << rx_max_chan) - 1;
1844 arizona_set_channels_to_mask(dai, base + ARIZONA_AIF_FRAME_CTRL_3,
1845 tx_max_chan, tx_mask);
1846 arizona_set_channels_to_mask(dai, base + ARIZONA_AIF_FRAME_CTRL_11,
1847 rx_max_chan, rx_mask);
1849 arizona->tdm_width[dai->id - 1] = slot_width;
1850 arizona->tdm_slots[dai->id - 1] = slots;
1855 const struct snd_soc_dai_ops arizona_dai_ops = {
1856 .startup = arizona_startup,
1857 .set_fmt = arizona_set_fmt,
1858 .set_tdm_slot = arizona_set_tdm_slot,
1859 .hw_params = arizona_hw_params,
1860 .set_sysclk = arizona_dai_set_sysclk,
1861 .set_tristate = arizona_set_tristate,
1863 EXPORT_SYMBOL_GPL(arizona_dai_ops);
1865 const struct snd_soc_dai_ops arizona_simple_dai_ops = {
1866 .startup = arizona_startup,
1867 .hw_params = arizona_hw_params_rate,
1868 .set_sysclk = arizona_dai_set_sysclk,
1870 EXPORT_SYMBOL_GPL(arizona_simple_dai_ops);
1872 int arizona_init_dai(struct arizona_priv *priv, int id)
1874 struct arizona_dai_priv *dai_priv = &priv->dai[id];
1876 dai_priv->clk = ARIZONA_CLK_SYSCLK;
1877 dai_priv->constraint = arizona_constraint;
1881 EXPORT_SYMBOL_GPL(arizona_init_dai);
1889 { 0, 64000, 4, 16 },
1890 { 64000, 128000, 3, 8 },
1891 { 128000, 256000, 2, 4 },
1892 { 256000, 1000000, 1, 2 },
1893 { 1000000, 13500000, 0, 1 },
1896 static const unsigned int pseudo_fref_max[ARIZONA_FLL_MAX_FRATIO] = {
1921 { 256000, 1000000, 2 },
1922 { 1000000, 13500000, 4 },
1925 struct arizona_fll_cfg {
1935 static int arizona_validate_fll(struct arizona_fll *fll,
1939 unsigned int Fvco_min;
1941 if (fll->fout && Fout != fll->fout) {
1942 arizona_fll_err(fll,
1943 "Can't change output on active FLL\n");
1947 if (Fref / ARIZONA_FLL_MAX_REFDIV > ARIZONA_FLL_MAX_FREF) {
1948 arizona_fll_err(fll,
1949 "Can't scale %dMHz in to <=13.5MHz\n",
1954 Fvco_min = ARIZONA_FLL_MIN_FVCO * fll->vco_mult;
1955 if (Fout * ARIZONA_FLL_MAX_OUTDIV < Fvco_min) {
1956 arizona_fll_err(fll, "No FLL_OUTDIV for Fout=%uHz\n",
1964 static int arizona_find_fratio(unsigned int Fref, int *fratio)
1968 /* Find an appropriate FLL_FRATIO */
1969 for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) {
1970 if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) {
1972 *fratio = fll_fratios[i].fratio;
1973 return fll_fratios[i].ratio;
1980 static int arizona_calc_fratio(struct arizona_fll *fll,
1981 struct arizona_fll_cfg *cfg,
1982 unsigned int target,
1983 unsigned int Fref, bool sync)
1985 int init_ratio, ratio;
1988 /* Fref must be <=13.5MHz, find initial refdiv */
1991 while (Fref > ARIZONA_FLL_MAX_FREF) {
1996 if (div > ARIZONA_FLL_MAX_REFDIV)
2000 /* Find an appropriate FLL_FRATIO */
2001 init_ratio = arizona_find_fratio(Fref, &cfg->fratio);
2002 if (init_ratio < 0) {
2003 arizona_fll_err(fll, "Unable to find FRATIO for Fref=%uHz\n",
2008 switch (fll->arizona->type) {
2014 if (fll->arizona->rev < 3 || sync)
2023 cfg->fratio = init_ratio - 1;
2025 /* Adjust FRATIO/refdiv to avoid integer mode if possible */
2026 refdiv = cfg->refdiv;
2028 arizona_fll_dbg(fll, "pseudo: initial ratio=%u fref=%u refdiv=%u\n",
2029 init_ratio, Fref, refdiv);
2031 while (div <= ARIZONA_FLL_MAX_REFDIV) {
2032 /* start from init_ratio because this may already give a
2035 for (ratio = init_ratio; ratio > 0; ratio--) {
2036 if (target % (ratio * Fref)) {
2037 cfg->refdiv = refdiv;
2038 cfg->fratio = ratio - 1;
2039 arizona_fll_dbg(fll,
2040 "pseudo: found fref=%u refdiv=%d(%d) ratio=%d\n",
2041 Fref, refdiv, div, ratio);
2046 for (ratio = init_ratio + 1; ratio <= ARIZONA_FLL_MAX_FRATIO;
2048 if ((ARIZONA_FLL_VCO_CORNER / 2) /
2049 (fll->vco_mult * ratio) < Fref) {
2050 arizona_fll_dbg(fll, "pseudo: hit VCO corner\n");
2054 if (Fref > pseudo_fref_max[ratio - 1]) {
2055 arizona_fll_dbg(fll,
2056 "pseudo: exceeded max fref(%u) for ratio=%u\n",
2057 pseudo_fref_max[ratio - 1],
2062 if (target % (ratio * Fref)) {
2063 cfg->refdiv = refdiv;
2064 cfg->fratio = ratio - 1;
2065 arizona_fll_dbg(fll,
2066 "pseudo: found fref=%u refdiv=%d(%d) ratio=%d\n",
2067 Fref, refdiv, div, ratio);
2075 init_ratio = arizona_find_fratio(Fref, NULL);
2076 arizona_fll_dbg(fll,
2077 "pseudo: change fref=%u refdiv=%d(%d) ratio=%u\n",
2078 Fref, refdiv, div, init_ratio);
2081 arizona_fll_warn(fll, "Falling back to integer mode operation\n");
2082 return cfg->fratio + 1;
2085 static int arizona_calc_fll(struct arizona_fll *fll,
2086 struct arizona_fll_cfg *cfg,
2087 unsigned int Fref, bool sync)
2089 unsigned int target, div, gcd_fll;
2092 arizona_fll_dbg(fll, "Fref=%u Fout=%u\n", Fref, fll->fout);
2094 /* Fvco should be over the targt; don't check the upper bound */
2095 div = ARIZONA_FLL_MIN_OUTDIV;
2096 while (fll->fout * div < ARIZONA_FLL_MIN_FVCO * fll->vco_mult) {
2098 if (div > ARIZONA_FLL_MAX_OUTDIV)
2101 target = fll->fout * div / fll->vco_mult;
2104 arizona_fll_dbg(fll, "Fvco=%dHz\n", target);
2106 /* Find an appropriate FLL_FRATIO and refdiv */
2107 ratio = arizona_calc_fratio(fll, cfg, target, Fref, sync);
2111 /* Apply the division for our remaining calculations */
2112 Fref = Fref / (1 << cfg->refdiv);
2114 cfg->n = target / (ratio * Fref);
2116 if (target % (ratio * Fref)) {
2117 gcd_fll = gcd(target, ratio * Fref);
2118 arizona_fll_dbg(fll, "GCD=%u\n", gcd_fll);
2120 cfg->theta = (target - (cfg->n * ratio * Fref))
2122 cfg->lambda = (ratio * Fref) / gcd_fll;
2128 /* Round down to 16bit range with cost of accuracy lost.
2129 * Denominator must be bigger than numerator so we only
2132 while (cfg->lambda >= (1 << 16)) {
2137 for (i = 0; i < ARRAY_SIZE(fll_gains); i++) {
2138 if (fll_gains[i].min <= Fref && Fref <= fll_gains[i].max) {
2139 cfg->gain = fll_gains[i].gain;
2143 if (i == ARRAY_SIZE(fll_gains)) {
2144 arizona_fll_err(fll, "Unable to find gain for Fref=%uHz\n",
2149 arizona_fll_dbg(fll, "N=%d THETA=%d LAMBDA=%d\n",
2150 cfg->n, cfg->theta, cfg->lambda);
2151 arizona_fll_dbg(fll, "FRATIO=0x%x(%d) OUTDIV=%d REFCLK_DIV=0x%x(%d)\n",
2152 cfg->fratio, ratio, cfg->outdiv,
2153 cfg->refdiv, 1 << cfg->refdiv);
2154 arizona_fll_dbg(fll, "GAIN=0x%x(%d)\n", cfg->gain, 1 << cfg->gain);
2160 static void arizona_apply_fll(struct arizona *arizona, unsigned int base,
2161 struct arizona_fll_cfg *cfg, int source,
2164 regmap_update_bits_async(arizona->regmap, base + 3,
2165 ARIZONA_FLL1_THETA_MASK, cfg->theta);
2166 regmap_update_bits_async(arizona->regmap, base + 4,
2167 ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda);
2168 regmap_update_bits_async(arizona->regmap, base + 5,
2169 ARIZONA_FLL1_FRATIO_MASK,
2170 cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT);
2171 regmap_update_bits_async(arizona->regmap, base + 6,
2172 ARIZONA_FLL1_CLK_REF_DIV_MASK |
2173 ARIZONA_FLL1_CLK_REF_SRC_MASK,
2174 cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT |
2175 source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT);
2178 regmap_update_bits(arizona->regmap, base + 0x7,
2179 ARIZONA_FLL1_GAIN_MASK,
2180 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT);
2182 regmap_update_bits(arizona->regmap, base + 0x5,
2183 ARIZONA_FLL1_OUTDIV_MASK,
2184 cfg->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
2185 regmap_update_bits(arizona->regmap, base + 0x9,
2186 ARIZONA_FLL1_GAIN_MASK,
2187 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT);
2190 regmap_update_bits_async(arizona->regmap, base + 2,
2191 ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK,
2192 ARIZONA_FLL1_CTRL_UPD | cfg->n);
2195 static int arizona_is_enabled_fll(struct arizona_fll *fll, int base)
2197 struct arizona *arizona = fll->arizona;
2201 ret = regmap_read(arizona->regmap, base + 1, ®);
2203 arizona_fll_err(fll, "Failed to read current state: %d\n",
2208 return reg & ARIZONA_FLL1_ENA;
2211 static int arizona_enable_fll(struct arizona_fll *fll)
2213 struct arizona *arizona = fll->arizona;
2214 bool use_sync = false;
2215 int already_enabled = arizona_is_enabled_fll(fll, fll->base);
2216 int sync_enabled = arizona_is_enabled_fll(fll, fll->base + 0x10);
2217 struct arizona_fll_cfg cfg;
2221 if (already_enabled < 0)
2222 return already_enabled;
2223 if (sync_enabled < 0)
2224 return sync_enabled;
2226 if (already_enabled) {
2227 /* Facilitate smooth refclk across the transition */
2228 regmap_update_bits_async(fll->arizona->regmap, fll->base + 0x9,
2229 ARIZONA_FLL1_GAIN_MASK, 0);
2230 regmap_update_bits(fll->arizona->regmap, fll->base + 1,
2231 ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN);
2236 * If we have both REFCLK and SYNCCLK then enable both,
2237 * otherwise apply the SYNCCLK settings to REFCLK.
2239 if (fll->ref_src >= 0 && fll->ref_freq &&
2240 fll->ref_src != fll->sync_src) {
2241 arizona_calc_fll(fll, &cfg, fll->ref_freq, false);
2243 arizona_apply_fll(arizona, fll->base, &cfg, fll->ref_src,
2245 if (fll->sync_src >= 0) {
2246 arizona_calc_fll(fll, &cfg, fll->sync_freq, true);
2248 arizona_apply_fll(arizona, fll->base + 0x10, &cfg,
2249 fll->sync_src, true);
2252 } else if (fll->sync_src >= 0) {
2253 arizona_calc_fll(fll, &cfg, fll->sync_freq, false);
2255 arizona_apply_fll(arizona, fll->base, &cfg,
2256 fll->sync_src, false);
2258 regmap_update_bits_async(arizona->regmap, fll->base + 0x11,
2259 ARIZONA_FLL1_SYNC_ENA, 0);
2261 arizona_fll_err(fll, "No clocks provided\n");
2265 if (already_enabled && !!sync_enabled != use_sync)
2266 arizona_fll_warn(fll, "Synchroniser changed on active FLL\n");
2269 * Increase the bandwidth if we're not using a low frequency
2272 if (use_sync && fll->sync_freq > 100000)
2273 regmap_update_bits_async(arizona->regmap, fll->base + 0x17,
2274 ARIZONA_FLL1_SYNC_BW, 0);
2276 regmap_update_bits_async(arizona->regmap, fll->base + 0x17,
2277 ARIZONA_FLL1_SYNC_BW,
2278 ARIZONA_FLL1_SYNC_BW);
2280 if (!already_enabled)
2281 pm_runtime_get(arizona->dev);
2284 regmap_update_bits_async(arizona->regmap, fll->base + 0x11,
2285 ARIZONA_FLL1_SYNC_ENA,
2286 ARIZONA_FLL1_SYNC_ENA);
2287 regmap_update_bits_async(arizona->regmap, fll->base + 1,
2288 ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA);
2290 if (already_enabled)
2291 regmap_update_bits_async(arizona->regmap, fll->base + 1,
2292 ARIZONA_FLL1_FREERUN, 0);
2294 arizona_fll_dbg(fll, "Waiting for FLL lock...\n");
2296 for (i = 0; i < 15; i++) {
2298 usleep_range(200, 400);
2302 regmap_read(arizona->regmap,
2303 ARIZONA_INTERRUPT_RAW_STATUS_5,
2305 if (val & (ARIZONA_FLL1_CLOCK_OK_STS << (fll->id - 1)))
2309 arizona_fll_warn(fll, "Timed out waiting for lock\n");
2311 arizona_fll_dbg(fll, "FLL locked (%d polls)\n", i);
2316 static void arizona_disable_fll(struct arizona_fll *fll)
2318 struct arizona *arizona = fll->arizona;
2321 regmap_update_bits_async(arizona->regmap, fll->base + 1,
2322 ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN);
2323 regmap_update_bits_check(arizona->regmap, fll->base + 1,
2324 ARIZONA_FLL1_ENA, 0, &change);
2325 regmap_update_bits(arizona->regmap, fll->base + 0x11,
2326 ARIZONA_FLL1_SYNC_ENA, 0);
2327 regmap_update_bits_async(arizona->regmap, fll->base + 1,
2328 ARIZONA_FLL1_FREERUN, 0);
2331 pm_runtime_put_autosuspend(arizona->dev);
2334 int arizona_set_fll_refclk(struct arizona_fll *fll, int source,
2335 unsigned int Fref, unsigned int Fout)
2339 if (fll->ref_src == source && fll->ref_freq == Fref)
2342 if (fll->fout && Fref > 0) {
2343 ret = arizona_validate_fll(fll, Fref, fll->fout);
2348 fll->ref_src = source;
2349 fll->ref_freq = Fref;
2351 if (fll->fout && Fref > 0) {
2352 ret = arizona_enable_fll(fll);
2357 EXPORT_SYMBOL_GPL(arizona_set_fll_refclk);
2359 int arizona_set_fll(struct arizona_fll *fll, int source,
2360 unsigned int Fref, unsigned int Fout)
2364 if (fll->sync_src == source &&
2365 fll->sync_freq == Fref && fll->fout == Fout)
2369 if (fll->ref_src >= 0) {
2370 ret = arizona_validate_fll(fll, fll->ref_freq, Fout);
2375 ret = arizona_validate_fll(fll, Fref, Fout);
2380 fll->sync_src = source;
2381 fll->sync_freq = Fref;
2385 ret = arizona_enable_fll(fll);
2387 arizona_disable_fll(fll);
2391 EXPORT_SYMBOL_GPL(arizona_set_fll);
2393 int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq,
2394 int ok_irq, struct arizona_fll *fll)
2400 fll->arizona = arizona;
2401 fll->sync_src = ARIZONA_FLL_SRC_NONE;
2403 /* Configure default refclk to 32kHz if we have one */
2404 regmap_read(arizona->regmap, ARIZONA_CLOCK_32K_1, &val);
2405 switch (val & ARIZONA_CLK_32K_SRC_MASK) {
2406 case ARIZONA_CLK_SRC_MCLK1:
2407 case ARIZONA_CLK_SRC_MCLK2:
2408 fll->ref_src = val & ARIZONA_CLK_32K_SRC_MASK;
2411 fll->ref_src = ARIZONA_FLL_SRC_NONE;
2413 fll->ref_freq = 32768;
2415 snprintf(fll->lock_name, sizeof(fll->lock_name), "FLL%d lock", id);
2416 snprintf(fll->clock_ok_name, sizeof(fll->clock_ok_name),
2417 "FLL%d clock OK", id);
2419 regmap_update_bits(arizona->regmap, fll->base + 1,
2420 ARIZONA_FLL1_FREERUN, 0);
2424 EXPORT_SYMBOL_GPL(arizona_init_fll);
2427 * arizona_set_output_mode - Set the mode of the specified output
2429 * @codec: Device to configure
2430 * @output: Output number
2431 * @diff: True to set the output to differential mode
2433 * Some systems use external analogue switches to connect more
2434 * analogue devices to the CODEC than are supported by the device. In
2435 * some systems this requires changing the switched output from single
2436 * ended to differential mode dynamically at runtime, an operation
2437 * supported using this function.
2439 * Most systems have a single static configuration and should use
2440 * platform data instead.
2442 int arizona_set_output_mode(struct snd_soc_codec *codec, int output, bool diff)
2444 unsigned int reg, val;
2446 if (output < 1 || output > 6)
2449 reg = ARIZONA_OUTPUT_PATH_CONFIG_1L + (output - 1) * 8;
2452 val = ARIZONA_OUT1_MONO;
2456 return snd_soc_update_bits(codec, reg, ARIZONA_OUT1_MONO, val);
2458 EXPORT_SYMBOL_GPL(arizona_set_output_mode);
2460 static const struct soc_enum arizona_adsp2_rate_enum[] = {
2461 SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP1_CONTROL_1,
2462 ARIZONA_DSP1_RATE_SHIFT, 0xf,
2463 ARIZONA_RATE_ENUM_SIZE,
2464 arizona_rate_text, arizona_rate_val),
2465 SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP2_CONTROL_1,
2466 ARIZONA_DSP1_RATE_SHIFT, 0xf,
2467 ARIZONA_RATE_ENUM_SIZE,
2468 arizona_rate_text, arizona_rate_val),
2469 SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP3_CONTROL_1,
2470 ARIZONA_DSP1_RATE_SHIFT, 0xf,
2471 ARIZONA_RATE_ENUM_SIZE,
2472 arizona_rate_text, arizona_rate_val),
2473 SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP4_CONTROL_1,
2474 ARIZONA_DSP1_RATE_SHIFT, 0xf,
2475 ARIZONA_RATE_ENUM_SIZE,
2476 arizona_rate_text, arizona_rate_val),
2479 const struct snd_kcontrol_new arizona_adsp2_rate_controls[] = {
2480 SOC_ENUM("DSP1 Rate", arizona_adsp2_rate_enum[0]),
2481 SOC_ENUM("DSP2 Rate", arizona_adsp2_rate_enum[1]),
2482 SOC_ENUM("DSP3 Rate", arizona_adsp2_rate_enum[2]),
2483 SOC_ENUM("DSP4 Rate", arizona_adsp2_rate_enum[3]),
2485 EXPORT_SYMBOL_GPL(arizona_adsp2_rate_controls);
2487 static bool arizona_eq_filter_unstable(bool mode, __be16 _a, __be16 _b)
2489 s16 a = be16_to_cpu(_a);
2490 s16 b = be16_to_cpu(_b);
2493 return abs(a) >= 4096;
2498 return (abs((a << 16) / (4096 - b)) >= 4096 << 4);
2502 int arizona_eq_coeff_put(struct snd_kcontrol *kcontrol,
2503 struct snd_ctl_elem_value *ucontrol)
2505 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
2506 struct arizona *arizona = dev_get_drvdata(codec->dev->parent);
2507 struct soc_bytes *params = (void *)kcontrol->private_value;
2513 len = params->num_regs * regmap_get_val_bytes(arizona->regmap);
2515 data = kmemdup(ucontrol->value.bytes.data, len, GFP_KERNEL | GFP_DMA);
2519 data[0] &= cpu_to_be16(ARIZONA_EQ1_B1_MODE);
2521 if (arizona_eq_filter_unstable(!!data[0], data[1], data[2]) ||
2522 arizona_eq_filter_unstable(true, data[4], data[5]) ||
2523 arizona_eq_filter_unstable(true, data[8], data[9]) ||
2524 arizona_eq_filter_unstable(true, data[12], data[13]) ||
2525 arizona_eq_filter_unstable(false, data[16], data[17])) {
2526 dev_err(arizona->dev, "Rejecting unstable EQ coefficients\n");
2531 ret = regmap_read(arizona->regmap, params->base, &val);
2535 val &= ~ARIZONA_EQ1_B1_MODE;
2536 data[0] |= cpu_to_be16(val);
2538 ret = regmap_raw_write(arizona->regmap, params->base, data, len);
2544 EXPORT_SYMBOL_GPL(arizona_eq_coeff_put);
2546 int arizona_lhpf_coeff_put(struct snd_kcontrol *kcontrol,
2547 struct snd_ctl_elem_value *ucontrol)
2549 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
2550 struct arizona *arizona = dev_get_drvdata(codec->dev->parent);
2551 __be16 *data = (__be16 *)ucontrol->value.bytes.data;
2552 s16 val = be16_to_cpu(*data);
2554 if (abs(val) >= 4096) {
2555 dev_err(arizona->dev, "Rejecting unstable LHPF coefficients\n");
2559 return snd_soc_bytes_put(kcontrol, ucontrol);
2561 EXPORT_SYMBOL_GPL(arizona_lhpf_coeff_put);
2563 int arizona_register_notifier(struct snd_soc_codec *codec,
2564 struct notifier_block *nb,
2565 int (*notify)(struct notifier_block *nb,
2566 unsigned long action, void *data))
2568 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
2569 struct arizona *arizona = priv->arizona;
2571 nb->notifier_call = notify;
2573 return blocking_notifier_chain_register(&arizona->notifier, nb);
2575 EXPORT_SYMBOL_GPL(arizona_register_notifier);
2577 int arizona_unregister_notifier(struct snd_soc_codec *codec,
2578 struct notifier_block *nb)
2580 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
2581 struct arizona *arizona = priv->arizona;
2583 return blocking_notifier_chain_unregister(&arizona->notifier, nb);
2585 EXPORT_SYMBOL_GPL(arizona_unregister_notifier);
2587 MODULE_DESCRIPTION("ASoC Wolfson Arizona class device support");
2588 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
2589 MODULE_LICENSE("GPL");