sound/soc/amd/raven/acp3x-pcm-dma.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 //
   3 // AMD ALSA SoC PCM Driver
   4 //
   5 //Copyright 2016 Advanced Micro Devices, Inc.
   6
   7 #include <linux/platform_device.h>
   8 #include <linux/module.h>
   9 #include <linux/err.h>
  10 #include <linux/io.h>
  11 #include <linux/pm_runtime.h>
  12 #include <sound/pcm.h>
  13 #include <sound/pcm_params.h>
  14 #include <sound/soc.h>
  15 #include <sound/soc-dai.h>
  16
  17 #include "acp3x.h"
  18
  19 #define DRV_NAME "acp3x-i2s-audio"
  20
  21 struct i2s_dev_data {
  22         bool tdm_mode;
  23         unsigned int i2s_irq;
  24         u32 tdm_fmt;
  25         void __iomem *acp3x_base;
  26         struct snd_pcm_substream *play_stream;
  27         struct snd_pcm_substream *capture_stream;
  28 };
  29
  30 struct i2s_stream_instance {
  31         u16 num_pages;
  32         u16 channels;
  33         u32 xfer_resolution;
  34         u64 bytescount;
  35         dma_addr_t dma_addr;
  36         void __iomem *acp3x_base;
  37 };
  38
  39 static const struct snd_pcm_hardware acp3x_pcm_hardware_playback = {
  40         .info = SNDRV_PCM_INFO_INTERLEAVED |
  41                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
  42                 SNDRV_PCM_INFO_BATCH |
  43                 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
  44         .formats = SNDRV_PCM_FMTBIT_S16_LE |  SNDRV_PCM_FMTBIT_S8 |
  45                    SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE |
  46                    SNDRV_PCM_FMTBIT_S32_LE,
  47         .channels_min = 2,
  48         .channels_max = 8,
  49         .rates = SNDRV_PCM_RATE_8000_96000,
  50         .rate_min = 8000,
  51         .rate_max = 96000,
  52         .buffer_bytes_max = PLAYBACK_MAX_NUM_PERIODS * PLAYBACK_MAX_PERIOD_SIZE,
  53         .period_bytes_min = PLAYBACK_MIN_PERIOD_SIZE,
  54         .period_bytes_max = PLAYBACK_MAX_PERIOD_SIZE,
  55         .periods_min = PLAYBACK_MIN_NUM_PERIODS,
  56         .periods_max = PLAYBACK_MAX_NUM_PERIODS,
  57 };
  58
  59 static const struct snd_pcm_hardware acp3x_pcm_hardware_capture = {
  60         .info = SNDRV_PCM_INFO_INTERLEAVED |
  61                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
  62                 SNDRV_PCM_INFO_BATCH |
  63             SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
  64         .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
  65                    SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE |
  66                    SNDRV_PCM_FMTBIT_S32_LE,
  67         .channels_min = 2,
  68         .channels_max = 2,
  69         .rates = SNDRV_PCM_RATE_8000_48000,
  70         .rate_min = 8000,
  71         .rate_max = 48000,
  72         .buffer_bytes_max = CAPTURE_MAX_NUM_PERIODS * CAPTURE_MAX_PERIOD_SIZE,
  73         .period_bytes_min = CAPTURE_MIN_PERIOD_SIZE,
  74         .period_bytes_max = CAPTURE_MAX_PERIOD_SIZE,
  75         .periods_min = CAPTURE_MIN_NUM_PERIODS,
  76         .periods_max = CAPTURE_MAX_NUM_PERIODS,
  77 };
  78
  79 static int acp3x_power_on(void __iomem *acp3x_base, bool on)
  80 {
  81         u16 val, mask;
  82         u32 timeout;
  83
  84         if (on == true) {
  85                 val = 1;
  86                 mask = ACP3x_POWER_ON;
  87         } else {
  88                 val = 0;
  89                 mask = ACP3x_POWER_OFF;
  90         }
  91
  92         rv_writel(val, acp3x_base + mmACP_PGFSM_CONTROL);
  93         timeout = 0;
  94         while (true) {
  95                 val = rv_readl(acp3x_base + mmACP_PGFSM_STATUS);
  96                 if ((val & ACP3x_POWER_OFF_IN_PROGRESS) == mask)
  97                         break;
  98                 if (timeout > 100) {
  99                         pr_err("ACP3x power state change failure\n");
 100                         return -ENODEV;
 101                 }
 102                 timeout++;
 103                 cpu_relax();
 104         }
 105         return 0;
 106 }
 107
 108 static int acp3x_reset(void __iomem *acp3x_base)
 109 {
 110         u32 val, timeout;
 111
 112         rv_writel(1, acp3x_base + mmACP_SOFT_RESET);
 113         timeout = 0;
 114         while (true) {
 115                 val = rv_readl(acp3x_base + mmACP_SOFT_RESET);
 116                 if ((val & ACP3x_SOFT_RESET__SoftResetAudDone_MASK) ||
 117                      timeout > 100) {
 118                         if (val & ACP3x_SOFT_RESET__SoftResetAudDone_MASK)
 119                                 break;
 120                         return -ENODEV;
 121                 }
 122                 timeout++;
 123                 cpu_relax();
 124         }
 125
 126         rv_writel(0, acp3x_base + mmACP_SOFT_RESET);
 127         timeout = 0;
 128         while (true) {
 129                 val = rv_readl(acp3x_base + mmACP_SOFT_RESET);
 130                 if (!val || timeout > 100) {
 131                         if (!val)
 132                                 break;
 133                         return -ENODEV;
 134                 }
 135                 timeout++;
 136                 cpu_relax();
 137         }
 138         return 0;
 139 }
 140
 141 static int acp3x_init(void __iomem *acp3x_base)
 142 {
 143         int ret;
 144
 145         /* power on */
 146         ret = acp3x_power_on(acp3x_base, true);
 147         if (ret) {
 148                 pr_err("ACP3x power on failed\n");
 149                 return ret;
 150         }
 151         /* Reset */
 152         ret = acp3x_reset(acp3x_base);
 153         if (ret) {
 154                 pr_err("ACP3x reset failed\n");
 155                 return ret;
 156         }
 157         return 0;
 158 }
 159
 160 static int acp3x_deinit(void __iomem *acp3x_base)
 161 {
 162         int ret;
 163
 164         /* Reset */
 165         ret = acp3x_reset(acp3x_base);
 166         if (ret) {
 167                 pr_err("ACP3x reset failed\n");
 168                 return ret;
 169         }
 170         /* power off */
 171         ret = acp3x_power_on(acp3x_base, false);
 172         if (ret) {
 173                 pr_err("ACP3x power off failed\n");
 174                 return ret;
 175         }
 176         return 0;
 177 }
 178
 179 static irqreturn_t i2s_irq_handler(int irq, void *dev_id)
 180 {
 181         u16 play_flag, cap_flag;
 182         u32 val;
 183         struct i2s_dev_data *rv_i2s_data = dev_id;
 184
 185         if (!rv_i2s_data)
 186                 return IRQ_NONE;
 187
 188         play_flag = 0;
 189         cap_flag = 0;
 190         val = rv_readl(rv_i2s_data->acp3x_base + mmACP_EXTERNAL_INTR_STAT);
 191         if ((val & BIT(BT_TX_THRESHOLD)) && rv_i2s_data->play_stream) {
 192                 rv_writel(BIT(BT_TX_THRESHOLD), rv_i2s_data->acp3x_base +
 193                           mmACP_EXTERNAL_INTR_STAT);
 194                 snd_pcm_period_elapsed(rv_i2s_data->play_stream);
 195                 play_flag = 1;
 196         }
 197
 198         if ((val & BIT(BT_RX_THRESHOLD)) && rv_i2s_data->capture_stream) {
 199                 rv_writel(BIT(BT_RX_THRESHOLD), rv_i2s_data->acp3x_base +
 200                           mmACP_EXTERNAL_INTR_STAT);
 201                 snd_pcm_period_elapsed(rv_i2s_data->capture_stream);
 202                 cap_flag = 1;
 203         }
 204
 205         if (play_flag | cap_flag)
 206                 return IRQ_HANDLED;
 207         else
 208                 return IRQ_NONE;
 209 }
 210
 211 static void config_acp3x_dma(struct i2s_stream_instance *rtd, int direction)
 212 {
 213         u16 page_idx;
 214         u32 low, high, val, acp_fifo_addr;
 215         dma_addr_t addr = rtd->dma_addr;
 216
 217         /* 8 scratch registers used to map one 64 bit address */
 218         if (direction == SNDRV_PCM_STREAM_PLAYBACK)
 219                 val = 0;
 220         else
 221                 val = rtd->num_pages * 8;
 222
 223         /* Group Enable */
 224         rv_writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp3x_base +
 225                   mmACPAXI2AXI_ATU_BASE_ADDR_GRP_1);
 226         rv_writel(PAGE_SIZE_4K_ENABLE, rtd->acp3x_base +
 227                   mmACPAXI2AXI_ATU_PAGE_SIZE_GRP_1);
 228
 229         for (page_idx = 0; page_idx < rtd->num_pages; page_idx++) {
 230                 /* Load the low address of page int ACP SRAM through SRBM */
 231                 low = lower_32_bits(addr);
 232                 high = upper_32_bits(addr);
 233
 234                 rv_writel(low, rtd->acp3x_base + mmACP_SCRATCH_REG_0 + val);
 235                 high |= BIT(31);
 236                 rv_writel(high, rtd->acp3x_base + mmACP_SCRATCH_REG_0 + val
 237                                 + 4);
 238                 /* Move to next physically contiguos page */
 239                 val += 8;
 240                 addr += PAGE_SIZE;
 241         }
 242
 243         if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
 244                 /* Config ringbuffer */
 245                 rv_writel(MEM_WINDOW_START, rtd->acp3x_base +
 246                           mmACP_BT_TX_RINGBUFADDR);
 247                 rv_writel(MAX_BUFFER, rtd->acp3x_base +
 248                           mmACP_BT_TX_RINGBUFSIZE);
 249                 rv_writel(DMA_SIZE, rtd->acp3x_base + mmACP_BT_TX_DMA_SIZE);
 250
 251                 /* Config audio fifo */
 252                 acp_fifo_addr = ACP_SRAM_PTE_OFFSET + (rtd->num_pages * 8)
 253                                 + PLAYBACK_FIFO_ADDR_OFFSET;
 254                 rv_writel(acp_fifo_addr, rtd->acp3x_base +
 255                           mmACP_BT_TX_FIFOADDR);
 256                 rv_writel(FIFO_SIZE, rtd->acp3x_base + mmACP_BT_TX_FIFOSIZE);
 257         } else {
 258                 /* Config ringbuffer */
 259                 rv_writel(MEM_WINDOW_START + MAX_BUFFER, rtd->acp3x_base +
 260                           mmACP_BT_RX_RINGBUFADDR);
 261                 rv_writel(MAX_BUFFER, rtd->acp3x_base +
 262                           mmACP_BT_RX_RINGBUFSIZE);
 263                 rv_writel(DMA_SIZE, rtd->acp3x_base + mmACP_BT_RX_DMA_SIZE);
 264
 265                 /* Config audio fifo */
 266                 acp_fifo_addr = ACP_SRAM_PTE_OFFSET +
 267                                 (rtd->num_pages * 8) + CAPTURE_FIFO_ADDR_OFFSET;
 268                 rv_writel(acp_fifo_addr, rtd->acp3x_base +
 269                           mmACP_BT_RX_FIFOADDR);
 270                 rv_writel(FIFO_SIZE, rtd->acp3x_base + mmACP_BT_RX_FIFOSIZE);
 271         }
 272
 273         /* Enable  watermark/period interrupt to host */
 274         rv_writel(BIT(BT_TX_THRESHOLD) | BIT(BT_RX_THRESHOLD),
 275                   rtd->acp3x_base + mmACP_EXTERNAL_INTR_CNTL);
 276 }
 277
 278 static int acp3x_dma_open(struct snd_soc_component *component,
 279                           struct snd_pcm_substream *substream)
 280 {
 281         int ret = 0;
 282         struct snd_pcm_runtime *runtime = substream->runtime;
 283         struct i2s_dev_data *adata = dev_get_drvdata(component->dev);
 284         struct i2s_stream_instance *i2s_data = kzalloc(sizeof(struct i2s_stream_instance),
 285                                                        GFP_KERNEL);
 286         if (!i2s_data)
 287                 return -EINVAL;
 288
 289         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 290                 runtime->hw = acp3x_pcm_hardware_playback;
 291         else
 292                 runtime->hw = acp3x_pcm_hardware_capture;
 293
 294         ret = snd_pcm_hw_constraint_integer(runtime,
 295                                             SNDRV_PCM_HW_PARAM_PERIODS);
 296         if (ret < 0) {
 297                 dev_err(component->dev, "set integer constraint failed\n");
 298                 kfree(i2s_data);
 299                 return ret;
 300         }
 301
 302         if (!adata->play_stream && !adata->capture_stream)
 303                 rv_writel(1, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
 304
 305         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 306                 adata->play_stream = substream;
 307         else
 308                 adata->capture_stream = substream;
 309
 310         i2s_data->acp3x_base = adata->acp3x_base;
 311         runtime->private_data = i2s_data;
 312         return 0;
 313 }
 314
 315 static u64 acp_get_byte_count(struct i2s_stream_instance *rtd, int direction)
 316 {
 317         u64 byte_count;
 318
 319         if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
 320                 byte_count = rv_readl(rtd->acp3x_base +
 321                                       mmACP_BT_TX_LINEARPOSITIONCNTR_HIGH);
 322                 byte_count |= rv_readl(rtd->acp3x_base +
 323                                        mmACP_BT_TX_LINEARPOSITIONCNTR_LOW);
 324         } else {
 325                 byte_count = rv_readl(rtd->acp3x_base +
 326                                       mmACP_BT_RX_LINEARPOSITIONCNTR_HIGH);
 327                 byte_count |= rv_readl(rtd->acp3x_base +
 328                                        mmACP_BT_RX_LINEARPOSITIONCNTR_LOW);
 329         }
 330         return byte_count;
 331 }
 332
 333 static int acp3x_dma_hw_params(struct snd_soc_component *component,
 334                                struct snd_pcm_substream *substream,
 335                                struct snd_pcm_hw_params *params)
 336 {
 337         u64 size;
 338         struct snd_pcm_runtime *runtime = substream->runtime;
 339         struct i2s_stream_instance *rtd = runtime->private_data;
 340
 341         if (!rtd)
 342                 return -EINVAL;
 343
 344         size = params_buffer_bytes(params);
 345         rtd->dma_addr = substream->dma_buffer.addr;
 346         rtd->num_pages = (PAGE_ALIGN(size) >> PAGE_SHIFT);
 347         config_acp3x_dma(rtd, substream->stream);
 348         return 0;
 349 }
 350
 351 static snd_pcm_uframes_t acp3x_dma_pointer(struct snd_soc_component *component,
 352                                            struct snd_pcm_substream *substream)
 353 {
 354         u32 pos = 0;
 355         u32 buffersize = 0;
 356         u64 bytescount = 0;
 357         struct i2s_stream_instance *rtd =
 358                 substream->runtime->private_data;
 359
 360         buffersize = frames_to_bytes(substream->runtime,
 361                                      substream->runtime->buffer_size);
 362         bytescount = acp_get_byte_count(rtd, substream->stream);
 363         if (bytescount > rtd->bytescount)
 364                 bytescount -= rtd->bytescount;
 365         pos = do_div(bytescount, buffersize);
 366         return bytes_to_frames(substream->runtime, pos);
 367 }
 368
 369 static int acp3x_dma_new(struct snd_soc_component *component,
 370                          struct snd_soc_pcm_runtime *rtd)
 371 {
 372         struct device *parent = component->dev->parent;
 373         snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_DEV,
 374                                        parent, MIN_BUFFER, MAX_BUFFER);
 375         return 0;
 376 }
 377
 378 static int acp3x_dma_mmap(struct snd_soc_component *component,
 379                           struct snd_pcm_substream *substream,
 380                           struct vm_area_struct *vma)
 381 {
 382         return snd_pcm_lib_default_mmap(substream, vma);
 383 }
 384
 385 static int acp3x_dma_close(struct snd_soc_component *component,
 386                            struct snd_pcm_substream *substream)
 387 {
 388         struct i2s_stream_instance *rtd = substream->runtime->private_data;
 389         struct i2s_dev_data *adata = dev_get_drvdata(component->dev);
 390
 391         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 392                 adata->play_stream = NULL;
 393         else
 394                 adata->capture_stream = NULL;
 395
 396         /* Disable ACP irq, when the current stream is being closed and
 397          * another stream is also not active.
 398          */
 399         if (!adata->play_stream && !adata->capture_stream)
 400                 rv_writel(0, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
 401         kfree(rtd);
 402         return 0;
 403 }
 404
 405 static int acp3x_dai_i2s_set_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
 406 {
 407
 408         struct i2s_dev_data *adata = snd_soc_dai_get_drvdata(cpu_dai);
 409
 410         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 411         case SND_SOC_DAIFMT_I2S:
 412                 adata->tdm_mode = false;
 413                 break;
 414         case SND_SOC_DAIFMT_DSP_A:
 415                 adata->tdm_mode = true;
 416                 break;
 417         default:
 418                 return -EINVAL;
 419         }
 420
 421         return 0;
 422 }
 423
 424 static int acp3x_dai_set_tdm_slot(struct snd_soc_dai *cpu_dai, u32 tx_mask,
 425                                   u32 rx_mask, int slots, int slot_width)
 426 {
 427         u32 val = 0;
 428         u16 slot_len;
 429
 430         struct i2s_dev_data *adata = snd_soc_dai_get_drvdata(cpu_dai);
 431
 432         switch (slot_width) {
 433         case SLOT_WIDTH_8:
 434                 slot_len = 8;
 435                 break;
 436         case SLOT_WIDTH_16:
 437                 slot_len = 16;
 438                 break;
 439         case SLOT_WIDTH_24:
 440                 slot_len = 24;
 441                 break;
 442         case SLOT_WIDTH_32:
 443                 slot_len = 0;
 444                 break;
 445         default:
 446                 return -EINVAL;
 447         }
 448
 449         val = rv_readl(adata->acp3x_base + mmACP_BTTDM_ITER);
 450         rv_writel((val | 0x2), adata->acp3x_base + mmACP_BTTDM_ITER);
 451         val = rv_readl(adata->acp3x_base + mmACP_BTTDM_IRER);
 452         rv_writel((val | 0x2), adata->acp3x_base + mmACP_BTTDM_IRER);
 453
 454         val = (FRM_LEN | (slots << 15) | (slot_len << 18));
 455         rv_writel(val, adata->acp3x_base + mmACP_BTTDM_TXFRMT);
 456         rv_writel(val, adata->acp3x_base + mmACP_BTTDM_RXFRMT);
 457
 458         adata->tdm_fmt = val;
 459         return 0;
 460 }
 461
 462 static int acp3x_dai_i2s_hwparams(struct snd_pcm_substream *substream,
 463                                   struct snd_pcm_hw_params *params,
 464                                   struct snd_soc_dai *dai)
 465 {
 466         u32 val = 0;
 467         struct i2s_stream_instance *rtd = substream->runtime->private_data;
 468
 469         switch (params_format(params)) {
 470         case SNDRV_PCM_FORMAT_U8:
 471         case SNDRV_PCM_FORMAT_S8:
 472                 rtd->xfer_resolution = 0x0;
 473                 break;
 474         case SNDRV_PCM_FORMAT_S16_LE:
 475                 rtd->xfer_resolution = 0x02;
 476                 break;
 477         case SNDRV_PCM_FORMAT_S24_LE:
 478                 rtd->xfer_resolution = 0x04;
 479                 break;
 480         case SNDRV_PCM_FORMAT_S32_LE:
 481                 rtd->xfer_resolution = 0x05;
 482                 break;
 483         default:
 484                 return -EINVAL;
 485         }
 486         val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_ITER);
 487         val = val | (rtd->xfer_resolution  << 3);
 488         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 489                 rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_ITER);
 490         else
 491                 rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_IRER);
 492
 493         return 0;
 494 }
 495
 496 static int acp3x_dai_i2s_trigger(struct snd_pcm_substream *substream,
 497                                  int cmd, struct snd_soc_dai *dai)
 498 {
 499         int ret = 0;
 500         struct i2s_stream_instance *rtd = substream->runtime->private_data;
 501         u32 val, period_bytes;
 502
 503         period_bytes = frames_to_bytes(substream->runtime,
 504                                        substream->runtime->period_size);
 505         switch (cmd) {
 506         case SNDRV_PCM_TRIGGER_START:
 507         case SNDRV_PCM_TRIGGER_RESUME:
 508         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 509                 rtd->bytescount = acp_get_byte_count(rtd, substream->stream);
 510                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 511                         rv_writel(period_bytes, rtd->acp3x_base +
 512                                   mmACP_BT_TX_INTR_WATERMARK_SIZE);
 513                         val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_ITER);
 514                         val = val | BIT(0);
 515                         rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_ITER);
 516                 } else {
 517                         rv_writel(period_bytes, rtd->acp3x_base +
 518                                   mmACP_BT_RX_INTR_WATERMARK_SIZE);
 519                         val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_IRER);
 520                         val = val | BIT(0);
 521                         rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_IRER);
 522                 }
 523                 rv_writel(1, rtd->acp3x_base + mmACP_BTTDM_IER);
 524                 break;
 525         case SNDRV_PCM_TRIGGER_STOP:
 526         case SNDRV_PCM_TRIGGER_SUSPEND:
 527         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 528                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 529                         val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_ITER);
 530                         val = val & ~BIT(0);
 531                         rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_ITER);
 532                 } else {
 533                         val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_IRER);
 534                         val = val & ~BIT(0);
 535                         rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_IRER);
 536                 }
 537                 rv_writel(0, rtd->acp3x_base + mmACP_BTTDM_IER);
 538                 break;
 539         default:
 540                 ret = -EINVAL;
 541                 break;
 542         }
 543
 544         return ret;
 545 }
 546
 547 static struct snd_soc_dai_ops acp3x_dai_i2s_ops = {
 548         .hw_params = acp3x_dai_i2s_hwparams,
 549         .trigger   = acp3x_dai_i2s_trigger,
 550         .set_fmt = acp3x_dai_i2s_set_fmt,
 551         .set_tdm_slot = acp3x_dai_set_tdm_slot,
 552 };
 553
 554 static struct snd_soc_dai_driver acp3x_i2s_dai_driver = {
 555         .playback = {
 556                 .rates = SNDRV_PCM_RATE_8000_96000,
 557                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
 558                                         SNDRV_PCM_FMTBIT_U8 |
 559                                         SNDRV_PCM_FMTBIT_S24_LE |
 560                                         SNDRV_PCM_FMTBIT_S32_LE,
 561                 .channels_min = 2,
 562                 .channels_max = 8,
 563
 564                 .rate_min = 8000,
 565                 .rate_max = 96000,
 566         },
 567         .capture = {
 568                 .rates = SNDRV_PCM_RATE_8000_48000,
 569                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
 570                                         SNDRV_PCM_FMTBIT_U8 |
 571                                         SNDRV_PCM_FMTBIT_S24_LE |
 572                                         SNDRV_PCM_FMTBIT_S32_LE,
 573                 .channels_min = 2,
 574                 .channels_max = 2,
 575                 .rate_min = 8000,
 576                 .rate_max = 48000,
 577         },
 578         .ops = &acp3x_dai_i2s_ops,
 579 };
 580
 581 static const struct snd_soc_component_driver acp3x_i2s_component = {
 582         .name           = DRV_NAME,
 583         .open           = acp3x_dma_open,
 584         .close          = acp3x_dma_close,
 585         .hw_params      = acp3x_dma_hw_params,
 586         .pointer        = acp3x_dma_pointer,
 587         .mmap           = acp3x_dma_mmap,
 588         .pcm_construct  = acp3x_dma_new,
 589 };
 590
 591 static int acp3x_audio_probe(struct platform_device *pdev)
 592 {
 593         int status;
 594         struct resource *res;
 595         struct i2s_dev_data *adata;
 596         unsigned int irqflags;
 597
 598         if (!pdev->dev.platform_data) {
 599                 dev_err(&pdev->dev, "platform_data not retrieved\n");
 600                 return -ENODEV;
 601         }
 602         irqflags = *((unsigned int *)(pdev->dev.platform_data));
 603
 604         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 605         if (!res) {
 606                 dev_err(&pdev->dev, "IORESOURCE_IRQ FAILED\n");
 607                 return -ENODEV;
 608         }
 609
 610         adata = devm_kzalloc(&pdev->dev, sizeof(*adata), GFP_KERNEL);
 611         if (!adata)
 612                 return -ENOMEM;
 613
 614         adata->acp3x_base = devm_ioremap(&pdev->dev, res->start,
 615                                          resource_size(res));
 616
 617         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 618         if (!res) {
 619                 dev_err(&pdev->dev, "IORESOURCE_IRQ FAILED\n");
 620                 return -ENODEV;
 621         }
 622
 623         adata->i2s_irq = res->start;
 624         adata->play_stream = NULL;
 625         adata->capture_stream = NULL;
 626
 627         dev_set_drvdata(&pdev->dev, adata);
 628         /* Initialize ACP */
 629         status = acp3x_init(adata->acp3x_base);
 630         if (status)
 631                 return -ENODEV;
 632         status = devm_snd_soc_register_component(&pdev->dev,
 633                                                  &acp3x_i2s_component,
 634                                                  &acp3x_i2s_dai_driver, 1);
 635         if (status) {
 636                 dev_err(&pdev->dev, "Fail to register acp i2s dai\n");
 637                 goto dev_err;
 638         }
 639         status = devm_request_irq(&pdev->dev, adata->i2s_irq, i2s_irq_handler,
 640                                   irqflags, "ACP3x_I2S_IRQ", adata);
 641         if (status) {
 642                 dev_err(&pdev->dev, "ACP3x I2S IRQ request failed\n");
 643                 goto dev_err;
 644         }
 645
 646         pm_runtime_set_autosuspend_delay(&pdev->dev, 10000);
 647         pm_runtime_use_autosuspend(&pdev->dev);
 648         pm_runtime_enable(&pdev->dev);
 649         return 0;
 650 dev_err:
 651         status = acp3x_deinit(adata->acp3x_base);
 652         if (status)
 653                 dev_err(&pdev->dev, "ACP de-init failed\n");
 654         else
 655                 dev_info(&pdev->dev, "ACP de-initialized\n");
 656         /*ignore device status and return driver probe error*/
 657         return -ENODEV;
 658 }
 659
 660 static int acp3x_audio_remove(struct platform_device *pdev)
 661 {
 662         int ret;
 663         struct i2s_dev_data *adata = dev_get_drvdata(&pdev->dev);
 664
 665         ret = acp3x_deinit(adata->acp3x_base);
 666         if (ret)
 667                 dev_err(&pdev->dev, "ACP de-init failed\n");
 668         else
 669                 dev_info(&pdev->dev, "ACP de-initialized\n");
 670
 671         pm_runtime_disable(&pdev->dev);
 672         return 0;
 673 }
 674
 675 static int acp3x_resume(struct device *dev)
 676 {
 677         int status;
 678         u32 val;
 679         struct i2s_dev_data *adata = dev_get_drvdata(dev);
 680
 681         status = acp3x_init(adata->acp3x_base);
 682         if (status)
 683                 return -ENODEV;
 684
 685         if (adata->play_stream && adata->play_stream->runtime) {
 686                 struct i2s_stream_instance *rtd =
 687                         adata->play_stream->runtime->private_data;
 688                 config_acp3x_dma(rtd, SNDRV_PCM_STREAM_PLAYBACK);
 689                 rv_writel((rtd->xfer_resolution  << 3),
 690                           rtd->acp3x_base + mmACP_BTTDM_ITER);
 691                 if (adata->tdm_mode == true) {
 692                         rv_writel(adata->tdm_fmt, adata->acp3x_base +
 693                                   mmACP_BTTDM_TXFRMT);
 694                         val = rv_readl(adata->acp3x_base + mmACP_BTTDM_ITER);
 695                         rv_writel((val | 0x2), adata->acp3x_base +
 696                                   mmACP_BTTDM_ITER);
 697                 }
 698         }
 699
 700         if (adata->capture_stream && adata->capture_stream->runtime) {
 701                 struct i2s_stream_instance *rtd =
 702                         adata->capture_stream->runtime->private_data;
 703                 config_acp3x_dma(rtd, SNDRV_PCM_STREAM_CAPTURE);
 704                 rv_writel((rtd->xfer_resolution  << 3),
 705                           rtd->acp3x_base + mmACP_BTTDM_IRER);
 706                 if (adata->tdm_mode == true) {
 707                         rv_writel(adata->tdm_fmt, adata->acp3x_base +
 708                                   mmACP_BTTDM_RXFRMT);
 709                         val = rv_readl(adata->acp3x_base + mmACP_BTTDM_IRER);
 710                         rv_writel((val | 0x2), adata->acp3x_base +
 711                                   mmACP_BTTDM_IRER);
 712                 }
 713         }
 714
 715         rv_writel(1, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
 716         return 0;
 717 }
 718
 719
 720 static int acp3x_pcm_runtime_suspend(struct device *dev)
 721 {
 722         int status;
 723         struct i2s_dev_data *adata = dev_get_drvdata(dev);
 724
 725         status = acp3x_deinit(adata->acp3x_base);
 726         if (status)
 727                 dev_err(dev, "ACP de-init failed\n");
 728         else
 729                 dev_info(dev, "ACP de-initialized\n");
 730
 731         rv_writel(0, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
 732
 733         return 0;
 734 }
 735
 736 static int acp3x_pcm_runtime_resume(struct device *dev)
 737 {
 738         int status;
 739         struct i2s_dev_data *adata = dev_get_drvdata(dev);
 740
 741         status = acp3x_init(adata->acp3x_base);
 742         if (status)
 743                 return -ENODEV;
 744         rv_writel(1, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
 745         return 0;
 746 }
 747
 748 static const struct dev_pm_ops acp3x_pm_ops = {
 749         .runtime_suspend = acp3x_pcm_runtime_suspend,
 750         .runtime_resume = acp3x_pcm_runtime_resume,
 751         .resume = acp3x_resume,
 752 };
 753
 754 static struct platform_driver acp3x_dma_driver = {
 755         .probe = acp3x_audio_probe,
 756         .remove = acp3x_audio_remove,
 757         .driver = {
 758                 .name = "acp3x_rv_i2s",
 759                 .pm = &acp3x_pm_ops,
 760         },
 761 };
 762
 763 module_platform_driver(acp3x_dma_driver);
 764
 765 MODULE_AUTHOR("Maruthi.Bayyavarapu@amd.com");
 766 MODULE_AUTHOR("Vijendar.Mukunda@amd.com");
 767 MODULE_DESCRIPTION("AMD ACP 3.x PCM Driver");
 768 MODULE_LICENSE("GPL v2");
 769 MODULE_ALIAS("platform:" DRV_NAME);