drivers/scsi/qla2xxx/qla_os.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * QLogic Fibre Channel HBA Driver
   4  * Copyright (c)  2003-2014 QLogic Corporation
   5  */
   6 #include "qla_def.h"
   7
   8 #include <linux/bitfield.h>
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <linux/refcount.h>
  18 #include <linux/crash_dump.h>
  19 #include <linux/trace_events.h>
  20 #include <linux/trace.h>
  21
  22 #include <scsi/scsi_tcq.h>
  23 #include <scsi/scsicam.h>
  24 #include <scsi/scsi_transport.h>
  25 #include <scsi/scsi_transport_fc.h>
  26
  27 #include "qla_target.h"
  28
  29 /*
  30  * Driver version
  31  */
  32 char qla2x00_version_str[40];
  33
  34 static int apidev_major;
  35
  36 /*
  37  * SRB allocation cache
  38  */
  39 struct kmem_cache *srb_cachep;
  40
  41 static struct trace_array *qla_trc_array;
  42
  43 int ql2xfulldump_on_mpifail;
  44 module_param(ql2xfulldump_on_mpifail, int, S_IRUGO | S_IWUSR);
  45 MODULE_PARM_DESC(ql2xfulldump_on_mpifail,
  46                  "Set this to take full dump on MPI hang.");
  47
  48 int ql2xenforce_iocb_limit = 2;
  49 module_param(ql2xenforce_iocb_limit, int, S_IRUGO | S_IWUSR);
  50 MODULE_PARM_DESC(ql2xenforce_iocb_limit,
  51                  "Enforce IOCB throttling, to avoid FW congestion. (default: 2) "
  52                  "1: track usage per queue, 2: track usage per adapter");
  53
  54 /*
  55  * CT6 CTX allocation cache
  56  */
  57 static struct kmem_cache *ctx_cachep;
  58 /*
  59  * error level for logging
  60  */
  61 uint ql_errlev = 0x8001;
  62
  63 int ql2xsecenable;
  64 module_param(ql2xsecenable, int, S_IRUGO);
  65 MODULE_PARM_DESC(ql2xsecenable,
  66         "Enable/disable security. 0(Default) - Security disabled. 1 - Security enabled.");
  67
  68 static int ql2xenableclass2;
  69 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  70 MODULE_PARM_DESC(ql2xenableclass2,
  71                 "Specify if Class 2 operations are supported from the very "
  72                 "beginning. Default is 0 - class 2 not supported.");
  73
  74
  75 int ql2xlogintimeout = 20;
  76 module_param(ql2xlogintimeout, int, S_IRUGO);
  77 MODULE_PARM_DESC(ql2xlogintimeout,
  78                 "Login timeout value in seconds.");
  79
  80 int qlport_down_retry;
  81 module_param(qlport_down_retry, int, S_IRUGO);
  82 MODULE_PARM_DESC(qlport_down_retry,
  83                 "Maximum number of command retries to a port that returns "
  84                 "a PORT-DOWN status.");
  85
  86 int ql2xplogiabsentdevice;
  87 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  88 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  89                 "Option to enable PLOGI to devices that are not present after "
  90                 "a Fabric scan.  This is needed for several broken switches. "
  91                 "Default is 0 - no PLOGI. 1 - perform PLOGI.");
  92
  93 int ql2xloginretrycount;
  94 module_param(ql2xloginretrycount, int, S_IRUGO);
  95 MODULE_PARM_DESC(ql2xloginretrycount,
  96                 "Specify an alternate value for the NVRAM login retry count.");
  97
  98 int ql2xallocfwdump = 1;
  99 module_param(ql2xallocfwdump, int, S_IRUGO);
 100 MODULE_PARM_DESC(ql2xallocfwdump,
 101                 "Option to enable allocation of memory for a firmware dump "
 102                 "during HBA initialization.  Memory allocation requirements "
 103                 "vary by ISP type.  Default is 1 - allocate memory.");
 104
 105 int ql2xextended_error_logging;
 106 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
 107 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
 108 MODULE_PARM_DESC(ql2xextended_error_logging,
 109                 "Option to enable extended error logging,\n"
 110                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
 111                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
 112                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
 113                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
 114                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
 115                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
 116                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
 117                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
 118                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
 119                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
 120                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
 121                 "\t\t0x1e400000 - Preferred value for capturing essential "
 122                 "debug information (equivalent to old "
 123                 "ql2xextended_error_logging=1).\n"
 124                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 125
 126 int ql2xextended_error_logging_ktrace = 1;
 127 module_param(ql2xextended_error_logging_ktrace, int, S_IRUGO|S_IWUSR);
 128 MODULE_PARM_DESC(ql2xextended_error_logging_ktrace,
 129                 "Same BIT definition as ql2xextended_error_logging, but used to control logging to kernel trace buffer (default=1).\n");
 130
 131 int ql2xshiftctondsd = 6;
 132 module_param(ql2xshiftctondsd, int, S_IRUGO);
 133 MODULE_PARM_DESC(ql2xshiftctondsd,
 134                 "Set to control shifting of command type processing "
 135                 "based on total number of SG elements.");
 136
 137 int ql2xfdmienable = 1;
 138 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 139 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 140 MODULE_PARM_DESC(ql2xfdmienable,
 141                 "Enables FDMI registrations. "
 142                 "0 - no FDMI registrations. "
 143                 "1 - provide FDMI registrations (default).");
 144
 145 #define MAX_Q_DEPTH     64
 146 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 147 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 148 MODULE_PARM_DESC(ql2xmaxqdepth,
 149                 "Maximum queue depth to set for each LUN. "
 150                 "Default is 64.");
 151
 152 int ql2xenabledif = 2;
 153 module_param(ql2xenabledif, int, S_IRUGO);
 154 MODULE_PARM_DESC(ql2xenabledif,
 155                 " Enable T10-CRC-DIF:\n"
 156                 " Default is 2.\n"
 157                 "  0 -- No DIF Support\n"
 158                 "  1 -- Enable DIF for all types\n"
 159                 "  2 -- Enable DIF for all types, except Type 0.\n");
 160
 161 #if (IS_ENABLED(CONFIG_NVME_FC))
 162 int ql2xnvmeenable = 1;
 163 #else
 164 int ql2xnvmeenable;
 165 #endif
 166 module_param(ql2xnvmeenable, int, 0644);
 167 MODULE_PARM_DESC(ql2xnvmeenable,
 168     "Enables NVME support. "
 169     "0 - no NVMe.  Default is Y");
 170
 171 int ql2xenablehba_err_chk = 2;
 172 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 173 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 174                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 175                 " Default is 2.\n"
 176                 "  0 -- Error isolation disabled\n"
 177                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 178                 "  2 -- Error isolation enabled for all Types\n");
 179
 180 int ql2xiidmaenable = 1;
 181 module_param(ql2xiidmaenable, int, S_IRUGO);
 182 MODULE_PARM_DESC(ql2xiidmaenable,
 183                 "Enables iIDMA settings "
 184                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 185
 186 int ql2xmqsupport = 1;
 187 module_param(ql2xmqsupport, int, S_IRUGO);
 188 MODULE_PARM_DESC(ql2xmqsupport,
 189                 "Enable on demand multiple queue pairs support "
 190                 "Default is 1 for supported. "
 191                 "Set it to 0 to turn off mq qpair support.");
 192
 193 int ql2xfwloadbin;
 194 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 195 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 196 MODULE_PARM_DESC(ql2xfwloadbin,
 197                 "Option to specify location from which to load ISP firmware:.\n"
 198                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 199                 "      interface.\n"
 200                 " 1 -- load firmware from flash.\n"
 201                 " 0 -- use default semantics.\n");
 202
 203 int ql2xetsenable;
 204 module_param(ql2xetsenable, int, S_IRUGO);
 205 MODULE_PARM_DESC(ql2xetsenable,
 206                 "Enables firmware ETS burst."
 207                 "Default is 0 - skip ETS enablement.");
 208
 209 int ql2xdbwr = 1;
 210 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 211 MODULE_PARM_DESC(ql2xdbwr,
 212                 "Option to specify scheme for request queue posting.\n"
 213                 " 0 -- Regular doorbell.\n"
 214                 " 1 -- CAMRAM doorbell (faster).\n");
 215
 216 int ql2xgffidenable;
 217 module_param(ql2xgffidenable, int, S_IRUGO);
 218 MODULE_PARM_DESC(ql2xgffidenable,
 219                 "Enables GFF_ID checks of port type. "
 220                 "Default is 0 - Do not use GFF_ID information.");
 221
 222 int ql2xasynctmfenable = 1;
 223 module_param(ql2xasynctmfenable, int, S_IRUGO);
 224 MODULE_PARM_DESC(ql2xasynctmfenable,
 225                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 226                 "Default is 1 - Issue TM IOCBs via mailbox mechanism.");
 227
 228 int ql2xdontresethba;
 229 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 230 MODULE_PARM_DESC(ql2xdontresethba,
 231                 "Option to specify reset behaviour.\n"
 232                 " 0 (Default) -- Reset on failure.\n"
 233                 " 1 -- Do not reset on failure.\n");
 234
 235 uint64_t ql2xmaxlun = MAX_LUNS;
 236 module_param(ql2xmaxlun, ullong, S_IRUGO);
 237 MODULE_PARM_DESC(ql2xmaxlun,
 238                 "Defines the maximum LU number to register with the SCSI "
 239                 "midlayer. Default is 65535.");
 240
 241 int ql2xmdcapmask = 0x1F;
 242 module_param(ql2xmdcapmask, int, S_IRUGO);
 243 MODULE_PARM_DESC(ql2xmdcapmask,
 244                 "Set the Minidump driver capture mask level. "
 245                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 246
 247 int ql2xmdenable = 1;
 248 module_param(ql2xmdenable, int, S_IRUGO);
 249 MODULE_PARM_DESC(ql2xmdenable,
 250                 "Enable/disable MiniDump. "
 251                 "0 - MiniDump disabled. "
 252                 "1 (Default) - MiniDump enabled.");
 253
 254 int ql2xexlogins;
 255 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 256 MODULE_PARM_DESC(ql2xexlogins,
 257                  "Number of extended Logins. "
 258                  "0 (Default)- Disabled.");
 259
 260 int ql2xexchoffld = 1024;
 261 module_param(ql2xexchoffld, uint, 0644);
 262 MODULE_PARM_DESC(ql2xexchoffld,
 263         "Number of target exchanges.");
 264
 265 int ql2xiniexchg = 1024;
 266 module_param(ql2xiniexchg, uint, 0644);
 267 MODULE_PARM_DESC(ql2xiniexchg,
 268         "Number of initiator exchanges.");
 269
 270 int ql2xfwholdabts;
 271 module_param(ql2xfwholdabts, int, S_IRUGO);
 272 MODULE_PARM_DESC(ql2xfwholdabts,
 273                 "Allow FW to hold status IOCB until ABTS rsp received. "
 274                 "0 (Default) Do not set fw option. "
 275                 "1 - Set fw option to hold ABTS.");
 276
 277 int ql2xmvasynctoatio = 1;
 278 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 279 MODULE_PARM_DESC(ql2xmvasynctoatio,
 280                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 281                 "0 (Default). Do not move IOCBs"
 282                 "1 - Move IOCBs.");
 283
 284 int ql2xautodetectsfp = 1;
 285 module_param(ql2xautodetectsfp, int, 0444);
 286 MODULE_PARM_DESC(ql2xautodetectsfp,
 287                  "Detect SFP range and set appropriate distance.\n"
 288                  "1 (Default): Enable\n");
 289
 290 int ql2xenablemsix = 1;
 291 module_param(ql2xenablemsix, int, 0444);
 292 MODULE_PARM_DESC(ql2xenablemsix,
 293                  "Set to enable MSI or MSI-X interrupt mechanism.\n"
 294                  " Default is 1, enable MSI-X interrupt mechanism.\n"
 295                  " 0 -- enable traditional pin-based mechanism.\n"
 296                  " 1 -- enable MSI-X interrupt mechanism.\n"
 297                  " 2 -- enable MSI interrupt mechanism.\n");
 298
 299 int qla2xuseresexchforels;
 300 module_param(qla2xuseresexchforels, int, 0444);
 301 MODULE_PARM_DESC(qla2xuseresexchforels,
 302                  "Reserve 1/2 of emergency exchanges for ELS.\n"
 303                  " 0 (default): disabled");
 304
 305 static int ql2xprotmask;
 306 module_param(ql2xprotmask, int, 0644);
 307 MODULE_PARM_DESC(ql2xprotmask,
 308                  "Override DIF/DIX protection capabilities mask\n"
 309                  "Default is 0 which sets protection mask based on "
 310                  "capabilities reported by HBA firmware.\n");
 311
 312 static int ql2xprotguard;
 313 module_param(ql2xprotguard, int, 0644);
 314 MODULE_PARM_DESC(ql2xprotguard, "Override choice of DIX checksum\n"
 315                  "  0 -- Let HBA firmware decide\n"
 316                  "  1 -- Force T10 CRC\n"
 317                  "  2 -- Force IP checksum\n");
 318
 319 int ql2xdifbundlinginternalbuffers;
 320 module_param(ql2xdifbundlinginternalbuffers, int, 0644);
 321 MODULE_PARM_DESC(ql2xdifbundlinginternalbuffers,
 322     "Force using internal buffers for DIF information\n"
 323     "0 (Default). Based on check.\n"
 324     "1 Force using internal buffers\n");
 325
 326 int ql2xsmartsan;
 327 module_param(ql2xsmartsan, int, 0444);
 328 module_param_named(smartsan, ql2xsmartsan, int, 0444);
 329 MODULE_PARM_DESC(ql2xsmartsan,
 330                 "Send SmartSAN Management Attributes for FDMI Registration."
 331                 " Default is 0 - No SmartSAN registration,"
 332                 " 1 - Register SmartSAN Management Attributes.");
 333
 334 int ql2xrdpenable;
 335 module_param(ql2xrdpenable, int, 0444);
 336 module_param_named(rdpenable, ql2xrdpenable, int, 0444);
 337 MODULE_PARM_DESC(ql2xrdpenable,
 338                 "Enables RDP responses. "
 339                 "0 - no RDP responses (default). "
 340                 "1 - provide RDP responses.");
 341 int ql2xabts_wait_nvme = 1;
 342 module_param(ql2xabts_wait_nvme, int, 0444);
 343 MODULE_PARM_DESC(ql2xabts_wait_nvme,
 344                  "To wait for ABTS response on I/O timeouts for NVMe. (default: 1)");
 345
 346
 347 static u32 ql2xdelay_before_pci_error_handling = 5;
 348 module_param(ql2xdelay_before_pci_error_handling, uint, 0644);
 349 MODULE_PARM_DESC(ql2xdelay_before_pci_error_handling,
 350         "Number of seconds delayed before qla begin PCI error self-handling (default: 5).\n");
 351
 352 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 353 static void qla2x00_free_device(scsi_qla_host_t *);
 354 static void qla2xxx_map_queues(struct Scsi_Host *shost);
 355 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 356
 357 u32 ql2xnvme_queues = DEF_NVME_HW_QUEUES;
 358 module_param(ql2xnvme_queues, uint, S_IRUGO);
 359 MODULE_PARM_DESC(ql2xnvme_queues,
 360         "Number of NVMe Queues that can be configured.\n"
 361         "Final value will be min(ql2xnvme_queues, num_cpus,num_chip_queues)\n"
 362         "1 - Minimum number of queues supported\n"
 363         "8 - Default value");
 364
 365 int ql2xfc2target = 1;
 366 module_param(ql2xfc2target, int, 0444);
 367 MODULE_PARM_DESC(qla2xfc2target,
 368                   "Enables FC2 Target support. "
 369                   "0 - FC2 Target support is disabled. "
 370                   "1 - FC2 Target support is enabled (default).");
 371
 372 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 373 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 374
 375 /* TODO Convert to inlines
 376  *
 377  * Timer routines
 378  */
 379
 380 __inline__ void
 381 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
 382 {
 383         timer_setup(&vha->timer, qla2x00_timer, 0);
 384         vha->timer.expires = jiffies + interval * HZ;
 385         add_timer(&vha->timer);
 386         vha->timer_active = 1;
 387 }
 388
 389 static inline void
 390 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 391 {
 392         /* Currently used for 82XX only. */
 393         if (vha->device_flags & DFLG_DEV_FAILED) {
 394                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 395                     "Device in a failed state, returning.\n");
 396                 return;
 397         }
 398
 399         mod_timer(&vha->timer, jiffies + interval * HZ);
 400 }
 401
 402 static __inline__ void
 403 qla2x00_stop_timer(scsi_qla_host_t *vha)
 404 {
 405         del_timer_sync(&vha->timer);
 406         vha->timer_active = 0;
 407 }
 408
 409 static int qla2x00_do_dpc(void *data);
 410
 411 static void qla2x00_rst_aen(scsi_qla_host_t *);
 412
 413 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 414         struct req_que **, struct rsp_que **);
 415 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 416 static void qla2x00_mem_free(struct qla_hw_data *);
 417 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 418         struct qla_qpair *qpair);
 419
 420 /* -------------------------------------------------------------------------- */
 421 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 422     struct rsp_que *rsp)
 423 {
 424         struct qla_hw_data *ha = vha->hw;
 425
 426         rsp->qpair = ha->base_qpair;
 427         rsp->req = req;
 428         ha->base_qpair->hw = ha;
 429         ha->base_qpair->req = req;
 430         ha->base_qpair->rsp = rsp;
 431         ha->base_qpair->vha = vha;
 432         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 433         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 434         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 435         ha->base_qpair->srb_mempool = ha->srb_mempool;
 436         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 437         INIT_LIST_HEAD(&ha->base_qpair->dsd_list);
 438         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 439         /* init qpair to this cpu. Will adjust at run time. */
 440         qla_cpu_update(rsp->qpair, raw_smp_processor_id());
 441         ha->base_qpair->pdev = ha->pdev;
 442
 443         if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
 444                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 445 }
 446
 447 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 448                                 struct rsp_que *rsp)
 449 {
 450         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 451
 452         ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
 453                                 GFP_KERNEL);
 454         if (!ha->req_q_map) {
 455                 ql_log(ql_log_fatal, vha, 0x003b,
 456                     "Unable to allocate memory for request queue ptrs.\n");
 457                 goto fail_req_map;
 458         }
 459
 460         ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
 461                                 GFP_KERNEL);
 462         if (!ha->rsp_q_map) {
 463                 ql_log(ql_log_fatal, vha, 0x003c,
 464                     "Unable to allocate memory for response queue ptrs.\n");
 465                 goto fail_rsp_map;
 466         }
 467
 468         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 469         if (ha->base_qpair == NULL) {
 470                 ql_log(ql_log_warn, vha, 0x00e0,
 471                     "Failed to allocate base queue pair memory.\n");
 472                 goto fail_base_qpair;
 473         }
 474
 475         qla_init_base_qpair(vha, req, rsp);
 476
 477         if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
 478                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 479                         GFP_KERNEL);
 480                 if (!ha->queue_pair_map) {
 481                         ql_log(ql_log_fatal, vha, 0x0180,
 482                             "Unable to allocate memory for queue pair ptrs.\n");
 483                         goto fail_qpair_map;
 484                 }
 485                 if (qla_mapq_alloc_qp_cpu_map(ha) != 0) {
 486                         kfree(ha->queue_pair_map);
 487                         ha->queue_pair_map = NULL;
 488                         goto fail_qpair_map;
 489                 }
 490         }
 491
 492         /*
 493          * Make sure we record at least the request and response queue zero in
 494          * case we need to free them if part of the probe fails.
 495          */
 496         ha->rsp_q_map[0] = rsp;
 497         ha->req_q_map[0] = req;
 498         set_bit(0, ha->rsp_qid_map);
 499         set_bit(0, ha->req_qid_map);
 500         return 0;
 501
 502 fail_qpair_map:
 503         kfree(ha->base_qpair);
 504         ha->base_qpair = NULL;
 505 fail_base_qpair:
 506         kfree(ha->rsp_q_map);
 507         ha->rsp_q_map = NULL;
 508 fail_rsp_map:
 509         kfree(ha->req_q_map);
 510         ha->req_q_map = NULL;
 511 fail_req_map:
 512         return -ENOMEM;
 513 }
 514
 515 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 516 {
 517         if (IS_QLAFX00(ha)) {
 518                 if (req && req->ring_fx00)
 519                         dma_free_coherent(&ha->pdev->dev,
 520                             (req->length_fx00 + 1) * sizeof(request_t),
 521                             req->ring_fx00, req->dma_fx00);
 522         } else if (req && req->ring)
 523                 dma_free_coherent(&ha->pdev->dev,
 524                 (req->length + 1) * sizeof(request_t),
 525                 req->ring, req->dma);
 526
 527         if (req)
 528                 kfree(req->outstanding_cmds);
 529
 530         kfree(req);
 531 }
 532
 533 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 534 {
 535         if (IS_QLAFX00(ha)) {
 536                 if (rsp && rsp->ring_fx00)
 537                         dma_free_coherent(&ha->pdev->dev,
 538                             (rsp->length_fx00 + 1) * sizeof(request_t),
 539                             rsp->ring_fx00, rsp->dma_fx00);
 540         } else if (rsp && rsp->ring) {
 541                 dma_free_coherent(&ha->pdev->dev,
 542                 (rsp->length + 1) * sizeof(response_t),
 543                 rsp->ring, rsp->dma);
 544         }
 545         kfree(rsp);
 546 }
 547
 548 static void qla2x00_free_queues(struct qla_hw_data *ha)
 549 {
 550         struct req_que *req;
 551         struct rsp_que *rsp;
 552         int cnt;
 553         unsigned long flags;
 554
 555         if (ha->queue_pair_map) {
 556                 kfree(ha->queue_pair_map);
 557                 ha->queue_pair_map = NULL;
 558         }
 559         if (ha->base_qpair) {
 560                 kfree(ha->base_qpair);
 561                 ha->base_qpair = NULL;
 562         }
 563
 564         qla_mapq_free_qp_cpu_map(ha);
 565         spin_lock_irqsave(&ha->hardware_lock, flags);
 566         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 567                 if (!test_bit(cnt, ha->req_qid_map))
 568                         continue;
 569
 570                 req = ha->req_q_map[cnt];
 571                 clear_bit(cnt, ha->req_qid_map);
 572                 ha->req_q_map[cnt] = NULL;
 573
 574                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 575                 qla2x00_free_req_que(ha, req);
 576                 spin_lock_irqsave(&ha->hardware_lock, flags);
 577         }
 578         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 579
 580         kfree(ha->req_q_map);
 581         ha->req_q_map = NULL;
 582
 583
 584         spin_lock_irqsave(&ha->hardware_lock, flags);
 585         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 586                 if (!test_bit(cnt, ha->rsp_qid_map))
 587                         continue;
 588
 589                 rsp = ha->rsp_q_map[cnt];
 590                 clear_bit(cnt, ha->rsp_qid_map);
 591                 ha->rsp_q_map[cnt] =  NULL;
 592                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 593                 qla2x00_free_rsp_que(ha, rsp);
 594                 spin_lock_irqsave(&ha->hardware_lock, flags);
 595         }
 596         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 597
 598         kfree(ha->rsp_q_map);
 599         ha->rsp_q_map = NULL;
 600 }
 601
 602 static char *
 603 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 604 {
 605         struct qla_hw_data *ha = vha->hw;
 606         static const char *const pci_bus_modes[] = {
 607                 "33", "66", "100", "133",
 608         };
 609         uint16_t pci_bus;
 610
 611         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 612         if (pci_bus) {
 613                 snprintf(str, str_len, "PCI-X (%s MHz)",
 614                          pci_bus_modes[pci_bus]);
 615         } else {
 616                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 617                 snprintf(str, str_len, "PCI (%s MHz)", pci_bus_modes[pci_bus]);
 618         }
 619
 620         return str;
 621 }
 622
 623 static char *
 624 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 625 {
 626         static const char *const pci_bus_modes[] = {
 627                 "33", "66", "100", "133",
 628         };
 629         struct qla_hw_data *ha = vha->hw;
 630         uint32_t pci_bus;
 631
 632         if (pci_is_pcie(ha->pdev)) {
 633                 uint32_t lstat, lspeed, lwidth;
 634                 const char *speed_str;
 635
 636                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 637                 lspeed = FIELD_GET(PCI_EXP_LNKCAP_SLS, lstat);
 638                 lwidth = FIELD_GET(PCI_EXP_LNKCAP_MLW, lstat);
 639
 640                 switch (lspeed) {
 641                 case 1:
 642                         speed_str = "2.5GT/s";
 643                         break;
 644                 case 2:
 645                         speed_str = "5.0GT/s";
 646                         break;
 647                 case 3:
 648                         speed_str = "8.0GT/s";
 649                         break;
 650                 case 4:
 651                         speed_str = "16.0GT/s";
 652                         break;
 653                 default:
 654                         speed_str = "<unknown>";
 655                         break;
 656                 }
 657                 snprintf(str, str_len, "PCIe (%s x%d)", speed_str, lwidth);
 658
 659                 return str;
 660         }
 661
 662         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 663         if (pci_bus == 0 || pci_bus == 8)
 664                 snprintf(str, str_len, "PCI (%s MHz)",
 665                          pci_bus_modes[pci_bus >> 3]);
 666         else
 667                 snprintf(str, str_len, "PCI-X Mode %d (%s MHz)",
 668                          pci_bus & 4 ? 2 : 1,
 669                          pci_bus_modes[pci_bus & 3]);
 670
 671         return str;
 672 }
 673
 674 static char *
 675 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 676 {
 677         char un_str[10];
 678         struct qla_hw_data *ha = vha->hw;
 679
 680         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 681             ha->fw_minor_version, ha->fw_subminor_version);
 682
 683         if (ha->fw_attributes & BIT_9) {
 684                 strcat(str, "FLX");
 685                 return (str);
 686         }
 687
 688         switch (ha->fw_attributes & 0xFF) {
 689         case 0x7:
 690                 strcat(str, "EF");
 691                 break;
 692         case 0x17:
 693                 strcat(str, "TP");
 694                 break;
 695         case 0x37:
 696                 strcat(str, "IP");
 697                 break;
 698         case 0x77:
 699                 strcat(str, "VI");
 700                 break;
 701         default:
 702                 sprintf(un_str, "(%x)", ha->fw_attributes);
 703                 strcat(str, un_str);
 704                 break;
 705         }
 706         if (ha->fw_attributes & 0x100)
 707                 strcat(str, "X");
 708
 709         return (str);
 710 }
 711
 712 static char *
 713 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 714 {
 715         struct qla_hw_data *ha = vha->hw;
 716
 717         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 718             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 719         return str;
 720 }
 721
 722 void qla2x00_sp_free_dma(srb_t *sp)
 723 {
 724         struct qla_hw_data *ha = sp->vha->hw;
 725         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 726
 727         if (sp->flags & SRB_DMA_VALID) {
 728                 scsi_dma_unmap(cmd);
 729                 sp->flags &= ~SRB_DMA_VALID;
 730         }
 731
 732         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 733                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 734                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 735                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 736         }
 737
 738         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 739                 /* List assured to be having elements */
 740                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 741                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 742         }
 743
 744         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 745                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 746
 747                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 748                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 749         }
 750
 751         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 752                 struct ct6_dsd *ctx1 = &sp->u.scmd.ct6_ctx;
 753
 754                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 755                     ctx1->fcp_cmnd_dma);
 756                 list_splice(&ctx1->dsd_list, &sp->qpair->dsd_list);
 757                 sp->qpair->dsd_inuse -= ctx1->dsd_use_cnt;
 758                 sp->qpair->dsd_avail += ctx1->dsd_use_cnt;
 759         }
 760
 761         if (sp->flags & SRB_GOT_BUF)
 762                 qla_put_buf(sp->qpair, &sp->u.scmd.buf_dsc);
 763 }
 764
 765 void qla2x00_sp_compl(srb_t *sp, int res)
 766 {
 767         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 768         struct completion *comp = sp->comp;
 769
 770         /* kref: INIT */
 771         kref_put(&sp->cmd_kref, qla2x00_sp_release);
 772         cmd->result = res;
 773         sp->type = 0;
 774         scsi_done(cmd);
 775         if (comp)
 776                 complete(comp);
 777 }
 778
 779 void qla2xxx_qpair_sp_free_dma(srb_t *sp)
 780 {
 781         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 782         struct qla_hw_data *ha = sp->fcport->vha->hw;
 783
 784         if (sp->flags & SRB_DMA_VALID) {
 785                 scsi_dma_unmap(cmd);
 786                 sp->flags &= ~SRB_DMA_VALID;
 787         }
 788
 789         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 790                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 791                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 792                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 793         }
 794
 795         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 796                 /* List assured to be having elements */
 797                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 798                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 799         }
 800
 801         if (sp->flags & SRB_DIF_BUNDL_DMA_VALID) {
 802                 struct crc_context *difctx = sp->u.scmd.crc_ctx;
 803                 struct dsd_dma *dif_dsd, *nxt_dsd;
 804
 805                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 806                     &difctx->ldif_dma_hndl_list, list) {
 807                         list_del(&dif_dsd->list);
 808                         dma_pool_free(ha->dif_bundl_pool, dif_dsd->dsd_addr,
 809                             dif_dsd->dsd_list_dma);
 810                         kfree(dif_dsd);
 811                         difctx->no_dif_bundl--;
 812                 }
 813
 814                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 815                     &difctx->ldif_dsd_list, list) {
 816                         list_del(&dif_dsd->list);
 817                         dma_pool_free(ha->dl_dma_pool, dif_dsd->dsd_addr,
 818                             dif_dsd->dsd_list_dma);
 819                         kfree(dif_dsd);
 820                         difctx->no_ldif_dsd--;
 821                 }
 822
 823                 if (difctx->no_ldif_dsd) {
 824                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 825                             "%s: difctx->no_ldif_dsd=%x\n",
 826                             __func__, difctx->no_ldif_dsd);
 827                 }
 828
 829                 if (difctx->no_dif_bundl) {
 830                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 831                             "%s: difctx->no_dif_bundl=%x\n",
 832                             __func__, difctx->no_dif_bundl);
 833                 }
 834                 sp->flags &= ~SRB_DIF_BUNDL_DMA_VALID;
 835         }
 836
 837         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 838                 struct ct6_dsd *ctx1 = &sp->u.scmd.ct6_ctx;
 839
 840                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 841                     ctx1->fcp_cmnd_dma);
 842                 list_splice(&ctx1->dsd_list, &sp->qpair->dsd_list);
 843                 sp->qpair->dsd_inuse -= ctx1->dsd_use_cnt;
 844                 sp->qpair->dsd_avail += ctx1->dsd_use_cnt;
 845                 sp->flags &= ~SRB_FCP_CMND_DMA_VALID;
 846         }
 847
 848         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 849                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 850
 851                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 852                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 853         }
 854
 855         if (sp->flags & SRB_GOT_BUF)
 856                 qla_put_buf(sp->qpair, &sp->u.scmd.buf_dsc);
 857 }
 858
 859 void qla2xxx_qpair_sp_compl(srb_t *sp, int res)
 860 {
 861         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 862         struct completion *comp = sp->comp;
 863
 864         /* ref: INIT */
 865         kref_put(&sp->cmd_kref, qla2x00_sp_release);
 866         cmd->result = res;
 867         sp->type = 0;
 868         scsi_done(cmd);
 869         if (comp)
 870                 complete(comp);
 871 }
 872
 873 static int
 874 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 875 {
 876         scsi_qla_host_t *vha = shost_priv(host);
 877         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 878         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 879         struct qla_hw_data *ha = vha->hw;
 880         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 881         srb_t *sp;
 882         int rval;
 883
 884         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags)) ||
 885             WARN_ON_ONCE(!rport)) {
 886                 cmd->result = DID_NO_CONNECT << 16;
 887                 goto qc24_fail_command;
 888         }
 889
 890         if (ha->mqenable) {
 891                 uint32_t tag;
 892                 uint16_t hwq;
 893                 struct qla_qpair *qpair = NULL;
 894
 895                 tag = blk_mq_unique_tag(scsi_cmd_to_rq(cmd));
 896                 hwq = blk_mq_unique_tag_to_hwq(tag);
 897                 qpair = ha->queue_pair_map[hwq];
 898
 899                 if (qpair)
 900                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 901         }
 902
 903         if (ha->flags.eeh_busy) {
 904                 if (ha->flags.pci_channel_io_perm_failure) {
 905                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 906                             "PCI Channel IO permanent failure, exiting "
 907                             "cmd=%p.\n", cmd);
 908                         cmd->result = DID_NO_CONNECT << 16;
 909                 } else {
 910                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 911                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 912                         cmd->result = DID_REQUEUE << 16;
 913                 }
 914                 goto qc24_fail_command;
 915         }
 916
 917         rval = fc_remote_port_chkready(rport);
 918         if (rval) {
 919                 cmd->result = rval;
 920                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 921                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 922                     cmd, rval);
 923                 goto qc24_fail_command;
 924         }
 925
 926         if (!vha->flags.difdix_supported &&
 927                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 928                         ql_dbg(ql_dbg_io, vha, 0x3004,
 929                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 930                             cmd);
 931                         cmd->result = DID_NO_CONNECT << 16;
 932                         goto qc24_fail_command;
 933         }
 934
 935         if (!fcport || fcport->deleted) {
 936                 cmd->result = DID_IMM_RETRY << 16;
 937                 goto qc24_fail_command;
 938         }
 939
 940         if (atomic_read(&fcport->state) != FCS_ONLINE || fcport->deleted) {
 941                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 942                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 943                         ql_dbg(ql_dbg_io, vha, 0x3005,
 944                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 945                             atomic_read(&fcport->state),
 946                             atomic_read(&base_vha->loop_state));
 947                         cmd->result = DID_NO_CONNECT << 16;
 948                         goto qc24_fail_command;
 949                 }
 950                 goto qc24_target_busy;
 951         }
 952
 953         /*
 954          * Return target busy if we've received a non-zero retry_delay_timer
 955          * in a FCP_RSP.
 956          */
 957         if (fcport->retry_delay_timestamp == 0) {
 958                 /* retry delay not set */
 959         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 960                 fcport->retry_delay_timestamp = 0;
 961         else
 962                 goto qc24_target_busy;
 963
 964         sp = scsi_cmd_priv(cmd);
 965         /* ref: INIT */
 966         qla2xxx_init_sp(sp, vha, vha->hw->base_qpair, fcport);
 967
 968         sp->u.scmd.cmd = cmd;
 969         sp->type = SRB_SCSI_CMD;
 970         sp->free = qla2x00_sp_free_dma;
 971         sp->done = qla2x00_sp_compl;
 972
 973         rval = ha->isp_ops->start_scsi(sp);
 974         if (rval != QLA_SUCCESS) {
 975                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 976                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 977                 goto qc24_host_busy_free_sp;
 978         }
 979
 980         return 0;
 981
 982 qc24_host_busy_free_sp:
 983         /* ref: INIT */
 984         kref_put(&sp->cmd_kref, qla2x00_sp_release);
 985
 986 qc24_target_busy:
 987         return SCSI_MLQUEUE_TARGET_BUSY;
 988
 989 qc24_fail_command:
 990         scsi_done(cmd);
 991
 992         return 0;
 993 }
 994
 995 /* For MQ supported I/O */
 996 int
 997 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 998     struct qla_qpair *qpair)
 999 {
1000         scsi_qla_host_t *vha = shost_priv(host);
1001         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1002         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
1003         struct qla_hw_data *ha = vha->hw;
1004         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
1005         srb_t *sp;
1006         int rval;
1007
1008         rval = rport ? fc_remote_port_chkready(rport) : (DID_NO_CONNECT << 16);
1009         if (rval) {
1010                 cmd->result = rval;
1011                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
1012                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
1013                     cmd, rval);
1014                 goto qc24_fail_command;
1015         }
1016
1017         if (!qpair->online) {
1018                 ql_dbg(ql_dbg_io, vha, 0x3077,
1019                        "qpair not online. eeh_busy=%d.\n", ha->flags.eeh_busy);
1020                 cmd->result = DID_NO_CONNECT << 16;
1021                 goto qc24_fail_command;
1022         }
1023
1024         if (!fcport || fcport->deleted) {
1025                 cmd->result = DID_IMM_RETRY << 16;
1026                 goto qc24_fail_command;
1027         }
1028
1029         if (atomic_read(&fcport->state) != FCS_ONLINE || fcport->deleted) {
1030                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
1031                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
1032                         ql_dbg(ql_dbg_io, vha, 0x3077,
1033                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
1034                             atomic_read(&fcport->state),
1035                             atomic_read(&base_vha->loop_state));
1036                         cmd->result = DID_NO_CONNECT << 16;
1037                         goto qc24_fail_command;
1038                 }
1039                 goto qc24_target_busy;
1040         }
1041
1042         /*
1043          * Return target busy if we've received a non-zero retry_delay_timer
1044          * in a FCP_RSP.
1045          */
1046         if (fcport->retry_delay_timestamp == 0) {
1047                 /* retry delay not set */
1048         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
1049                 fcport->retry_delay_timestamp = 0;
1050         else
1051                 goto qc24_target_busy;
1052
1053         sp = scsi_cmd_priv(cmd);
1054         /* ref: INIT */
1055         qla2xxx_init_sp(sp, vha, qpair, fcport);
1056
1057         sp->u.scmd.cmd = cmd;
1058         sp->type = SRB_SCSI_CMD;
1059         sp->free = qla2xxx_qpair_sp_free_dma;
1060         sp->done = qla2xxx_qpair_sp_compl;
1061
1062         rval = ha->isp_ops->start_scsi_mq(sp);
1063         if (rval != QLA_SUCCESS) {
1064                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1065                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1066                 goto qc24_host_busy_free_sp;
1067         }
1068
1069         return 0;
1070
1071 qc24_host_busy_free_sp:
1072         /* ref: INIT */
1073         kref_put(&sp->cmd_kref, qla2x00_sp_release);
1074
1075 qc24_target_busy:
1076         return SCSI_MLQUEUE_TARGET_BUSY;
1077
1078 qc24_fail_command:
1079         scsi_done(cmd);
1080
1081         return 0;
1082 }
1083
1084 /*
1085  * qla2x00_wait_for_hba_online
1086  *    Wait till the HBA is online after going through
1087  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1088  *    finally HBA is disabled ie marked offline
1089  *
1090  * Input:
1091  *     ha - pointer to host adapter structure
1092  *
1093  * Note:
1094  *    Does context switching-Release SPIN_LOCK
1095  *    (if any) before calling this routine.
1096  *
1097  * Return:
1098  *    Success (Adapter is online) : 0
1099  *    Failed  (Adapter is offline/disabled) : 1
1100  */
1101 int
1102 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1103 {
1104         int             return_status;
1105         unsigned long   wait_online;
1106         struct qla_hw_data *ha = vha->hw;
1107         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1108
1109         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1110         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1111             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1112             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1113             ha->dpc_active) && time_before(jiffies, wait_online)) {
1114
1115                 msleep(1000);
1116         }
1117         if (base_vha->flags.online)
1118                 return_status = QLA_SUCCESS;
1119         else
1120                 return_status = QLA_FUNCTION_FAILED;
1121
1122         return (return_status);
1123 }
1124
1125 static inline int test_fcport_count(scsi_qla_host_t *vha)
1126 {
1127         struct qla_hw_data *ha = vha->hw;
1128         unsigned long flags;
1129         int res;
1130         /* Return 0 = sleep, x=wake */
1131
1132         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1133         ql_dbg(ql_dbg_init, vha, 0x00ec,
1134             "tgt %p, fcport_count=%d\n",
1135             vha, vha->fcport_count);
1136         res = (vha->fcport_count == 0);
1137         if  (res) {
1138                 struct fc_port *fcport;
1139
1140                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1141                         if (fcport->deleted != QLA_SESS_DELETED) {
1142                                 /* session(s) may not be fully logged in
1143                                  * (ie fcport_count=0), but session
1144                                  * deletion thread(s) may be inflight.
1145                                  */
1146
1147                                 res = 0;
1148                                 break;
1149                         }
1150                 }
1151         }
1152         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1153
1154         return res;
1155 }
1156
1157 /*
1158  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1159  * it has dependency on UNLOADING flag to stop device discovery
1160  */
1161 void
1162 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1163 {
1164         u8 i;
1165
1166         qla2x00_mark_all_devices_lost(vha);
1167
1168         for (i = 0; i < 10; i++) {
1169                 if (wait_event_timeout(vha->fcport_waitQ,
1170                     test_fcport_count(vha), HZ) > 0)
1171                         break;
1172         }
1173
1174         flush_workqueue(vha->hw->wq);
1175 }
1176
1177 /*
1178  * qla2x00_wait_for_hba_ready
1179  * Wait till the HBA is ready before doing driver unload
1180  *
1181  * Input:
1182  *     ha - pointer to host adapter structure
1183  *
1184  * Note:
1185  *    Does context switching-Release SPIN_LOCK
1186  *    (if any) before calling this routine.
1187  *
1188  */
1189 static void
1190 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1191 {
1192         struct qla_hw_data *ha = vha->hw;
1193         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1194
1195         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1196                 ha->flags.mbox_busy) ||
1197                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1198                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1199                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1200                         break;
1201                 msleep(1000);
1202         }
1203 }
1204
1205 int
1206 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1207 {
1208         int             return_status;
1209         unsigned long   wait_reset;
1210         struct qla_hw_data *ha = vha->hw;
1211         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1212
1213         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1214         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1215             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1216             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1217             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1218
1219                 msleep(1000);
1220
1221                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1222                     ha->flags.chip_reset_done)
1223                         break;
1224         }
1225         if (ha->flags.chip_reset_done)
1226                 return_status = QLA_SUCCESS;
1227         else
1228                 return_status = QLA_FUNCTION_FAILED;
1229
1230         return return_status;
1231 }
1232
1233 /**************************************************************************
1234 * qla2xxx_eh_abort
1235 *
1236 * Description:
1237 *    The abort function will abort the specified command.
1238 *
1239 * Input:
1240 *    cmd = Linux SCSI command packet to be aborted.
1241 *
1242 * Returns:
1243 *    Either SUCCESS or FAILED.
1244 *
1245 * Note:
1246 *    Only return FAILED if command not returned by firmware.
1247 **************************************************************************/
1248 static int
1249 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1250 {
1251         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1252         DECLARE_COMPLETION_ONSTACK(comp);
1253         srb_t *sp;
1254         int ret;
1255         unsigned int id;
1256         uint64_t lun;
1257         int rval;
1258         struct qla_hw_data *ha = vha->hw;
1259         uint32_t ratov_j;
1260         struct qla_qpair *qpair;
1261         unsigned long flags;
1262         int fast_fail_status = SUCCESS;
1263
1264         if (qla2x00_isp_reg_stat(ha)) {
1265                 ql_log(ql_log_info, vha, 0x8042,
1266                     "PCI/Register disconnect, exiting.\n");
1267                 qla_pci_set_eeh_busy(vha);
1268                 return FAILED;
1269         }
1270
1271         /* Save any FAST_IO_FAIL value to return later if abort succeeds */
1272         ret = fc_block_scsi_eh(cmd);
1273         if (ret != 0)
1274                 fast_fail_status = ret;
1275
1276         sp = scsi_cmd_priv(cmd);
1277         qpair = sp->qpair;
1278
1279         vha->cmd_timeout_cnt++;
1280
1281         if ((sp->fcport && sp->fcport->deleted) || !qpair)
1282                 return fast_fail_status != SUCCESS ? fast_fail_status : FAILED;
1283
1284         spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1285         sp->comp = &comp;
1286         spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1287
1288
1289         id = cmd->device->id;
1290         lun = cmd->device->lun;
1291
1292         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1293             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1294             vha->host_no, id, lun, sp, cmd, sp->handle);
1295
1296         /*
1297          * Abort will release the original Command/sp from FW. Let the
1298          * original command call scsi_done. In return, he will wakeup
1299          * this sleeping thread.
1300          */
1301         rval = ha->isp_ops->abort_command(sp);
1302
1303         ql_dbg(ql_dbg_taskm, vha, 0x8003,
1304                "Abort command mbx cmd=%p, rval=%x.\n", cmd, rval);
1305
1306         /* Wait for the command completion. */
1307         ratov_j = ha->r_a_tov/10 * 4 * 1000;
1308         ratov_j = msecs_to_jiffies(ratov_j);
1309         switch (rval) {
1310         case QLA_SUCCESS:
1311                 if (!wait_for_completion_timeout(&comp, ratov_j)) {
1312                         ql_dbg(ql_dbg_taskm, vha, 0xffff,
1313                             "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1314                             __func__, ha->r_a_tov/10);
1315                         ret = FAILED;
1316                 } else {
1317                         ret = fast_fail_status;
1318                 }
1319                 break;
1320         default:
1321                 ret = FAILED;
1322                 break;
1323         }
1324
1325         sp->comp = NULL;
1326
1327         ql_log(ql_log_info, vha, 0x801c,
1328             "Abort command issued nexus=%ld:%d:%llu -- %x.\n",
1329             vha->host_no, id, lun, ret);
1330
1331         return ret;
1332 }
1333
1334 #define ABORT_POLLING_PERIOD    1000
1335 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1336
1337 /*
1338  * Returns: QLA_SUCCESS or QLA_FUNCTION_FAILED.
1339  */
1340 static int
1341 __qla2x00_eh_wait_for_pending_commands(struct qla_qpair *qpair, unsigned int t,
1342                                        uint64_t l, enum nexus_wait_type type)
1343 {
1344         int cnt, match, status;
1345         unsigned long flags;
1346         scsi_qla_host_t *vha = qpair->vha;
1347         struct req_que *req = qpair->req;
1348         srb_t *sp;
1349         struct scsi_cmnd *cmd;
1350         unsigned long wait_iter = ABORT_WAIT_ITER;
1351         bool found;
1352         struct qla_hw_data *ha = vha->hw;
1353
1354         status = QLA_SUCCESS;
1355
1356         while (wait_iter--) {
1357                 found = false;
1358
1359                 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1360                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1361                         sp = req->outstanding_cmds[cnt];
1362                         if (!sp)
1363                                 continue;
1364                         if (sp->type != SRB_SCSI_CMD)
1365                                 continue;
1366                         if (vha->vp_idx != sp->vha->vp_idx)
1367                                 continue;
1368                         match = 0;
1369                         cmd = GET_CMD_SP(sp);
1370                         switch (type) {
1371                         case WAIT_HOST:
1372                                 match = 1;
1373                                 break;
1374                         case WAIT_TARGET:
1375                                 if (sp->fcport)
1376                                         match = sp->fcport->d_id.b24 == t;
1377                                 else
1378                                         match = 0;
1379                                 break;
1380                         case WAIT_LUN:
1381                                 if (sp->fcport)
1382                                         match = (sp->fcport->d_id.b24 == t &&
1383                                                 cmd->device->lun == l);
1384                                 else
1385                                         match = 0;
1386                                 break;
1387                         }
1388                         if (!match)
1389                                 continue;
1390
1391                         spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1392
1393                         if (unlikely(pci_channel_offline(ha->pdev)) ||
1394                             ha->flags.eeh_busy) {
1395                                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1396                                     "Return:eh_wait.\n");
1397                                 return status;
1398                         }
1399
1400                         /*
1401                          * SRB_SCSI_CMD is still in the outstanding_cmds array.
1402                          * it means scsi_done has not called. Wait for it to
1403                          * clear from outstanding_cmds.
1404                          */
1405                         msleep(ABORT_POLLING_PERIOD);
1406                         spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1407                         found = true;
1408                 }
1409                 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1410
1411                 if (!found)
1412                         break;
1413         }
1414
1415         if (wait_iter == -1)
1416                 status = QLA_FUNCTION_FAILED;
1417
1418         return status;
1419 }
1420
1421 int
1422 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1423                                      uint64_t l, enum nexus_wait_type type)
1424 {
1425         struct qla_qpair *qpair;
1426         struct qla_hw_data *ha = vha->hw;
1427         int i, status = QLA_SUCCESS;
1428
1429         status = __qla2x00_eh_wait_for_pending_commands(ha->base_qpair, t, l,
1430                                                         type);
1431         for (i = 0; status == QLA_SUCCESS && i < ha->max_qpairs; i++) {
1432                 qpair = ha->queue_pair_map[i];
1433                 if (!qpair)
1434                         continue;
1435                 status = __qla2x00_eh_wait_for_pending_commands(qpair, t, l,
1436                                                                 type);
1437         }
1438         return status;
1439 }
1440
1441 static char *reset_errors[] = {
1442         "HBA not online",
1443         "HBA not ready",
1444         "Task management failed",
1445         "Waiting for command completions",
1446 };
1447
1448 static int
1449 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1450 {
1451         struct scsi_device *sdev = cmd->device;
1452         scsi_qla_host_t *vha = shost_priv(sdev->host);
1453         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1454         fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1455         struct qla_hw_data *ha = vha->hw;
1456         int err;
1457
1458         if (qla2x00_isp_reg_stat(ha)) {
1459                 ql_log(ql_log_info, vha, 0x803e,
1460                     "PCI/Register disconnect, exiting.\n");
1461                 qla_pci_set_eeh_busy(vha);
1462                 return FAILED;
1463         }
1464
1465         if (!fcport) {
1466                 return FAILED;
1467         }
1468
1469         err = fc_block_rport(rport);
1470         if (err != 0)
1471                 return err;
1472
1473         if (fcport->deleted)
1474                 return FAILED;
1475
1476         ql_log(ql_log_info, vha, 0x8009,
1477             "DEVICE RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", vha->host_no,
1478             sdev->id, sdev->lun, cmd);
1479
1480         err = 0;
1481         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1482                 ql_log(ql_log_warn, vha, 0x800a,
1483                     "Wait for hba online failed for cmd=%p.\n", cmd);
1484                 goto eh_reset_failed;
1485         }
1486         err = 2;
1487         if (ha->isp_ops->lun_reset(fcport, sdev->lun, 1)
1488                 != QLA_SUCCESS) {
1489                 ql_log(ql_log_warn, vha, 0x800c,
1490                     "do_reset failed for cmd=%p.\n", cmd);
1491                 goto eh_reset_failed;
1492         }
1493         err = 3;
1494         if (qla2x00_eh_wait_for_pending_commands(vha, fcport->d_id.b24,
1495                                                  cmd->device->lun,
1496                                                  WAIT_LUN) != QLA_SUCCESS) {
1497                 ql_log(ql_log_warn, vha, 0x800d,
1498                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1499                 goto eh_reset_failed;
1500         }
1501
1502         ql_log(ql_log_info, vha, 0x800e,
1503             "DEVICE RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n",
1504             vha->host_no, sdev->id, sdev->lun, cmd);
1505
1506         return SUCCESS;
1507
1508 eh_reset_failed:
1509         ql_log(ql_log_info, vha, 0x800f,
1510             "DEVICE RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n",
1511             reset_errors[err], vha->host_no, sdev->id, sdev->lun,
1512             cmd);
1513         vha->reset_cmd_err_cnt++;
1514         return FAILED;
1515 }
1516
1517 static int
1518 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1519 {
1520         struct scsi_device *sdev = cmd->device;
1521         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1522         scsi_qla_host_t *vha = shost_priv(rport_to_shost(rport));
1523         struct qla_hw_data *ha = vha->hw;
1524         fc_port_t *fcport = *(fc_port_t **)rport->dd_data;
1525         int err;
1526
1527         if (qla2x00_isp_reg_stat(ha)) {
1528                 ql_log(ql_log_info, vha, 0x803f,
1529                     "PCI/Register disconnect, exiting.\n");
1530                 qla_pci_set_eeh_busy(vha);
1531                 return FAILED;
1532         }
1533
1534         if (!fcport) {
1535                 return FAILED;
1536         }
1537
1538         err = fc_block_rport(rport);
1539         if (err != 0)
1540                 return err;
1541
1542         if (fcport->deleted)
1543                 return FAILED;
1544
1545         ql_log(ql_log_info, vha, 0x8009,
1546             "TARGET RESET ISSUED nexus=%ld:%d cmd=%p.\n", vha->host_no,
1547             sdev->id, cmd);
1548
1549         err = 0;
1550         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1551                 ql_log(ql_log_warn, vha, 0x800a,
1552                     "Wait for hba online failed for cmd=%p.\n", cmd);
1553                 goto eh_reset_failed;
1554         }
1555         err = 2;
1556         if (ha->isp_ops->target_reset(fcport, 0, 0) != QLA_SUCCESS) {
1557                 ql_log(ql_log_warn, vha, 0x800c,
1558                     "target_reset failed for cmd=%p.\n", cmd);
1559                 goto eh_reset_failed;
1560         }
1561         err = 3;
1562         if (qla2x00_eh_wait_for_pending_commands(vha, fcport->d_id.b24, 0,
1563                                                  WAIT_TARGET) != QLA_SUCCESS) {
1564                 ql_log(ql_log_warn, vha, 0x800d,
1565                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1566                 goto eh_reset_failed;
1567         }
1568
1569         ql_log(ql_log_info, vha, 0x800e,
1570             "TARGET RESET SUCCEEDED nexus:%ld:%d cmd=%p.\n",
1571             vha->host_no, sdev->id, cmd);
1572
1573         return SUCCESS;
1574
1575 eh_reset_failed:
1576         ql_log(ql_log_info, vha, 0x800f,
1577             "TARGET RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n",
1578             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1579             cmd);
1580         vha->reset_cmd_err_cnt++;
1581         return FAILED;
1582 }
1583
1584 /**************************************************************************
1585 * qla2xxx_eh_bus_reset
1586 *
1587 * Description:
1588 *    The bus reset function will reset the bus and abort any executing
1589 *    commands.
1590 *
1591 * Input:
1592 *    cmd = Linux SCSI command packet of the command that cause the
1593 *          bus reset.
1594 *
1595 * Returns:
1596 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1597 *
1598 **************************************************************************/
1599 static int
1600 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1601 {
1602         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1603         int ret = FAILED;
1604         unsigned int id;
1605         uint64_t lun;
1606         struct qla_hw_data *ha = vha->hw;
1607
1608         if (qla2x00_isp_reg_stat(ha)) {
1609                 ql_log(ql_log_info, vha, 0x8040,
1610                     "PCI/Register disconnect, exiting.\n");
1611                 qla_pci_set_eeh_busy(vha);
1612                 return FAILED;
1613         }
1614
1615         id = cmd->device->id;
1616         lun = cmd->device->lun;
1617
1618         if (qla2x00_chip_is_down(vha))
1619                 return ret;
1620
1621         ql_log(ql_log_info, vha, 0x8012,
1622             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1623
1624         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1625                 ql_log(ql_log_fatal, vha, 0x8013,
1626                     "Wait for hba online failed board disabled.\n");
1627                 goto eh_bus_reset_done;
1628         }
1629
1630         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1631                 ret = SUCCESS;
1632
1633         if (ret == FAILED)
1634                 goto eh_bus_reset_done;
1635
1636         /* Flush outstanding commands. */
1637         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1638             QLA_SUCCESS) {
1639                 ql_log(ql_log_warn, vha, 0x8014,
1640                     "Wait for pending commands failed.\n");
1641                 ret = FAILED;
1642         }
1643
1644 eh_bus_reset_done:
1645         ql_log(ql_log_warn, vha, 0x802b,
1646             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1647             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1648
1649         return ret;
1650 }
1651
1652 /**************************************************************************
1653 * qla2xxx_eh_host_reset
1654 *
1655 * Description:
1656 *    The reset function will reset the Adapter.
1657 *
1658 * Input:
1659 *      cmd = Linux SCSI command packet of the command that cause the
1660 *            adapter reset.
1661 *
1662 * Returns:
1663 *      Either SUCCESS or FAILED.
1664 *
1665 * Note:
1666 **************************************************************************/
1667 static int
1668 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1669 {
1670         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1671         struct qla_hw_data *ha = vha->hw;
1672         int ret = FAILED;
1673         unsigned int id;
1674         uint64_t lun;
1675         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1676
1677         if (qla2x00_isp_reg_stat(ha)) {
1678                 ql_log(ql_log_info, vha, 0x8041,
1679                     "PCI/Register disconnect, exiting.\n");
1680                 qla_pci_set_eeh_busy(vha);
1681                 return SUCCESS;
1682         }
1683
1684         id = cmd->device->id;
1685         lun = cmd->device->lun;
1686
1687         ql_log(ql_log_info, vha, 0x8018,
1688             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1689
1690         /*
1691          * No point in issuing another reset if one is active.  Also do not
1692          * attempt a reset if we are updating flash.
1693          */
1694         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1695                 goto eh_host_reset_lock;
1696
1697         if (vha != base_vha) {
1698                 if (qla2x00_vp_abort_isp(vha))
1699                         goto eh_host_reset_lock;
1700         } else {
1701                 if (IS_P3P_TYPE(vha->hw)) {
1702                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1703                                 /* Ctx reset success */
1704                                 ret = SUCCESS;
1705                                 goto eh_host_reset_lock;
1706                         }
1707                         /* fall thru if ctx reset failed */
1708                 }
1709                 if (ha->wq)
1710                         flush_workqueue(ha->wq);
1711
1712                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1713                 if (ha->isp_ops->abort_isp(base_vha)) {
1714                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1715                         /* failed. schedule dpc to try */
1716                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1717
1718                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1719                                 ql_log(ql_log_warn, vha, 0x802a,
1720                                     "wait for hba online failed.\n");
1721                                 goto eh_host_reset_lock;
1722                         }
1723                 }
1724                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1725         }
1726
1727         /* Waiting for command to be returned to OS.*/
1728         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1729                 QLA_SUCCESS)
1730                 ret = SUCCESS;
1731
1732 eh_host_reset_lock:
1733         ql_log(ql_log_info, vha, 0x8017,
1734             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1735             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1736
1737         return ret;
1738 }
1739
1740 /*
1741 * qla2x00_loop_reset
1742 *      Issue loop reset.
1743 *
1744 * Input:
1745 *      ha = adapter block pointer.
1746 *
1747 * Returns:
1748 *      0 = success
1749 */
1750 int
1751 qla2x00_loop_reset(scsi_qla_host_t *vha)
1752 {
1753         int ret;
1754         struct qla_hw_data *ha = vha->hw;
1755
1756         if (IS_QLAFX00(ha))
1757                 return QLA_SUCCESS;
1758
1759         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1760                 atomic_set(&vha->loop_state, LOOP_DOWN);
1761                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1762                 qla2x00_mark_all_devices_lost(vha);
1763                 ret = qla2x00_full_login_lip(vha);
1764                 if (ret != QLA_SUCCESS) {
1765                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1766                             "full_login_lip=%d.\n", ret);
1767                 }
1768         }
1769
1770         if (ha->flags.enable_lip_reset) {
1771                 ret = qla2x00_lip_reset(vha);
1772                 if (ret != QLA_SUCCESS)
1773                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1774                             "lip_reset failed (%d).\n", ret);
1775         }
1776
1777         /* Issue marker command only when we are going to start the I/O */
1778         vha->marker_needed = 1;
1779
1780         return QLA_SUCCESS;
1781 }
1782
1783 /*
1784  * The caller must ensure that no completion interrupts will happen
1785  * while this function is in progress.
1786  */
1787 static void qla2x00_abort_srb(struct qla_qpair *qp, srb_t *sp, const int res,
1788                               unsigned long *flags)
1789         __releases(qp->qp_lock_ptr)
1790         __acquires(qp->qp_lock_ptr)
1791 {
1792         DECLARE_COMPLETION_ONSTACK(comp);
1793         scsi_qla_host_t *vha = qp->vha;
1794         struct qla_hw_data *ha = vha->hw;
1795         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
1796         int rval;
1797         bool ret_cmd;
1798         uint32_t ratov_j;
1799
1800         lockdep_assert_held(qp->qp_lock_ptr);
1801
1802         if (qla2x00_chip_is_down(vha)) {
1803                 sp->done(sp, res);
1804                 return;
1805         }
1806
1807         if (sp->type == SRB_NVME_CMD || sp->type == SRB_NVME_LS ||
1808             (sp->type == SRB_SCSI_CMD && !ha->flags.eeh_busy &&
1809              !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
1810              !qla2x00_isp_reg_stat(ha))) {
1811                 if (sp->comp) {
1812                         sp->done(sp, res);
1813                         return;
1814                 }
1815
1816                 sp->comp = &comp;
1817                 spin_unlock_irqrestore(qp->qp_lock_ptr, *flags);
1818
1819                 rval = ha->isp_ops->abort_command(sp);
1820                 /* Wait for command completion. */
1821                 ret_cmd = false;
1822                 ratov_j = ha->r_a_tov/10 * 4 * 1000;
1823                 ratov_j = msecs_to_jiffies(ratov_j);
1824                 switch (rval) {
1825                 case QLA_SUCCESS:
1826                         if (wait_for_completion_timeout(&comp, ratov_j)) {
1827                                 ql_dbg(ql_dbg_taskm, vha, 0xffff,
1828                                     "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1829                                     __func__, ha->r_a_tov/10);
1830                                 ret_cmd = true;
1831                         }
1832                         /* else FW return SP to driver */
1833                         break;
1834                 default:
1835                         ret_cmd = true;
1836                         break;
1837                 }
1838
1839                 spin_lock_irqsave(qp->qp_lock_ptr, *flags);
1840                 switch (sp->type) {
1841                 case SRB_SCSI_CMD:
1842                         if (ret_cmd && blk_mq_request_started(scsi_cmd_to_rq(cmd)))
1843                                 sp->done(sp, res);
1844                         break;
1845                 default:
1846                         if (ret_cmd)
1847                                 sp->done(sp, res);
1848                         break;
1849                 }
1850         } else {
1851                 sp->done(sp, res);
1852         }
1853 }
1854
1855 /*
1856  * The caller must ensure that no completion interrupts will happen
1857  * while this function is in progress.
1858  */
1859 static void
1860 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1861 {
1862         int cnt;
1863         unsigned long flags;
1864         srb_t *sp;
1865         scsi_qla_host_t *vha = qp->vha;
1866         struct qla_hw_data *ha = vha->hw;
1867         struct req_que *req;
1868         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1869         struct qla_tgt_cmd *cmd;
1870
1871         if (!ha->req_q_map)
1872                 return;
1873         spin_lock_irqsave(qp->qp_lock_ptr, flags);
1874         req = qp->req;
1875         for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1876                 sp = req->outstanding_cmds[cnt];
1877                 if (sp) {
1878                         /*
1879                          * perform lockless completion during driver unload
1880                          */
1881                         if (qla2x00_chip_is_down(vha)) {
1882                                 req->outstanding_cmds[cnt] = NULL;
1883                                 spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1884                                 sp->done(sp, res);
1885                                 spin_lock_irqsave(qp->qp_lock_ptr, flags);
1886                                 continue;
1887                         }
1888
1889                         switch (sp->cmd_type) {
1890                         case TYPE_SRB:
1891                                 qla2x00_abort_srb(qp, sp, res, &flags);
1892                                 break;
1893                         case TYPE_TGT_CMD:
1894                                 if (!vha->hw->tgt.tgt_ops || !tgt ||
1895                                     qla_ini_mode_enabled(vha)) {
1896                                         ql_dbg(ql_dbg_tgt_mgt, vha, 0xf003,
1897                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1898                                             vha->dpc_flags);
1899                                         continue;
1900                                 }
1901                                 cmd = (struct qla_tgt_cmd *)sp;
1902                                 cmd->aborted = 1;
1903                                 break;
1904                         case TYPE_TGT_TMCMD:
1905                                 /* Skip task management functions. */
1906                                 break;
1907                         default:
1908                                 break;
1909                         }
1910                         req->outstanding_cmds[cnt] = NULL;
1911                 }
1912         }
1913         spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1914 }
1915
1916 /*
1917  * The caller must ensure that no completion interrupts will happen
1918  * while this function is in progress.
1919  */
1920 void
1921 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1922 {
1923         int que;
1924         struct qla_hw_data *ha = vha->hw;
1925
1926         /* Continue only if initialization complete. */
1927         if (!ha->base_qpair)
1928                 return;
1929         __qla2x00_abort_all_cmds(ha->base_qpair, res);
1930
1931         if (!ha->queue_pair_map)
1932                 return;
1933         for (que = 0; que < ha->max_qpairs; que++) {
1934                 if (!ha->queue_pair_map[que])
1935                         continue;
1936
1937                 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1938         }
1939 }
1940
1941 static int
1942 qla2xxx_slave_alloc(struct scsi_device *sdev)
1943 {
1944         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1945
1946         if (!rport || fc_remote_port_chkready(rport))
1947                 return -ENXIO;
1948
1949         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1950
1951         return 0;
1952 }
1953
1954 static int
1955 qla2xxx_slave_configure(struct scsi_device *sdev)
1956 {
1957         scsi_qla_host_t *vha = shost_priv(sdev->host);
1958         struct req_que *req = vha->req;
1959
1960         if (IS_T10_PI_CAPABLE(vha->hw))
1961                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1962
1963         scsi_change_queue_depth(sdev, req->max_q_depth);
1964         return 0;
1965 }
1966
1967 static void
1968 qla2xxx_slave_destroy(struct scsi_device *sdev)
1969 {
1970         sdev->hostdata = NULL;
1971 }
1972
1973 /**
1974  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1975  * @ha: HA context
1976  *
1977  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1978  * supported addressing method.
1979  */
1980 static void
1981 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1982 {
1983         /* Assume a 32bit DMA mask. */
1984         ha->flags.enable_64bit_addressing = 0;
1985
1986         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1987                 /* Any upper-dword bits set? */
1988                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1989                     !dma_set_coherent_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1990                         /* Ok, a 64bit DMA mask is applicable. */
1991                         ha->flags.enable_64bit_addressing = 1;
1992                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1993                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1994                         return;
1995                 }
1996         }
1997
1998         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1999         dma_set_coherent_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
2000 }
2001
2002 static void
2003 qla2x00_enable_intrs(struct qla_hw_data *ha)
2004 {
2005         unsigned long flags = 0;
2006         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2007
2008         spin_lock_irqsave(&ha->hardware_lock, flags);
2009         ha->interrupts_on = 1;
2010         /* enable risc and host interrupts */
2011         wrt_reg_word(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
2012         rd_reg_word(&reg->ictrl);
2013         spin_unlock_irqrestore(&ha->hardware_lock, flags);
2014
2015 }
2016
2017 static void
2018 qla2x00_disable_intrs(struct qla_hw_data *ha)
2019 {
2020         unsigned long flags = 0;
2021         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2022
2023         spin_lock_irqsave(&ha->hardware_lock, flags);
2024         ha->interrupts_on = 0;
2025         /* disable risc and host interrupts */
2026         wrt_reg_word(&reg->ictrl, 0);
2027         rd_reg_word(&reg->ictrl);
2028         spin_unlock_irqrestore(&ha->hardware_lock, flags);
2029 }
2030
2031 static void
2032 qla24xx_enable_intrs(struct qla_hw_data *ha)
2033 {
2034         unsigned long flags = 0;
2035         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2036
2037         spin_lock_irqsave(&ha->hardware_lock, flags);
2038         ha->interrupts_on = 1;
2039         wrt_reg_dword(&reg->ictrl, ICRX_EN_RISC_INT);
2040         rd_reg_dword(&reg->ictrl);
2041         spin_unlock_irqrestore(&ha->hardware_lock, flags);
2042 }
2043
2044 static void
2045 qla24xx_disable_intrs(struct qla_hw_data *ha)
2046 {
2047         unsigned long flags = 0;
2048         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2049
2050         if (IS_NOPOLLING_TYPE(ha))
2051                 return;
2052         spin_lock_irqsave(&ha->hardware_lock, flags);
2053         ha->interrupts_on = 0;
2054         wrt_reg_dword(&reg->ictrl, 0);
2055         rd_reg_dword(&reg->ictrl);
2056         spin_unlock_irqrestore(&ha->hardware_lock, flags);
2057 }
2058
2059 static int
2060 qla2x00_iospace_config(struct qla_hw_data *ha)
2061 {
2062         resource_size_t pio;
2063         uint16_t msix;
2064
2065         if (pci_request_selected_regions(ha->pdev, ha->bars,
2066             QLA2XXX_DRIVER_NAME)) {
2067                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
2068                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2069                     pci_name(ha->pdev));
2070                 goto iospace_error_exit;
2071         }
2072         if (!(ha->bars & 1))
2073                 goto skip_pio;
2074
2075         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
2076         pio = pci_resource_start(ha->pdev, 0);
2077         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
2078                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2079                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
2080                             "Invalid pci I/O region size (%s).\n",
2081                             pci_name(ha->pdev));
2082                         pio = 0;
2083                 }
2084         } else {
2085                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
2086                     "Region #0 no a PIO resource (%s).\n",
2087                     pci_name(ha->pdev));
2088                 pio = 0;
2089         }
2090         ha->pio_address = pio;
2091         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
2092             "PIO address=%llu.\n",
2093             (unsigned long long)ha->pio_address);
2094
2095 skip_pio:
2096         /* Use MMIO operations for all accesses. */
2097         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
2098                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
2099                     "Region #1 not an MMIO resource (%s), aborting.\n",
2100                     pci_name(ha->pdev));
2101                 goto iospace_error_exit;
2102         }
2103         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
2104                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
2105                     "Invalid PCI mem region size (%s), aborting.\n",
2106                     pci_name(ha->pdev));
2107                 goto iospace_error_exit;
2108         }
2109
2110         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
2111         if (!ha->iobase) {
2112                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
2113                     "Cannot remap MMIO (%s), aborting.\n",
2114                     pci_name(ha->pdev));
2115                 goto iospace_error_exit;
2116         }
2117
2118         /* Determine queue resources */
2119         ha->max_req_queues = ha->max_rsp_queues = 1;
2120         ha->msix_count = QLA_BASE_VECTORS;
2121
2122         /* Check if FW supports MQ or not */
2123         if (!(ha->fw_attributes & BIT_6))
2124                 goto mqiobase_exit;
2125
2126         if (!ql2xmqsupport || !ql2xnvmeenable ||
2127             (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
2128                 goto mqiobase_exit;
2129
2130         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
2131                         pci_resource_len(ha->pdev, 3));
2132         if (ha->mqiobase) {
2133                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
2134                     "MQIO Base=%p.\n", ha->mqiobase);
2135                 /* Read MSIX vector size of the board */
2136                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
2137                 ha->msix_count = msix + 1;
2138                 /* Max queues are bounded by available msix vectors */
2139                 /* MB interrupt uses 1 vector */
2140                 ha->max_req_queues = ha->msix_count - 1;
2141                 ha->max_rsp_queues = ha->max_req_queues;
2142                 /* Queue pairs is the max value minus the base queue pair */
2143                 ha->max_qpairs = ha->max_rsp_queues - 1;
2144                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
2145                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
2146
2147                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
2148                     "MSI-X vector count: %d.\n", ha->msix_count);
2149         } else
2150                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
2151                     "BAR 3 not enabled.\n");
2152
2153 mqiobase_exit:
2154         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2155             "MSIX Count: %d.\n", ha->msix_count);
2156         return (0);
2157
2158 iospace_error_exit:
2159         return (-ENOMEM);
2160 }
2161
2162
2163 static int
2164 qla83xx_iospace_config(struct qla_hw_data *ha)
2165 {
2166         uint16_t msix;
2167
2168         if (pci_request_selected_regions(ha->pdev, ha->bars,
2169             QLA2XXX_DRIVER_NAME)) {
2170                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2171                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2172                     pci_name(ha->pdev));
2173
2174                 goto iospace_error_exit;
2175         }
2176
2177         /* Use MMIO operations for all accesses. */
2178         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2179                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2180                     "Invalid pci I/O region size (%s).\n",
2181                     pci_name(ha->pdev));
2182                 goto iospace_error_exit;
2183         }
2184         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2185                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2186                     "Invalid PCI mem region size (%s), aborting\n",
2187                         pci_name(ha->pdev));
2188                 goto iospace_error_exit;
2189         }
2190
2191         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2192         if (!ha->iobase) {
2193                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2194                     "Cannot remap MMIO (%s), aborting.\n",
2195                     pci_name(ha->pdev));
2196                 goto iospace_error_exit;
2197         }
2198
2199         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2200         /* 83XX 26XX always use MQ type access for queues
2201          * - mbar 2, a.k.a region 4 */
2202         ha->max_req_queues = ha->max_rsp_queues = 1;
2203         ha->msix_count = QLA_BASE_VECTORS;
2204         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2205                         pci_resource_len(ha->pdev, 4));
2206
2207         if (!ha->mqiobase) {
2208                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2209                     "BAR2/region4 not enabled\n");
2210                 goto mqiobase_exit;
2211         }
2212
2213         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2214                         pci_resource_len(ha->pdev, 2));
2215         if (ha->msixbase) {
2216                 /* Read MSIX vector size of the board */
2217                 pci_read_config_word(ha->pdev,
2218                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2219                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2220                 /*
2221                  * By default, driver uses at least two msix vectors
2222                  * (default & rspq)
2223                  */
2224                 if (ql2xmqsupport || ql2xnvmeenable) {
2225                         /* MB interrupt uses 1 vector */
2226                         ha->max_req_queues = ha->msix_count - 1;
2227
2228                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2229                         if (QLA_TGT_MODE_ENABLED())
2230                                 ha->max_req_queues--;
2231
2232                         ha->max_rsp_queues = ha->max_req_queues;
2233
2234                         /* Queue pairs is the max value minus
2235                          * the base queue pair */
2236                         ha->max_qpairs = ha->max_req_queues - 1;
2237                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2238                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2239                 }
2240                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2241                     "MSI-X vector count: %d.\n", ha->msix_count);
2242         } else
2243                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2244                     "BAR 1 not enabled.\n");
2245
2246 mqiobase_exit:
2247         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2248             "MSIX Count: %d.\n", ha->msix_count);
2249         return 0;
2250
2251 iospace_error_exit:
2252         return -ENOMEM;
2253 }
2254
2255 static struct isp_operations qla2100_isp_ops = {
2256         .pci_config             = qla2100_pci_config,
2257         .reset_chip             = qla2x00_reset_chip,
2258         .chip_diag              = qla2x00_chip_diag,
2259         .config_rings           = qla2x00_config_rings,
2260         .reset_adapter          = qla2x00_reset_adapter,
2261         .nvram_config           = qla2x00_nvram_config,
2262         .update_fw_options      = qla2x00_update_fw_options,
2263         .load_risc              = qla2x00_load_risc,
2264         .pci_info_str           = qla2x00_pci_info_str,
2265         .fw_version_str         = qla2x00_fw_version_str,
2266         .intr_handler           = qla2100_intr_handler,
2267         .enable_intrs           = qla2x00_enable_intrs,
2268         .disable_intrs          = qla2x00_disable_intrs,
2269         .abort_command          = qla2x00_abort_command,
2270         .target_reset           = qla2x00_abort_target,
2271         .lun_reset              = qla2x00_lun_reset,
2272         .fabric_login           = qla2x00_login_fabric,
2273         .fabric_logout          = qla2x00_fabric_logout,
2274         .calc_req_entries       = qla2x00_calc_iocbs_32,
2275         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2276         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2277         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2278         .read_nvram             = qla2x00_read_nvram_data,
2279         .write_nvram            = qla2x00_write_nvram_data,
2280         .fw_dump                = qla2100_fw_dump,
2281         .beacon_on              = NULL,
2282         .beacon_off             = NULL,
2283         .beacon_blink           = NULL,
2284         .read_optrom            = qla2x00_read_optrom_data,
2285         .write_optrom           = qla2x00_write_optrom_data,
2286         .get_flash_version      = qla2x00_get_flash_version,
2287         .start_scsi             = qla2x00_start_scsi,
2288         .start_scsi_mq          = NULL,
2289         .abort_isp              = qla2x00_abort_isp,
2290         .iospace_config         = qla2x00_iospace_config,
2291         .initialize_adapter     = qla2x00_initialize_adapter,
2292 };
2293
2294 static struct isp_operations qla2300_isp_ops = {
2295         .pci_config             = qla2300_pci_config,
2296         .reset_chip             = qla2x00_reset_chip,
2297         .chip_diag              = qla2x00_chip_diag,
2298         .config_rings           = qla2x00_config_rings,
2299         .reset_adapter          = qla2x00_reset_adapter,
2300         .nvram_config           = qla2x00_nvram_config,
2301         .update_fw_options      = qla2x00_update_fw_options,
2302         .load_risc              = qla2x00_load_risc,
2303         .pci_info_str           = qla2x00_pci_info_str,
2304         .fw_version_str         = qla2x00_fw_version_str,
2305         .intr_handler           = qla2300_intr_handler,
2306         .enable_intrs           = qla2x00_enable_intrs,
2307         .disable_intrs          = qla2x00_disable_intrs,
2308         .abort_command          = qla2x00_abort_command,
2309         .target_reset           = qla2x00_abort_target,
2310         .lun_reset              = qla2x00_lun_reset,
2311         .fabric_login           = qla2x00_login_fabric,
2312         .fabric_logout          = qla2x00_fabric_logout,
2313         .calc_req_entries       = qla2x00_calc_iocbs_32,
2314         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2315         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2316         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2317         .read_nvram             = qla2x00_read_nvram_data,
2318         .write_nvram            = qla2x00_write_nvram_data,
2319         .fw_dump                = qla2300_fw_dump,
2320         .beacon_on              = qla2x00_beacon_on,
2321         .beacon_off             = qla2x00_beacon_off,
2322         .beacon_blink           = qla2x00_beacon_blink,
2323         .read_optrom            = qla2x00_read_optrom_data,
2324         .write_optrom           = qla2x00_write_optrom_data,
2325         .get_flash_version      = qla2x00_get_flash_version,
2326         .start_scsi             = qla2x00_start_scsi,
2327         .start_scsi_mq          = NULL,
2328         .abort_isp              = qla2x00_abort_isp,
2329         .iospace_config         = qla2x00_iospace_config,
2330         .initialize_adapter     = qla2x00_initialize_adapter,
2331 };
2332
2333 static struct isp_operations qla24xx_isp_ops = {
2334         .pci_config             = qla24xx_pci_config,
2335         .reset_chip             = qla24xx_reset_chip,
2336         .chip_diag              = qla24xx_chip_diag,
2337         .config_rings           = qla24xx_config_rings,
2338         .reset_adapter          = qla24xx_reset_adapter,
2339         .nvram_config           = qla24xx_nvram_config,
2340         .update_fw_options      = qla24xx_update_fw_options,
2341         .load_risc              = qla24xx_load_risc,
2342         .pci_info_str           = qla24xx_pci_info_str,
2343         .fw_version_str         = qla24xx_fw_version_str,
2344         .intr_handler           = qla24xx_intr_handler,
2345         .enable_intrs           = qla24xx_enable_intrs,
2346         .disable_intrs          = qla24xx_disable_intrs,
2347         .abort_command          = qla24xx_abort_command,
2348         .target_reset           = qla24xx_abort_target,
2349         .lun_reset              = qla24xx_lun_reset,
2350         .fabric_login           = qla24xx_login_fabric,
2351         .fabric_logout          = qla24xx_fabric_logout,
2352         .calc_req_entries       = NULL,
2353         .build_iocbs            = NULL,
2354         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2355         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2356         .read_nvram             = qla24xx_read_nvram_data,
2357         .write_nvram            = qla24xx_write_nvram_data,
2358         .fw_dump                = qla24xx_fw_dump,
2359         .beacon_on              = qla24xx_beacon_on,
2360         .beacon_off             = qla24xx_beacon_off,
2361         .beacon_blink           = qla24xx_beacon_blink,
2362         .read_optrom            = qla24xx_read_optrom_data,
2363         .write_optrom           = qla24xx_write_optrom_data,
2364         .get_flash_version      = qla24xx_get_flash_version,
2365         .start_scsi             = qla24xx_start_scsi,
2366         .start_scsi_mq          = NULL,
2367         .abort_isp              = qla2x00_abort_isp,
2368         .iospace_config         = qla2x00_iospace_config,
2369         .initialize_adapter     = qla2x00_initialize_adapter,
2370 };
2371
2372 static struct isp_operations qla25xx_isp_ops = {
2373         .pci_config             = qla25xx_pci_config,
2374         .reset_chip             = qla24xx_reset_chip,
2375         .chip_diag              = qla24xx_chip_diag,
2376         .config_rings           = qla24xx_config_rings,
2377         .reset_adapter          = qla24xx_reset_adapter,
2378         .nvram_config           = qla24xx_nvram_config,
2379         .update_fw_options      = qla24xx_update_fw_options,
2380         .load_risc              = qla24xx_load_risc,
2381         .pci_info_str           = qla24xx_pci_info_str,
2382         .fw_version_str         = qla24xx_fw_version_str,
2383         .intr_handler           = qla24xx_intr_handler,
2384         .enable_intrs           = qla24xx_enable_intrs,
2385         .disable_intrs          = qla24xx_disable_intrs,
2386         .abort_command          = qla24xx_abort_command,
2387         .target_reset           = qla24xx_abort_target,
2388         .lun_reset              = qla24xx_lun_reset,
2389         .fabric_login           = qla24xx_login_fabric,
2390         .fabric_logout          = qla24xx_fabric_logout,
2391         .calc_req_entries       = NULL,
2392         .build_iocbs            = NULL,
2393         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2394         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2395         .read_nvram             = qla25xx_read_nvram_data,
2396         .write_nvram            = qla25xx_write_nvram_data,
2397         .fw_dump                = qla25xx_fw_dump,
2398         .beacon_on              = qla24xx_beacon_on,
2399         .beacon_off             = qla24xx_beacon_off,
2400         .beacon_blink           = qla24xx_beacon_blink,
2401         .read_optrom            = qla25xx_read_optrom_data,
2402         .write_optrom           = qla24xx_write_optrom_data,
2403         .get_flash_version      = qla24xx_get_flash_version,
2404         .start_scsi             = qla24xx_dif_start_scsi,
2405         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2406         .abort_isp              = qla2x00_abort_isp,
2407         .iospace_config         = qla2x00_iospace_config,
2408         .initialize_adapter     = qla2x00_initialize_adapter,
2409 };
2410
2411 static struct isp_operations qla81xx_isp_ops = {
2412         .pci_config             = qla25xx_pci_config,
2413         .reset_chip             = qla24xx_reset_chip,
2414         .chip_diag              = qla24xx_chip_diag,
2415         .config_rings           = qla24xx_config_rings,
2416         .reset_adapter          = qla24xx_reset_adapter,
2417         .nvram_config           = qla81xx_nvram_config,
2418         .update_fw_options      = qla24xx_update_fw_options,
2419         .load_risc              = qla81xx_load_risc,
2420         .pci_info_str           = qla24xx_pci_info_str,
2421         .fw_version_str         = qla24xx_fw_version_str,
2422         .intr_handler           = qla24xx_intr_handler,
2423         .enable_intrs           = qla24xx_enable_intrs,
2424         .disable_intrs          = qla24xx_disable_intrs,
2425         .abort_command          = qla24xx_abort_command,
2426         .target_reset           = qla24xx_abort_target,
2427         .lun_reset              = qla24xx_lun_reset,
2428         .fabric_login           = qla24xx_login_fabric,
2429         .fabric_logout          = qla24xx_fabric_logout,
2430         .calc_req_entries       = NULL,
2431         .build_iocbs            = NULL,
2432         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2433         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2434         .read_nvram             = NULL,
2435         .write_nvram            = NULL,
2436         .fw_dump                = qla81xx_fw_dump,
2437         .beacon_on              = qla24xx_beacon_on,
2438         .beacon_off             = qla24xx_beacon_off,
2439         .beacon_blink           = qla83xx_beacon_blink,
2440         .read_optrom            = qla25xx_read_optrom_data,
2441         .write_optrom           = qla24xx_write_optrom_data,
2442         .get_flash_version      = qla24xx_get_flash_version,
2443         .start_scsi             = qla24xx_dif_start_scsi,
2444         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2445         .abort_isp              = qla2x00_abort_isp,
2446         .iospace_config         = qla2x00_iospace_config,
2447         .initialize_adapter     = qla2x00_initialize_adapter,
2448 };
2449
2450 static struct isp_operations qla82xx_isp_ops = {
2451         .pci_config             = qla82xx_pci_config,
2452         .reset_chip             = qla82xx_reset_chip,
2453         .chip_diag              = qla24xx_chip_diag,
2454         .config_rings           = qla82xx_config_rings,
2455         .reset_adapter          = qla24xx_reset_adapter,
2456         .nvram_config           = qla81xx_nvram_config,
2457         .update_fw_options      = qla24xx_update_fw_options,
2458         .load_risc              = qla82xx_load_risc,
2459         .pci_info_str           = qla24xx_pci_info_str,
2460         .fw_version_str         = qla24xx_fw_version_str,
2461         .intr_handler           = qla82xx_intr_handler,
2462         .enable_intrs           = qla82xx_enable_intrs,
2463         .disable_intrs          = qla82xx_disable_intrs,
2464         .abort_command          = qla24xx_abort_command,
2465         .target_reset           = qla24xx_abort_target,
2466         .lun_reset              = qla24xx_lun_reset,
2467         .fabric_login           = qla24xx_login_fabric,
2468         .fabric_logout          = qla24xx_fabric_logout,
2469         .calc_req_entries       = NULL,
2470         .build_iocbs            = NULL,
2471         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2472         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2473         .read_nvram             = qla24xx_read_nvram_data,
2474         .write_nvram            = qla24xx_write_nvram_data,
2475         .fw_dump                = qla82xx_fw_dump,
2476         .beacon_on              = qla82xx_beacon_on,
2477         .beacon_off             = qla82xx_beacon_off,
2478         .beacon_blink           = NULL,
2479         .read_optrom            = qla82xx_read_optrom_data,
2480         .write_optrom           = qla82xx_write_optrom_data,
2481         .get_flash_version      = qla82xx_get_flash_version,
2482         .start_scsi             = qla82xx_start_scsi,
2483         .start_scsi_mq          = NULL,
2484         .abort_isp              = qla82xx_abort_isp,
2485         .iospace_config         = qla82xx_iospace_config,
2486         .initialize_adapter     = qla2x00_initialize_adapter,
2487 };
2488
2489 static struct isp_operations qla8044_isp_ops = {
2490         .pci_config             = qla82xx_pci_config,
2491         .reset_chip             = qla82xx_reset_chip,
2492         .chip_diag              = qla24xx_chip_diag,
2493         .config_rings           = qla82xx_config_rings,
2494         .reset_adapter          = qla24xx_reset_adapter,
2495         .nvram_config           = qla81xx_nvram_config,
2496         .update_fw_options      = qla24xx_update_fw_options,
2497         .load_risc              = qla82xx_load_risc,
2498         .pci_info_str           = qla24xx_pci_info_str,
2499         .fw_version_str         = qla24xx_fw_version_str,
2500         .intr_handler           = qla8044_intr_handler,
2501         .enable_intrs           = qla82xx_enable_intrs,
2502         .disable_intrs          = qla82xx_disable_intrs,
2503         .abort_command          = qla24xx_abort_command,
2504         .target_reset           = qla24xx_abort_target,
2505         .lun_reset              = qla24xx_lun_reset,
2506         .fabric_login           = qla24xx_login_fabric,
2507         .fabric_logout          = qla24xx_fabric_logout,
2508         .calc_req_entries       = NULL,
2509         .build_iocbs            = NULL,
2510         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2511         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2512         .read_nvram             = NULL,
2513         .write_nvram            = NULL,
2514         .fw_dump                = qla8044_fw_dump,
2515         .beacon_on              = qla82xx_beacon_on,
2516         .beacon_off             = qla82xx_beacon_off,
2517         .beacon_blink           = NULL,
2518         .read_optrom            = qla8044_read_optrom_data,
2519         .write_optrom           = qla8044_write_optrom_data,
2520         .get_flash_version      = qla82xx_get_flash_version,
2521         .start_scsi             = qla82xx_start_scsi,
2522         .start_scsi_mq          = NULL,
2523         .abort_isp              = qla8044_abort_isp,
2524         .iospace_config         = qla82xx_iospace_config,
2525         .initialize_adapter     = qla2x00_initialize_adapter,
2526 };
2527
2528 static struct isp_operations qla83xx_isp_ops = {
2529         .pci_config             = qla25xx_pci_config,
2530         .reset_chip             = qla24xx_reset_chip,
2531         .chip_diag              = qla24xx_chip_diag,
2532         .config_rings           = qla24xx_config_rings,
2533         .reset_adapter          = qla24xx_reset_adapter,
2534         .nvram_config           = qla81xx_nvram_config,
2535         .update_fw_options      = qla24xx_update_fw_options,
2536         .load_risc              = qla81xx_load_risc,
2537         .pci_info_str           = qla24xx_pci_info_str,
2538         .fw_version_str         = qla24xx_fw_version_str,
2539         .intr_handler           = qla24xx_intr_handler,
2540         .enable_intrs           = qla24xx_enable_intrs,
2541         .disable_intrs          = qla24xx_disable_intrs,
2542         .abort_command          = qla24xx_abort_command,
2543         .target_reset           = qla24xx_abort_target,
2544         .lun_reset              = qla24xx_lun_reset,
2545         .fabric_login           = qla24xx_login_fabric,
2546         .fabric_logout          = qla24xx_fabric_logout,
2547         .calc_req_entries       = NULL,
2548         .build_iocbs            = NULL,
2549         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2550         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2551         .read_nvram             = NULL,
2552         .write_nvram            = NULL,
2553         .fw_dump                = qla83xx_fw_dump,
2554         .beacon_on              = qla24xx_beacon_on,
2555         .beacon_off             = qla24xx_beacon_off,
2556         .beacon_blink           = qla83xx_beacon_blink,
2557         .read_optrom            = qla25xx_read_optrom_data,
2558         .write_optrom           = qla24xx_write_optrom_data,
2559         .get_flash_version      = qla24xx_get_flash_version,
2560         .start_scsi             = qla24xx_dif_start_scsi,
2561         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2562         .abort_isp              = qla2x00_abort_isp,
2563         .iospace_config         = qla83xx_iospace_config,
2564         .initialize_adapter     = qla2x00_initialize_adapter,
2565 };
2566
2567 static struct isp_operations qlafx00_isp_ops = {
2568         .pci_config             = qlafx00_pci_config,
2569         .reset_chip             = qlafx00_soft_reset,
2570         .chip_diag              = qlafx00_chip_diag,
2571         .config_rings           = qlafx00_config_rings,
2572         .reset_adapter          = qlafx00_soft_reset,
2573         .nvram_config           = NULL,
2574         .update_fw_options      = NULL,
2575         .load_risc              = NULL,
2576         .pci_info_str           = qlafx00_pci_info_str,
2577         .fw_version_str         = qlafx00_fw_version_str,
2578         .intr_handler           = qlafx00_intr_handler,
2579         .enable_intrs           = qlafx00_enable_intrs,
2580         .disable_intrs          = qlafx00_disable_intrs,
2581         .abort_command          = qla24xx_async_abort_command,
2582         .target_reset           = qlafx00_abort_target,
2583         .lun_reset              = qlafx00_lun_reset,
2584         .fabric_login           = NULL,
2585         .fabric_logout          = NULL,
2586         .calc_req_entries       = NULL,
2587         .build_iocbs            = NULL,
2588         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2589         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2590         .read_nvram             = qla24xx_read_nvram_data,
2591         .write_nvram            = qla24xx_write_nvram_data,
2592         .fw_dump                = NULL,
2593         .beacon_on              = qla24xx_beacon_on,
2594         .beacon_off             = qla24xx_beacon_off,
2595         .beacon_blink           = NULL,
2596         .read_optrom            = qla24xx_read_optrom_data,
2597         .write_optrom           = qla24xx_write_optrom_data,
2598         .get_flash_version      = qla24xx_get_flash_version,
2599         .start_scsi             = qlafx00_start_scsi,
2600         .start_scsi_mq          = NULL,
2601         .abort_isp              = qlafx00_abort_isp,
2602         .iospace_config         = qlafx00_iospace_config,
2603         .initialize_adapter     = qlafx00_initialize_adapter,
2604 };
2605
2606 static struct isp_operations qla27xx_isp_ops = {
2607         .pci_config             = qla25xx_pci_config,
2608         .reset_chip             = qla24xx_reset_chip,
2609         .chip_diag              = qla24xx_chip_diag,
2610         .config_rings           = qla24xx_config_rings,
2611         .reset_adapter          = qla24xx_reset_adapter,
2612         .nvram_config           = qla81xx_nvram_config,
2613         .update_fw_options      = qla24xx_update_fw_options,
2614         .load_risc              = qla81xx_load_risc,
2615         .pci_info_str           = qla24xx_pci_info_str,
2616         .fw_version_str         = qla24xx_fw_version_str,
2617         .intr_handler           = qla24xx_intr_handler,
2618         .enable_intrs           = qla24xx_enable_intrs,
2619         .disable_intrs          = qla24xx_disable_intrs,
2620         .abort_command          = qla24xx_abort_command,
2621         .target_reset           = qla24xx_abort_target,
2622         .lun_reset              = qla24xx_lun_reset,
2623         .fabric_login           = qla24xx_login_fabric,
2624         .fabric_logout          = qla24xx_fabric_logout,
2625         .calc_req_entries       = NULL,
2626         .build_iocbs            = NULL,
2627         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2628         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2629         .read_nvram             = NULL,
2630         .write_nvram            = NULL,
2631         .fw_dump                = qla27xx_fwdump,
2632         .mpi_fw_dump            = qla27xx_mpi_fwdump,
2633         .beacon_on              = qla24xx_beacon_on,
2634         .beacon_off             = qla24xx_beacon_off,
2635         .beacon_blink           = qla83xx_beacon_blink,
2636         .read_optrom            = qla25xx_read_optrom_data,
2637         .write_optrom           = qla24xx_write_optrom_data,
2638         .get_flash_version      = qla24xx_get_flash_version,
2639         .start_scsi             = qla24xx_dif_start_scsi,
2640         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2641         .abort_isp              = qla2x00_abort_isp,
2642         .iospace_config         = qla83xx_iospace_config,
2643         .initialize_adapter     = qla2x00_initialize_adapter,
2644 };
2645
2646 static inline void
2647 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2648 {
2649         ha->device_type = DT_EXTENDED_IDS;
2650         switch (ha->pdev->device) {
2651         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2652                 ha->isp_type |= DT_ISP2100;
2653                 ha->device_type &= ~DT_EXTENDED_IDS;
2654                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2655                 break;
2656         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2657                 ha->isp_type |= DT_ISP2200;
2658                 ha->device_type &= ~DT_EXTENDED_IDS;
2659                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2660                 break;
2661         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2662                 ha->isp_type |= DT_ISP2300;
2663                 ha->device_type |= DT_ZIO_SUPPORTED;
2664                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2665                 break;
2666         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2667                 ha->isp_type |= DT_ISP2312;
2668                 ha->device_type |= DT_ZIO_SUPPORTED;
2669                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2670                 break;
2671         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2672                 ha->isp_type |= DT_ISP2322;
2673                 ha->device_type |= DT_ZIO_SUPPORTED;
2674                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2675                     ha->pdev->subsystem_device == 0x0170)
2676                         ha->device_type |= DT_OEM_001;
2677                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2678                 break;
2679         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2680                 ha->isp_type |= DT_ISP6312;
2681                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2682                 break;
2683         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2684                 ha->isp_type |= DT_ISP6322;
2685                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2686                 break;
2687         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2688                 ha->isp_type |= DT_ISP2422;
2689                 ha->device_type |= DT_ZIO_SUPPORTED;
2690                 ha->device_type |= DT_FWI2;
2691                 ha->device_type |= DT_IIDMA;
2692                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2693                 break;
2694         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2695                 ha->isp_type |= DT_ISP2432;
2696                 ha->device_type |= DT_ZIO_SUPPORTED;
2697                 ha->device_type |= DT_FWI2;
2698                 ha->device_type |= DT_IIDMA;
2699                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2700                 break;
2701         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2702                 ha->isp_type |= DT_ISP8432;
2703                 ha->device_type |= DT_ZIO_SUPPORTED;
2704                 ha->device_type |= DT_FWI2;
2705                 ha->device_type |= DT_IIDMA;
2706                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2707                 break;
2708         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2709                 ha->isp_type |= DT_ISP5422;
2710                 ha->device_type |= DT_FWI2;
2711                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2712                 break;
2713         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2714                 ha->isp_type |= DT_ISP5432;
2715                 ha->device_type |= DT_FWI2;
2716                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2717                 break;
2718         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2719                 ha->isp_type |= DT_ISP2532;
2720                 ha->device_type |= DT_ZIO_SUPPORTED;
2721                 ha->device_type |= DT_FWI2;
2722                 ha->device_type |= DT_IIDMA;
2723                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2724                 break;
2725         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2726                 ha->isp_type |= DT_ISP8001;
2727                 ha->device_type |= DT_ZIO_SUPPORTED;
2728                 ha->device_type |= DT_FWI2;
2729                 ha->device_type |= DT_IIDMA;
2730                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2731                 break;
2732         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2733                 ha->isp_type |= DT_ISP8021;
2734                 ha->device_type |= DT_ZIO_SUPPORTED;
2735                 ha->device_type |= DT_FWI2;
2736                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2737                 /* Initialize 82XX ISP flags */
2738                 qla82xx_init_flags(ha);
2739                 break;
2740          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2741                 ha->isp_type |= DT_ISP8044;
2742                 ha->device_type |= DT_ZIO_SUPPORTED;
2743                 ha->device_type |= DT_FWI2;
2744                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2745                 /* Initialize 82XX ISP flags */
2746                 qla82xx_init_flags(ha);
2747                 break;
2748         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2749                 ha->isp_type |= DT_ISP2031;
2750                 ha->device_type |= DT_ZIO_SUPPORTED;
2751                 ha->device_type |= DT_FWI2;
2752                 ha->device_type |= DT_IIDMA;
2753                 ha->device_type |= DT_T10_PI;
2754                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2755                 break;
2756         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2757                 ha->isp_type |= DT_ISP8031;
2758                 ha->device_type |= DT_ZIO_SUPPORTED;
2759                 ha->device_type |= DT_FWI2;
2760                 ha->device_type |= DT_IIDMA;
2761                 ha->device_type |= DT_T10_PI;
2762                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2763                 break;
2764         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2765                 ha->isp_type |= DT_ISPFX00;
2766                 break;
2767         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2768                 ha->isp_type |= DT_ISP2071;
2769                 ha->device_type |= DT_ZIO_SUPPORTED;
2770                 ha->device_type |= DT_FWI2;
2771                 ha->device_type |= DT_IIDMA;
2772                 ha->device_type |= DT_T10_PI;
2773                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2774                 break;
2775         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2776                 ha->isp_type |= DT_ISP2271;
2777                 ha->device_type |= DT_ZIO_SUPPORTED;
2778                 ha->device_type |= DT_FWI2;
2779                 ha->device_type |= DT_IIDMA;
2780                 ha->device_type |= DT_T10_PI;
2781                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2782                 break;
2783         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2784                 ha->isp_type |= DT_ISP2261;
2785                 ha->device_type |= DT_ZIO_SUPPORTED;
2786                 ha->device_type |= DT_FWI2;
2787                 ha->device_type |= DT_IIDMA;
2788                 ha->device_type |= DT_T10_PI;
2789                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2790                 break;
2791         case PCI_DEVICE_ID_QLOGIC_ISP2081:
2792         case PCI_DEVICE_ID_QLOGIC_ISP2089:
2793                 ha->isp_type |= DT_ISP2081;
2794                 ha->device_type |= DT_ZIO_SUPPORTED;
2795                 ha->device_type |= DT_FWI2;
2796                 ha->device_type |= DT_IIDMA;
2797                 ha->device_type |= DT_T10_PI;
2798                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2799                 break;
2800         case PCI_DEVICE_ID_QLOGIC_ISP2281:
2801         case PCI_DEVICE_ID_QLOGIC_ISP2289:
2802                 ha->isp_type |= DT_ISP2281;
2803                 ha->device_type |= DT_ZIO_SUPPORTED;
2804                 ha->device_type |= DT_FWI2;
2805                 ha->device_type |= DT_IIDMA;
2806                 ha->device_type |= DT_T10_PI;
2807                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2808                 break;
2809         }
2810
2811         if (IS_QLA82XX(ha))
2812                 ha->port_no = ha->portnum & 1;
2813         else {
2814                 /* Get adapter physical port no from interrupt pin register. */
2815                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2816                 if (IS_QLA25XX(ha) || IS_QLA2031(ha) ||
2817                     IS_QLA27XX(ha) || IS_QLA28XX(ha))
2818                         ha->port_no--;
2819                 else
2820                         ha->port_no = !(ha->port_no & 1);
2821         }
2822
2823         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2824             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2825             ha->device_type, ha->port_no, ha->fw_srisc_address);
2826 }
2827
2828 static void
2829 qla2xxx_scan_start(struct Scsi_Host *shost)
2830 {
2831         scsi_qla_host_t *vha = shost_priv(shost);
2832
2833         if (vha->hw->flags.running_gold_fw)
2834                 return;
2835
2836         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2837         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2838         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2839         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2840 }
2841
2842 static int
2843 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2844 {
2845         scsi_qla_host_t *vha = shost_priv(shost);
2846
2847         if (test_bit(UNLOADING, &vha->dpc_flags))
2848                 return 1;
2849         if (!vha->host)
2850                 return 1;
2851         if (time > vha->hw->loop_reset_delay * HZ)
2852                 return 1;
2853
2854         return atomic_read(&vha->loop_state) == LOOP_READY;
2855 }
2856
2857 static void qla_heartbeat_work_fn(struct work_struct *work)
2858 {
2859         struct qla_hw_data *ha = container_of(work,
2860                 struct qla_hw_data, heartbeat_work);
2861         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2862
2863         if (!ha->flags.mbox_busy && base_vha->flags.init_done)
2864                 qla_no_op_mb(base_vha);
2865 }
2866
2867 static void qla2x00_iocb_work_fn(struct work_struct *work)
2868 {
2869         struct scsi_qla_host *vha = container_of(work,
2870                 struct scsi_qla_host, iocb_work);
2871         struct qla_hw_data *ha = vha->hw;
2872         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2873         int i = 2;
2874         unsigned long flags;
2875
2876         if (test_bit(UNLOADING, &base_vha->dpc_flags))
2877                 return;
2878
2879         while (!list_empty(&vha->work_list) && i > 0) {
2880                 qla2x00_do_work(vha);
2881                 i--;
2882         }
2883
2884         spin_lock_irqsave(&vha->work_lock, flags);
2885         clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2886         spin_unlock_irqrestore(&vha->work_lock, flags);
2887 }
2888
2889 static void
2890 qla_trace_init(void)
2891 {
2892         qla_trc_array = trace_array_get_by_name("qla2xxx");
2893         if (!qla_trc_array) {
2894                 ql_log(ql_log_fatal, NULL, 0x0001,
2895                        "Unable to create qla2xxx trace instance, instance logging will be disabled.\n");
2896                 return;
2897         }
2898
2899         QLA_TRACE_ENABLE(qla_trc_array);
2900 }
2901
2902 static void
2903 qla_trace_uninit(void)
2904 {
2905         if (!qla_trc_array)
2906                 return;
2907         trace_array_put(qla_trc_array);
2908 }
2909
2910 /*
2911  * PCI driver interface
2912  */
2913 static int
2914 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2915 {
2916         int     ret = -ENODEV;
2917         struct Scsi_Host *host;
2918         scsi_qla_host_t *base_vha = NULL;
2919         struct qla_hw_data *ha;
2920         char pci_info[30];
2921         char fw_str[30], wq_name[30];
2922         struct scsi_host_template *sht;
2923         int bars, mem_only = 0;
2924         uint16_t req_length = 0, rsp_length = 0;
2925         struct req_que *req = NULL;
2926         struct rsp_que *rsp = NULL;
2927         int i;
2928
2929         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2930         sht = &qla2xxx_driver_template;
2931         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2932             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2933             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2934             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2935             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2936             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2937             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2938             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2939             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2940             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2941             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2942             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2943             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2944             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2945             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261 ||
2946             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2081 ||
2947             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2281 ||
2948             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2089 ||
2949             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2289) {
2950                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2951                 mem_only = 1;
2952                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2953                     "Mem only adapter.\n");
2954         }
2955         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2956             "Bars=%d.\n", bars);
2957
2958         if (mem_only) {
2959                 if (pci_enable_device_mem(pdev))
2960                         return ret;
2961         } else {
2962                 if (pci_enable_device(pdev))
2963                         return ret;
2964         }
2965
2966         if (is_kdump_kernel()) {
2967                 ql2xmqsupport = 0;
2968                 ql2xallocfwdump = 0;
2969         }
2970
2971         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2972         if (!ha) {
2973                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2974                     "Unable to allocate memory for ha.\n");
2975                 goto disable_device;
2976         }
2977         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2978             "Memory allocated for ha=%p.\n", ha);
2979         ha->pdev = pdev;
2980         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2981         spin_lock_init(&ha->tgt.q_full_lock);
2982         spin_lock_init(&ha->tgt.sess_lock);
2983         spin_lock_init(&ha->tgt.atio_lock);
2984
2985         spin_lock_init(&ha->sadb_lock);
2986         INIT_LIST_HEAD(&ha->sadb_tx_index_list);
2987         INIT_LIST_HEAD(&ha->sadb_rx_index_list);
2988
2989         spin_lock_init(&ha->sadb_fp_lock);
2990
2991         if (qla_edif_sadb_build_free_pool(ha)) {
2992                 kfree(ha);
2993                 goto  disable_device;
2994         }
2995
2996         atomic_set(&ha->nvme_active_aen_cnt, 0);
2997
2998         /* Clear our data area */
2999         ha->bars = bars;
3000         ha->mem_only = mem_only;
3001         spin_lock_init(&ha->hardware_lock);
3002         spin_lock_init(&ha->vport_slock);
3003         mutex_init(&ha->selflogin_lock);
3004         mutex_init(&ha->optrom_mutex);
3005
3006         /* Set ISP-type information. */
3007         qla2x00_set_isp_flags(ha);
3008
3009         /* Set EEH reset type to fundamental if required by hba */
3010         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
3011             IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
3012                 pdev->needs_freset = 1;
3013
3014         ha->prev_topology = 0;
3015         ha->init_cb_size = sizeof(init_cb_t);
3016         ha->link_data_rate = PORT_SPEED_UNKNOWN;
3017         ha->optrom_size = OPTROM_SIZE_2300;
3018         ha->max_exchg = FW_MAX_EXCHANGES_CNT;
3019         atomic_set(&ha->num_pend_mbx_stage1, 0);
3020         atomic_set(&ha->num_pend_mbx_stage2, 0);
3021         atomic_set(&ha->zio_threshold, DEFAULT_ZIO_THRESHOLD);
3022         ha->last_zio_threshold = DEFAULT_ZIO_THRESHOLD;
3023         INIT_LIST_HEAD(&ha->tmf_pending);
3024         INIT_LIST_HEAD(&ha->tmf_active);
3025
3026         /* Assign ISP specific operations. */
3027         if (IS_QLA2100(ha)) {
3028                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
3029                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
3030                 req_length = REQUEST_ENTRY_CNT_2100;
3031                 rsp_length = RESPONSE_ENTRY_CNT_2100;
3032                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
3033                 ha->gid_list_info_size = 4;
3034                 ha->flash_conf_off = ~0;
3035                 ha->flash_data_off = ~0;
3036                 ha->nvram_conf_off = ~0;
3037                 ha->nvram_data_off = ~0;
3038                 ha->isp_ops = &qla2100_isp_ops;
3039         } else if (IS_QLA2200(ha)) {
3040                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
3041                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
3042                 req_length = REQUEST_ENTRY_CNT_2200;
3043                 rsp_length = RESPONSE_ENTRY_CNT_2100;
3044                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
3045                 ha->gid_list_info_size = 4;
3046                 ha->flash_conf_off = ~0;
3047                 ha->flash_data_off = ~0;
3048                 ha->nvram_conf_off = ~0;
3049                 ha->nvram_data_off = ~0;
3050                 ha->isp_ops = &qla2100_isp_ops;
3051         } else if (IS_QLA23XX(ha)) {
3052                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
3053                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3054                 req_length = REQUEST_ENTRY_CNT_2200;
3055                 rsp_length = RESPONSE_ENTRY_CNT_2300;
3056                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3057                 ha->gid_list_info_size = 6;
3058                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
3059                         ha->optrom_size = OPTROM_SIZE_2322;
3060                 ha->flash_conf_off = ~0;
3061                 ha->flash_data_off = ~0;
3062                 ha->nvram_conf_off = ~0;
3063                 ha->nvram_data_off = ~0;
3064                 ha->isp_ops = &qla2300_isp_ops;
3065         } else if (IS_QLA24XX_TYPE(ha)) {
3066                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3067                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3068                 req_length = REQUEST_ENTRY_CNT_24XX;
3069                 rsp_length = RESPONSE_ENTRY_CNT_2300;
3070                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3071                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3072                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
3073                 ha->gid_list_info_size = 8;
3074                 ha->optrom_size = OPTROM_SIZE_24XX;
3075                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
3076                 ha->isp_ops = &qla24xx_isp_ops;
3077                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
3078                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
3079                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
3080                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
3081         } else if (IS_QLA25XX(ha)) {
3082                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3083                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3084                 req_length = REQUEST_ENTRY_CNT_24XX;
3085                 rsp_length = RESPONSE_ENTRY_CNT_2300;
3086                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3087                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3088                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
3089                 ha->gid_list_info_size = 8;
3090                 ha->optrom_size = OPTROM_SIZE_25XX;
3091                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3092                 ha->isp_ops = &qla25xx_isp_ops;
3093                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
3094                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
3095                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
3096                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
3097         } else if (IS_QLA81XX(ha)) {
3098                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3099                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3100                 req_length = REQUEST_ENTRY_CNT_24XX;
3101                 rsp_length = RESPONSE_ENTRY_CNT_2300;
3102                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3103                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3104                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3105                 ha->gid_list_info_size = 8;
3106                 ha->optrom_size = OPTROM_SIZE_81XX;
3107                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3108                 ha->isp_ops = &qla81xx_isp_ops;
3109                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3110                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3111                 ha->nvram_conf_off = ~0;
3112                 ha->nvram_data_off = ~0;
3113         } else if (IS_QLA82XX(ha)) {
3114                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3115                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3116                 req_length = REQUEST_ENTRY_CNT_82XX;
3117                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
3118                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3119                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3120                 ha->gid_list_info_size = 8;
3121                 ha->optrom_size = OPTROM_SIZE_82XX;
3122                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3123                 ha->isp_ops = &qla82xx_isp_ops;
3124                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
3125                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
3126                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
3127                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
3128         } else if (IS_QLA8044(ha)) {
3129                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3130                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3131                 req_length = REQUEST_ENTRY_CNT_82XX;
3132                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
3133                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3134                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3135                 ha->gid_list_info_size = 8;
3136                 ha->optrom_size = OPTROM_SIZE_83XX;
3137                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3138                 ha->isp_ops = &qla8044_isp_ops;
3139                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
3140                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
3141                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
3142                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
3143         } else if (IS_QLA83XX(ha)) {
3144                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3145                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3146                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3147                 req_length = REQUEST_ENTRY_CNT_83XX;
3148                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3149                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3150                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3151                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3152                 ha->gid_list_info_size = 8;
3153                 ha->optrom_size = OPTROM_SIZE_83XX;
3154                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3155                 ha->isp_ops = &qla83xx_isp_ops;
3156                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3157                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3158                 ha->nvram_conf_off = ~0;
3159                 ha->nvram_data_off = ~0;
3160         }  else if (IS_QLAFX00(ha)) {
3161                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
3162                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
3163                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
3164                 req_length = REQUEST_ENTRY_CNT_FX00;
3165                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
3166                 ha->isp_ops = &qlafx00_isp_ops;
3167                 ha->port_down_retry_count = 30; /* default value */
3168                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
3169                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
3170                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
3171                 ha->mr.fw_hbt_en = 1;
3172                 ha->mr.host_info_resend = false;
3173                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
3174         } else if (IS_QLA27XX(ha)) {
3175                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3176                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3177                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3178                 req_length = REQUEST_ENTRY_CNT_83XX;
3179                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3180                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3181                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3182                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3183                 ha->gid_list_info_size = 8;
3184                 ha->optrom_size = OPTROM_SIZE_83XX;
3185                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3186                 ha->isp_ops = &qla27xx_isp_ops;
3187                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3188                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3189                 ha->nvram_conf_off = ~0;
3190                 ha->nvram_data_off = ~0;
3191         } else if (IS_QLA28XX(ha)) {
3192                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3193                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3194                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3195                 req_length = REQUEST_ENTRY_CNT_83XX;
3196                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3197                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3198                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3199                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3200                 ha->gid_list_info_size = 8;
3201                 ha->optrom_size = OPTROM_SIZE_28XX;
3202                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3203                 ha->isp_ops = &qla27xx_isp_ops;
3204                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_28XX;
3205                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_28XX;
3206                 ha->nvram_conf_off = ~0;
3207                 ha->nvram_data_off = ~0;
3208         }
3209
3210         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
3211             "mbx_count=%d, req_length=%d, "
3212             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
3213             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
3214             "max_fibre_devices=%d.\n",
3215             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
3216             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
3217             ha->nvram_npiv_size, ha->max_fibre_devices);
3218         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
3219             "isp_ops=%p, flash_conf_off=%d, "
3220             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
3221             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
3222             ha->nvram_conf_off, ha->nvram_data_off);
3223
3224         /* Configure PCI I/O space */
3225         ret = ha->isp_ops->iospace_config(ha);
3226         if (ret)
3227                 goto iospace_config_failed;
3228
3229         ql_log_pci(ql_log_info, pdev, 0x001d,
3230             "Found an ISP%04X irq %d iobase 0x%p.\n",
3231             pdev->device, pdev->irq, ha->iobase);
3232         mutex_init(&ha->vport_lock);
3233         mutex_init(&ha->mq_lock);
3234         init_completion(&ha->mbx_cmd_comp);
3235         complete(&ha->mbx_cmd_comp);
3236         init_completion(&ha->mbx_intr_comp);
3237         init_completion(&ha->dcbx_comp);
3238         init_completion(&ha->lb_portup_comp);
3239
3240         set_bit(0, (unsigned long *) ha->vp_idx_map);
3241
3242         qla2x00_config_dma_addressing(ha);
3243         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3244             "64 Bit addressing is %s.\n",
3245             ha->flags.enable_64bit_addressing ? "enable" :
3246             "disable");
3247         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3248         if (ret) {
3249                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3250                     "Failed to allocate memory for adapter, aborting.\n");
3251
3252                 goto probe_hw_failed;
3253         }
3254
3255         req->max_q_depth = MAX_Q_DEPTH;
3256         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3257                 req->max_q_depth = ql2xmaxqdepth;
3258
3259
3260         base_vha = qla2x00_create_host(sht, ha);
3261         if (!base_vha) {
3262                 ret = -ENOMEM;
3263                 goto probe_hw_failed;
3264         }
3265
3266         pci_set_drvdata(pdev, base_vha);
3267         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3268
3269         host = base_vha->host;
3270         base_vha->req = req;
3271         if (IS_QLA2XXX_MIDTYPE(ha))
3272                 base_vha->mgmt_svr_loop_id =
3273                         qla2x00_reserve_mgmt_server_loop_id(base_vha);
3274         else
3275                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3276                                                 base_vha->vp_idx;
3277
3278         /* Setup fcport template structure. */
3279         ha->mr.fcport.vha = base_vha;
3280         ha->mr.fcport.port_type = FCT_UNKNOWN;
3281         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3282         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3283         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3284         ha->mr.fcport.scan_state = 1;
3285
3286         qla2xxx_reset_stats(host, QLA2XX_HW_ERROR | QLA2XX_SHT_LNK_DWN |
3287                             QLA2XX_INT_ERR | QLA2XX_CMD_TIMEOUT |
3288                             QLA2XX_RESET_CMD_ERR | QLA2XX_TGT_SHT_LNK_DOWN);
3289
3290         /* Set the SG table size based on ISP type */
3291         if (!IS_FWI2_CAPABLE(ha)) {
3292                 if (IS_QLA2100(ha))
3293                         host->sg_tablesize = 32;
3294         } else {
3295                 if (!IS_QLA82XX(ha))
3296                         host->sg_tablesize = QLA_SG_ALL;
3297         }
3298         host->max_id = ha->max_fibre_devices;
3299         host->cmd_per_lun = 3;
3300         host->unique_id = host->host_no;
3301
3302         if (ql2xenabledif && ql2xenabledif != 2) {
3303                 ql_log(ql_log_warn, base_vha, 0x302d,
3304                        "Invalid value for ql2xenabledif, resetting it to default (2)\n");
3305                 ql2xenabledif = 2;
3306         }
3307
3308         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3309                 host->max_cmd_len = 32;
3310         else
3311                 host->max_cmd_len = MAX_CMDSZ;
3312         host->max_channel = MAX_BUSES - 1;
3313         /* Older HBAs support only 16-bit LUNs */
3314         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3315             ql2xmaxlun > 0xffff)
3316                 host->max_lun = 0xffff;
3317         else
3318                 host->max_lun = ql2xmaxlun;
3319         host->transportt = qla2xxx_transport_template;
3320         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3321
3322         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3323             "max_id=%d this_id=%d "
3324             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3325             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3326             host->this_id, host->cmd_per_lun, host->unique_id,
3327             host->max_cmd_len, host->max_channel, host->max_lun,
3328             host->transportt, sht->vendor_id);
3329
3330         INIT_WORK(&ha->heartbeat_work, qla_heartbeat_work_fn);
3331
3332         /* Set up the irqs */
3333         ret = qla2x00_request_irqs(ha, rsp);
3334         if (ret)
3335                 goto probe_failed;
3336
3337         /* Alloc arrays of request and response ring ptrs */
3338         ret = qla2x00_alloc_queues(ha, req, rsp);
3339         if (ret) {
3340                 ql_log(ql_log_fatal, base_vha, 0x003d,
3341                     "Failed to allocate memory for queue pointers..."
3342                     "aborting.\n");
3343                 ret = -ENODEV;
3344                 goto probe_failed;
3345         }
3346
3347         if (ha->mqenable) {
3348                 /* number of hardware queues supported by blk/scsi-mq*/
3349                 host->nr_hw_queues = ha->max_qpairs;
3350
3351                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3352                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3353         } else {
3354                 if (ql2xnvmeenable) {
3355                         host->nr_hw_queues = ha->max_qpairs;
3356                         ql_dbg(ql_dbg_init, base_vha, 0x0194,
3357                             "FC-NVMe support is enabled, HW queues=%d\n",
3358                             host->nr_hw_queues);
3359                 } else {
3360                         ql_dbg(ql_dbg_init, base_vha, 0x0193,
3361                             "blk/scsi-mq disabled.\n");
3362                 }
3363         }
3364
3365         qlt_probe_one_stage1(base_vha, ha);
3366
3367         pci_save_state(pdev);
3368
3369         /* Assign back pointers */
3370         rsp->req = req;
3371         req->rsp = rsp;
3372
3373         if (IS_QLAFX00(ha)) {
3374                 ha->rsp_q_map[0] = rsp;
3375                 ha->req_q_map[0] = req;
3376                 set_bit(0, ha->req_qid_map);
3377                 set_bit(0, ha->rsp_qid_map);
3378         }
3379
3380         /* FWI2-capable only. */
3381         req->req_q_in = &ha->iobase->isp24.req_q_in;
3382         req->req_q_out = &ha->iobase->isp24.req_q_out;
3383         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3384         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3385         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3386             IS_QLA28XX(ha)) {
3387                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3388                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3389                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3390                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3391         }
3392
3393         if (IS_QLAFX00(ha)) {
3394                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3395                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3396                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3397                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3398         }
3399
3400         if (IS_P3P_TYPE(ha)) {
3401                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3402                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3403                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3404         }
3405
3406         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3407             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3408             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3409         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3410             "req->req_q_in=%p req->req_q_out=%p "
3411             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3412             req->req_q_in, req->req_q_out,
3413             rsp->rsp_q_in, rsp->rsp_q_out);
3414         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3415             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3416             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3417         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3418             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3419             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3420
3421         ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 0);
3422         if (unlikely(!ha->wq)) {
3423                 ret = -ENOMEM;
3424                 goto probe_failed;
3425         }
3426
3427         if (ha->isp_ops->initialize_adapter(base_vha)) {
3428                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3429                     "Failed to initialize adapter - Adapter flags %x.\n",
3430                     base_vha->device_flags);
3431
3432                 if (IS_QLA82XX(ha)) {
3433                         qla82xx_idc_lock(ha);
3434                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3435                                 QLA8XXX_DEV_FAILED);
3436                         qla82xx_idc_unlock(ha);
3437                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3438                             "HW State: FAILED.\n");
3439                 } else if (IS_QLA8044(ha)) {
3440                         qla8044_idc_lock(ha);
3441                         qla8044_wr_direct(base_vha,
3442                                 QLA8044_CRB_DEV_STATE_INDEX,
3443                                 QLA8XXX_DEV_FAILED);
3444                         qla8044_idc_unlock(ha);
3445                         ql_log(ql_log_fatal, base_vha, 0x0150,
3446                             "HW State: FAILED.\n");
3447                 }
3448
3449                 ret = -ENODEV;
3450                 goto probe_failed;
3451         }
3452
3453         if (IS_QLAFX00(ha))
3454                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3455         else
3456                 host->can_queue = req->num_outstanding_cmds - 10;
3457
3458         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3459             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3460             host->can_queue, base_vha->req,
3461             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3462
3463         /* Check if FW supports MQ or not for ISP25xx */
3464         if (IS_QLA25XX(ha) && !(ha->fw_attributes & BIT_6))
3465                 ha->mqenable = 0;
3466
3467         if (ha->mqenable) {
3468                 bool startit = false;
3469
3470                 if (QLA_TGT_MODE_ENABLED())
3471                         startit = false;
3472
3473                 if (ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED)
3474                         startit = true;
3475
3476                 /* Create start of day qpairs for Block MQ */
3477                 for (i = 0; i < ha->max_qpairs; i++)
3478                         qla2xxx_create_qpair(base_vha, 5, 0, startit);
3479         }
3480         qla_init_iocb_limit(base_vha);
3481
3482         if (ha->flags.running_gold_fw)
3483                 goto skip_dpc;
3484
3485         /*
3486          * Startup the kernel thread for this host adapter
3487          */
3488         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3489             "%s_dpc", base_vha->host_str);
3490         if (IS_ERR(ha->dpc_thread)) {
3491                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3492                     "Failed to start DPC thread.\n");
3493                 ret = PTR_ERR(ha->dpc_thread);
3494                 ha->dpc_thread = NULL;
3495                 goto probe_failed;
3496         }
3497         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3498             "DPC thread started successfully.\n");
3499
3500         /*
3501          * If we're not coming up in initiator mode, we might sit for
3502          * a while without waking up the dpc thread, which leads to a
3503          * stuck process warning.  So just kick the dpc once here and
3504          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3505          */
3506         qla2xxx_wake_dpc(base_vha);
3507
3508         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3509
3510         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3511                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3512                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3513                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3514
3515                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3516                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3517                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3518                 INIT_WORK(&ha->idc_state_handler,
3519                     qla83xx_idc_state_handler_work);
3520                 INIT_WORK(&ha->nic_core_unrecoverable,
3521                     qla83xx_nic_core_unrecoverable_work);
3522         }
3523
3524 skip_dpc:
3525         list_add_tail(&base_vha->list, &ha->vp_list);
3526         base_vha->host->irq = ha->pdev->irq;
3527
3528         /* Initialized the timer */
3529         qla2x00_start_timer(base_vha, WATCH_INTERVAL);
3530         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3531             "Started qla2x00_timer with "
3532             "interval=%d.\n", WATCH_INTERVAL);
3533         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3534             "Detected hba at address=%p.\n",
3535             ha);
3536
3537         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3538                 if (ha->fw_attributes & BIT_4) {
3539                         int prot = 0, guard;
3540
3541                         base_vha->flags.difdix_supported = 1;
3542                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3543                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3544                         if (ql2xprotmask)
3545                                 scsi_host_set_prot(host, ql2xprotmask);
3546                         else
3547                                 scsi_host_set_prot(host,
3548                                     prot | SHOST_DIF_TYPE1_PROTECTION
3549                                     | SHOST_DIF_TYPE2_PROTECTION
3550                                     | SHOST_DIF_TYPE3_PROTECTION
3551                                     | SHOST_DIX_TYPE1_PROTECTION
3552                                     | SHOST_DIX_TYPE2_PROTECTION
3553                                     | SHOST_DIX_TYPE3_PROTECTION);
3554
3555                         guard = SHOST_DIX_GUARD_CRC;
3556
3557                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3558                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3559                                 guard |= SHOST_DIX_GUARD_IP;
3560
3561                         if (ql2xprotguard)
3562                                 scsi_host_set_guard(host, ql2xprotguard);
3563                         else
3564                                 scsi_host_set_guard(host, guard);
3565                 } else
3566                         base_vha->flags.difdix_supported = 0;
3567         }
3568
3569         ha->isp_ops->enable_intrs(ha);
3570
3571         if (IS_QLAFX00(ha)) {
3572                 ret = qlafx00_fx_disc(base_vha,
3573                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3574                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3575                     QLA_SG_ALL : 128;
3576         }
3577
3578         ret = scsi_add_host(host, &pdev->dev);
3579         if (ret)
3580                 goto probe_failed;
3581
3582         base_vha->flags.init_done = 1;
3583         base_vha->flags.online = 1;
3584         ha->prev_minidump_failed = 0;
3585
3586         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3587             "Init done and hba is online.\n");
3588
3589         if (qla_ini_mode_enabled(base_vha) ||
3590                 qla_dual_mode_enabled(base_vha))
3591                 scsi_scan_host(host);
3592         else
3593                 ql_log(ql_log_info, base_vha, 0x0122,
3594                         "skipping scsi_scan_host() for non-initiator port\n");
3595
3596         qla2x00_alloc_sysfs_attr(base_vha);
3597
3598         if (IS_QLAFX00(ha)) {
3599                 ret = qlafx00_fx_disc(base_vha,
3600                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3601
3602                 /* Register system information */
3603                 ret =  qlafx00_fx_disc(base_vha,
3604                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3605         }
3606
3607         qla2x00_init_host_attr(base_vha);
3608
3609         qla2x00_dfs_setup(base_vha);
3610
3611         ql_log(ql_log_info, base_vha, 0x00fb,
3612             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3613         ql_log(ql_log_info, base_vha, 0x00fc,
3614             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3615             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info,
3616                                                        sizeof(pci_info)),
3617             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3618             base_vha->host_no,
3619             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3620
3621         qlt_add_target(ha, base_vha);
3622
3623         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3624
3625         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3626                 return -ENODEV;
3627
3628         return 0;
3629
3630 probe_failed:
3631         qla_enode_stop(base_vha);
3632         qla_edb_stop(base_vha);
3633         vfree(base_vha->scan.l);
3634         if (base_vha->gnl.l) {
3635                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3636                                 base_vha->gnl.l, base_vha->gnl.ldma);
3637                 base_vha->gnl.l = NULL;
3638         }
3639
3640         if (base_vha->timer_active)
3641                 qla2x00_stop_timer(base_vha);
3642         base_vha->flags.online = 0;
3643         if (ha->dpc_thread) {
3644                 struct task_struct *t = ha->dpc_thread;
3645
3646                 ha->dpc_thread = NULL;
3647                 kthread_stop(t);
3648         }
3649
3650         qla2x00_free_device(base_vha);
3651         scsi_host_put(base_vha->host);
3652         /*
3653          * Need to NULL out local req/rsp after
3654          * qla2x00_free_device => qla2x00_free_queues frees
3655          * what these are pointing to. Or else we'll
3656          * fall over below in qla2x00_free_req/rsp_que.
3657          */
3658         req = NULL;
3659         rsp = NULL;
3660
3661 probe_hw_failed:
3662         qla2x00_mem_free(ha);
3663         qla2x00_free_req_que(ha, req);
3664         qla2x00_free_rsp_que(ha, rsp);
3665         qla2x00_clear_drv_active(ha);
3666
3667 iospace_config_failed:
3668         if (IS_P3P_TYPE(ha)) {
3669                 if (!ha->nx_pcibase)
3670                         iounmap((device_reg_t *)ha->nx_pcibase);
3671                 if (!ql2xdbwr)
3672                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3673         } else {
3674                 if (ha->iobase)
3675                         iounmap(ha->iobase);
3676                 if (ha->cregbase)
3677                         iounmap(ha->cregbase);
3678         }
3679         pci_release_selected_regions(ha->pdev, ha->bars);
3680         kfree(ha);
3681
3682 disable_device:
3683         pci_disable_device(pdev);
3684         return ret;
3685 }
3686
3687 static void __qla_set_remove_flag(scsi_qla_host_t *base_vha)
3688 {
3689         scsi_qla_host_t *vp;
3690         unsigned long flags;
3691         struct qla_hw_data *ha;
3692
3693         if (!base_vha)
3694                 return;
3695
3696         ha = base_vha->hw;
3697
3698         spin_lock_irqsave(&ha->vport_slock, flags);
3699         list_for_each_entry(vp, &ha->vp_list, list)
3700                 set_bit(PFLG_DRIVER_REMOVING, &vp->pci_flags);
3701
3702         /*
3703          * Indicate device removal to prevent future board_disable
3704          * and wait until any pending board_disable has completed.
3705          */
3706         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3707         spin_unlock_irqrestore(&ha->vport_slock, flags);
3708 }
3709
3710 static void
3711 qla2x00_shutdown(struct pci_dev *pdev)
3712 {
3713         scsi_qla_host_t *vha;
3714         struct qla_hw_data  *ha;
3715
3716         vha = pci_get_drvdata(pdev);
3717         ha = vha->hw;
3718
3719         ql_log(ql_log_info, vha, 0xfffa,
3720                 "Adapter shutdown\n");
3721
3722         /*
3723          * Prevent future board_disable and wait
3724          * until any pending board_disable has completed.
3725          */
3726         __qla_set_remove_flag(vha);
3727         cancel_work_sync(&ha->board_disable);
3728
3729         if (!atomic_read(&pdev->enable_cnt))
3730                 return;
3731
3732         /* Notify ISPFX00 firmware */
3733         if (IS_QLAFX00(ha))
3734                 qlafx00_driver_shutdown(vha, 20);
3735
3736         /* Turn-off FCE trace */
3737         if (ha->flags.fce_enabled) {
3738                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3739                 ha->flags.fce_enabled = 0;
3740         }
3741
3742         /* Turn-off EFT trace */
3743         if (ha->eft)
3744                 qla2x00_disable_eft_trace(vha);
3745
3746         if (IS_QLA25XX(ha) ||  IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3747             IS_QLA28XX(ha)) {
3748                 if (ha->flags.fw_started)
3749                         qla2x00_abort_isp_cleanup(vha);
3750         } else {
3751                 /* Stop currently executing firmware. */
3752                 qla2x00_try_to_stop_firmware(vha);
3753         }
3754
3755         /* Disable timer */
3756         if (vha->timer_active)
3757                 qla2x00_stop_timer(vha);
3758
3759         /* Turn adapter off line */
3760         vha->flags.online = 0;
3761
3762         /* turn-off interrupts on the card */
3763         if (ha->interrupts_on) {
3764                 vha->flags.init_done = 0;
3765                 ha->isp_ops->disable_intrs(ha);
3766         }
3767
3768         qla2x00_free_irqs(vha);
3769
3770         qla2x00_free_fw_dump(ha);
3771
3772         pci_disable_device(pdev);
3773         ql_log(ql_log_info, vha, 0xfffe,
3774                 "Adapter shutdown successfully.\n");
3775 }
3776
3777 /* Deletes all the virtual ports for a given ha */
3778 static void
3779 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3780 {
3781         scsi_qla_host_t *vha;
3782         unsigned long flags;
3783
3784         mutex_lock(&ha->vport_lock);
3785         while (ha->cur_vport_count) {
3786                 spin_lock_irqsave(&ha->vport_slock, flags);
3787
3788                 BUG_ON(base_vha->list.next == &ha->vp_list);
3789                 /* This assumes first entry in ha->vp_list is always base vha */
3790                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3791                 scsi_host_get(vha->host);
3792
3793                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3794                 mutex_unlock(&ha->vport_lock);
3795
3796                 qla_nvme_delete(vha);
3797
3798                 fc_vport_terminate(vha->fc_vport);
3799                 scsi_host_put(vha->host);
3800
3801                 mutex_lock(&ha->vport_lock);
3802         }
3803         mutex_unlock(&ha->vport_lock);
3804 }
3805
3806 /* Stops all deferred work threads */
3807 static void
3808 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3809 {
3810         /* Cancel all work and destroy DPC workqueues */
3811         if (ha->dpc_lp_wq) {
3812                 cancel_work_sync(&ha->idc_aen);
3813                 destroy_workqueue(ha->dpc_lp_wq);
3814                 ha->dpc_lp_wq = NULL;
3815         }
3816
3817         if (ha->dpc_hp_wq) {
3818                 cancel_work_sync(&ha->nic_core_reset);
3819                 cancel_work_sync(&ha->idc_state_handler);
3820                 cancel_work_sync(&ha->nic_core_unrecoverable);
3821                 destroy_workqueue(ha->dpc_hp_wq);
3822                 ha->dpc_hp_wq = NULL;
3823         }
3824
3825         /* Kill the kernel thread for this host */
3826         if (ha->dpc_thread) {
3827                 struct task_struct *t = ha->dpc_thread;
3828
3829                 /*
3830                  * qla2xxx_wake_dpc checks for ->dpc_thread
3831                  * so we need to zero it out.
3832                  */
3833                 ha->dpc_thread = NULL;
3834                 kthread_stop(t);
3835         }
3836 }
3837
3838 static void
3839 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3840 {
3841         if (IS_QLA82XX(ha)) {
3842
3843                 iounmap((device_reg_t *)ha->nx_pcibase);
3844                 if (!ql2xdbwr)
3845                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3846         } else {
3847                 if (ha->iobase)
3848                         iounmap(ha->iobase);
3849
3850                 if (ha->cregbase)
3851                         iounmap(ha->cregbase);
3852
3853                 if (ha->mqiobase)
3854                         iounmap(ha->mqiobase);
3855
3856                 if (ha->msixbase)
3857                         iounmap(ha->msixbase);
3858         }
3859 }
3860
3861 static void
3862 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3863 {
3864         if (IS_QLA8044(ha)) {
3865                 qla8044_idc_lock(ha);
3866                 qla8044_clear_drv_active(ha);
3867                 qla8044_idc_unlock(ha);
3868         } else if (IS_QLA82XX(ha)) {
3869                 qla82xx_idc_lock(ha);
3870                 qla82xx_clear_drv_active(ha);
3871                 qla82xx_idc_unlock(ha);
3872         }
3873 }
3874
3875 static void
3876 qla2x00_remove_one(struct pci_dev *pdev)
3877 {
3878         scsi_qla_host_t *base_vha;
3879         struct qla_hw_data  *ha;
3880
3881         base_vha = pci_get_drvdata(pdev);
3882         ha = base_vha->hw;
3883         ql_log(ql_log_info, base_vha, 0xb079,
3884             "Removing driver\n");
3885         __qla_set_remove_flag(base_vha);
3886         cancel_work_sync(&ha->board_disable);
3887
3888         /*
3889          * If the PCI device is disabled then there was a PCI-disconnect and
3890          * qla2x00_disable_board_on_pci_error has taken care of most of the
3891          * resources.
3892          */
3893         if (!atomic_read(&pdev->enable_cnt)) {
3894                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3895                     base_vha->gnl.l, base_vha->gnl.ldma);
3896                 base_vha->gnl.l = NULL;
3897                 scsi_host_put(base_vha->host);
3898                 kfree(ha);
3899                 pci_set_drvdata(pdev, NULL);
3900                 return;
3901         }
3902         qla2x00_wait_for_hba_ready(base_vha);
3903
3904         /*
3905          * if UNLOADING flag is already set, then continue unload,
3906          * where it was set first.
3907          */
3908         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
3909                 return;
3910
3911         if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3912             IS_QLA28XX(ha)) {
3913                 if (ha->flags.fw_started)
3914                         qla2x00_abort_isp_cleanup(base_vha);
3915         } else if (!IS_QLAFX00(ha)) {
3916                 if (IS_QLA8031(ha)) {
3917                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3918                             "Clearing fcoe driver presence.\n");
3919                         if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3920                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3921                                     "Error while clearing DRV-Presence.\n");
3922                 }
3923
3924                 qla2x00_try_to_stop_firmware(base_vha);
3925         }
3926
3927         qla2x00_wait_for_sess_deletion(base_vha);
3928
3929         qla_nvme_delete(base_vha);
3930
3931         dma_free_coherent(&ha->pdev->dev,
3932                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3933
3934         base_vha->gnl.l = NULL;
3935         qla_enode_stop(base_vha);
3936         qla_edb_stop(base_vha);
3937
3938         vfree(base_vha->scan.l);
3939
3940         if (IS_QLAFX00(ha))
3941                 qlafx00_driver_shutdown(base_vha, 20);
3942
3943         qla2x00_delete_all_vps(ha, base_vha);
3944
3945         qla2x00_dfs_remove(base_vha);
3946
3947         qla84xx_put_chip(base_vha);
3948
3949         /* Disable timer */
3950         if (base_vha->timer_active)
3951                 qla2x00_stop_timer(base_vha);
3952
3953         base_vha->flags.online = 0;
3954
3955         /* free DMA memory */
3956         if (ha->exlogin_buf)
3957                 qla2x00_free_exlogin_buffer(ha);
3958
3959         /* free DMA memory */
3960         if (ha->exchoffld_buf)
3961                 qla2x00_free_exchoffld_buffer(ha);
3962
3963         qla2x00_destroy_deferred_work(ha);
3964
3965         qlt_remove_target(ha, base_vha);
3966
3967         qla2x00_free_sysfs_attr(base_vha, true);
3968
3969         fc_remove_host(base_vha->host);
3970
3971         scsi_remove_host(base_vha->host);
3972
3973         qla2x00_free_device(base_vha);
3974
3975         qla2x00_clear_drv_active(ha);
3976
3977         scsi_host_put(base_vha->host);
3978
3979         qla2x00_unmap_iobases(ha);
3980
3981         pci_release_selected_regions(ha->pdev, ha->bars);
3982         kfree(ha);
3983
3984         pci_disable_device(pdev);
3985 }
3986
3987 static inline void
3988 qla24xx_free_purex_list(struct purex_list *list)
3989 {
3990         struct purex_item *item, *next;
3991         ulong flags;
3992
3993         spin_lock_irqsave(&list->lock, flags);
3994         list_for_each_entry_safe(item, next, &list->head, list) {
3995                 list_del(&item->list);
3996                 if (item == &item->vha->default_item)
3997                         continue;
3998                 kfree(item);
3999         }
4000         spin_unlock_irqrestore(&list->lock, flags);
4001 }
4002
4003 static void
4004 qla2x00_free_device(scsi_qla_host_t *vha)
4005 {
4006         struct qla_hw_data *ha = vha->hw;
4007
4008         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
4009
4010         /* Disable timer */
4011         if (vha->timer_active)
4012                 qla2x00_stop_timer(vha);
4013
4014         qla25xx_delete_queues(vha);
4015         vha->flags.online = 0;
4016
4017         /* turn-off interrupts on the card */
4018         if (ha->interrupts_on) {
4019                 vha->flags.init_done = 0;
4020                 ha->isp_ops->disable_intrs(ha);
4021         }
4022
4023         qla2x00_free_fcports(vha);
4024
4025         qla2x00_free_irqs(vha);
4026
4027         /* Flush the work queue and remove it */
4028         if (ha->wq) {
4029                 destroy_workqueue(ha->wq);
4030                 ha->wq = NULL;
4031         }
4032
4033
4034         qla24xx_free_purex_list(&vha->purex_list);
4035
4036         qla2x00_mem_free(ha);
4037
4038         qla82xx_md_free(vha);
4039
4040         qla_edif_sadb_release_free_pool(ha);
4041         qla_edif_sadb_release(ha);
4042
4043         qla2x00_free_queues(ha);
4044 }
4045
4046 void qla2x00_free_fcports(struct scsi_qla_host *vha)
4047 {
4048         fc_port_t *fcport, *tfcport;
4049
4050         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list)
4051                 qla2x00_free_fcport(fcport);
4052 }
4053
4054 static inline void
4055 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport)
4056 {
4057         int now;
4058
4059         if (!fcport->rport)
4060                 return;
4061
4062         if (fcport->rport) {
4063                 ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
4064                     "%s %8phN. rport %p roles %x\n",
4065                     __func__, fcport->port_name, fcport->rport,
4066                     fcport->rport->roles);
4067                 fc_remote_port_delete(fcport->rport);
4068         }
4069         qlt_do_generation_tick(vha, &now);
4070 }
4071
4072 /*
4073  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
4074  *
4075  * Input: ha = adapter block pointer.  fcport = port structure pointer.
4076  *
4077  * Return: None.
4078  *
4079  * Context:
4080  */
4081 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
4082     int do_login)
4083 {
4084         if (IS_QLAFX00(vha->hw)) {
4085                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
4086                 qla2x00_schedule_rport_del(vha, fcport);
4087                 return;
4088         }
4089
4090         if (atomic_read(&fcport->state) == FCS_ONLINE &&
4091             vha->vp_idx == fcport->vha->vp_idx) {
4092                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
4093                 qla2x00_schedule_rport_del(vha, fcport);
4094         }
4095
4096         /*
4097          * We may need to retry the login, so don't change the state of the
4098          * port but do the retries.
4099          */
4100         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
4101                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
4102
4103         if (!do_login)
4104                 return;
4105
4106         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4107 }
4108
4109 void
4110 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha)
4111 {
4112         fc_port_t *fcport;
4113
4114         ql_dbg(ql_dbg_disc, vha, 0x20f1,
4115             "Mark all dev lost\n");
4116
4117         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4118                 if (ql2xfc2target &&
4119                     fcport->loop_id != FC_NO_LOOP_ID &&
4120                     (fcport->flags & FCF_FCP2_DEVICE) &&
4121                     fcport->port_type == FCT_TARGET &&
4122                     !qla2x00_reset_active(vha)) {
4123                         ql_dbg(ql_dbg_disc, vha, 0x211a,
4124                                "Delaying session delete for FCP2 flags 0x%x port_type = 0x%x port_id=%06x %phC",
4125                                fcport->flags, fcport->port_type,
4126                                fcport->d_id.b24, fcport->port_name);
4127                         continue;
4128                 }
4129                 fcport->scan_state = 0;
4130                 qlt_schedule_sess_for_deletion(fcport);
4131         }
4132 }
4133
4134 static void qla2x00_set_reserved_loop_ids(struct qla_hw_data *ha)
4135 {
4136         int i;
4137
4138         if (IS_FWI2_CAPABLE(ha))
4139                 return;
4140
4141         for (i = 0; i < SNS_FIRST_LOOP_ID; i++)
4142                 set_bit(i, ha->loop_id_map);
4143         set_bit(MANAGEMENT_SERVER, ha->loop_id_map);
4144         set_bit(BROADCAST, ha->loop_id_map);
4145 }
4146
4147 /*
4148 * qla2x00_mem_alloc
4149 *      Allocates adapter memory.
4150 *
4151 * Returns:
4152 *      0  = success.
4153 *      !0  = failure.
4154 */
4155 static int
4156 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
4157         struct req_que **req, struct rsp_que **rsp)
4158 {
4159         char    name[16];
4160         int rc;
4161
4162         if (QLA_TGT_MODE_ENABLED() || EDIF_CAP(ha)) {
4163                 ha->vp_map = kcalloc(MAX_MULTI_ID_FABRIC, sizeof(struct qla_vp_map), GFP_KERNEL);
4164                 if (!ha->vp_map)
4165                         goto fail;
4166         }
4167
4168         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
4169                 &ha->init_cb_dma, GFP_KERNEL);
4170         if (!ha->init_cb)
4171                 goto fail_free_vp_map;
4172
4173         rc = btree_init32(&ha->host_map);
4174         if (rc)
4175                 goto fail_free_init_cb;
4176
4177         if (qlt_mem_alloc(ha) < 0)
4178                 goto fail_free_btree;
4179
4180         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
4181                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
4182         if (!ha->gid_list)
4183                 goto fail_free_tgt_mem;
4184
4185         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
4186         if (!ha->srb_mempool)
4187                 goto fail_free_gid_list;
4188
4189         if (IS_P3P_TYPE(ha) || IS_QLA27XX(ha) || (ql2xsecenable && IS_QLA28XX(ha))) {
4190                 /* Allocate cache for CT6 Ctx. */
4191                 if (!ctx_cachep) {
4192                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
4193                                 sizeof(struct ct6_dsd), 0,
4194                                 SLAB_HWCACHE_ALIGN, NULL);
4195                         if (!ctx_cachep)
4196                                 goto fail_free_srb_mempool;
4197                 }
4198                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
4199                         ctx_cachep);
4200                 if (!ha->ctx_mempool)
4201                         goto fail_free_srb_mempool;
4202                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
4203                     "ctx_cachep=%p ctx_mempool=%p.\n",
4204                     ctx_cachep, ha->ctx_mempool);
4205         }
4206
4207         /* Get memory for cached NVRAM */
4208         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
4209         if (!ha->nvram)
4210                 goto fail_free_ctx_mempool;
4211
4212         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
4213                 ha->pdev->device);
4214         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4215                 DMA_POOL_SIZE, 8, 0);
4216         if (!ha->s_dma_pool)
4217                 goto fail_free_nvram;
4218
4219         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
4220             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
4221             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
4222
4223         if (IS_P3P_TYPE(ha) || ql2xenabledif || (IS_QLA28XX(ha) && ql2xsecenable)) {
4224                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4225                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
4226                 if (!ha->dl_dma_pool) {
4227                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
4228                             "Failed to allocate memory for dl_dma_pool.\n");
4229                         goto fail_s_dma_pool;
4230                 }
4231
4232                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4233                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
4234                 if (!ha->fcp_cmnd_dma_pool) {
4235                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
4236                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
4237                         goto fail_dl_dma_pool;
4238                 }
4239
4240                 if (ql2xenabledif) {
4241                         u64 bufsize = DIF_BUNDLING_DMA_POOL_SIZE;
4242                         struct dsd_dma *dsd, *nxt;
4243                         uint i;
4244                         /* Creata a DMA pool of buffers for DIF bundling */
4245                         ha->dif_bundl_pool = dma_pool_create(name,
4246                             &ha->pdev->dev, DIF_BUNDLING_DMA_POOL_SIZE, 8, 0);
4247                         if (!ha->dif_bundl_pool) {
4248                                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4249                                     "%s: failed create dif_bundl_pool\n",
4250                                     __func__);
4251                                 goto fail_dif_bundl_dma_pool;
4252                         }
4253
4254                         INIT_LIST_HEAD(&ha->pool.good.head);
4255                         INIT_LIST_HEAD(&ha->pool.unusable.head);
4256                         ha->pool.good.count = 0;
4257                         ha->pool.unusable.count = 0;
4258                         for (i = 0; i < 128; i++) {
4259                                 dsd = kzalloc(sizeof(*dsd), GFP_ATOMIC);
4260                                 if (!dsd) {
4261                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4262                                             0xe0ee, "%s: failed alloc dsd\n",
4263                                             __func__);
4264                                         return -ENOMEM;
4265                                 }
4266                                 ha->dif_bundle_kallocs++;
4267
4268                                 dsd->dsd_addr = dma_pool_alloc(
4269                                     ha->dif_bundl_pool, GFP_ATOMIC,
4270                                     &dsd->dsd_list_dma);
4271                                 if (!dsd->dsd_addr) {
4272                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4273                                             0xe0ee,
4274                                             "%s: failed alloc ->dsd_addr\n",
4275                                             __func__);
4276                                         kfree(dsd);
4277                                         ha->dif_bundle_kallocs--;
4278                                         continue;
4279                                 }
4280                                 ha->dif_bundle_dma_allocs++;
4281
4282                                 /*
4283                                  * if DMA buffer crosses 4G boundary,
4284                                  * put it on bad list
4285                                  */
4286                                 if (MSD(dsd->dsd_list_dma) ^
4287                                     MSD(dsd->dsd_list_dma + bufsize)) {
4288                                         list_add_tail(&dsd->list,
4289                                             &ha->pool.unusable.head);
4290                                         ha->pool.unusable.count++;
4291                                 } else {
4292                                         list_add_tail(&dsd->list,
4293                                             &ha->pool.good.head);
4294                                         ha->pool.good.count++;
4295                                 }
4296                         }
4297
4298                         /* return the good ones back to the pool */
4299                         list_for_each_entry_safe(dsd, nxt,
4300                             &ha->pool.good.head, list) {
4301                                 list_del(&dsd->list);
4302                                 dma_pool_free(ha->dif_bundl_pool,
4303                                     dsd->dsd_addr, dsd->dsd_list_dma);
4304                                 ha->dif_bundle_dma_allocs--;
4305                                 kfree(dsd);
4306                                 ha->dif_bundle_kallocs--;
4307                         }
4308
4309                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4310                             "%s: dif dma pool (good=%u unusable=%u)\n",
4311                             __func__, ha->pool.good.count,
4312                             ha->pool.unusable.count);
4313                 }
4314
4315                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
4316                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p dif_bundl_pool=%p.\n",
4317                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool,
4318                     ha->dif_bundl_pool);
4319         }
4320
4321         /* Allocate memory for SNS commands */
4322         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4323         /* Get consistent memory allocated for SNS commands */
4324                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
4325                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
4326                 if (!ha->sns_cmd)
4327                         goto fail_dma_pool;
4328                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
4329                     "sns_cmd: %p.\n", ha->sns_cmd);
4330         } else {
4331         /* Get consistent memory allocated for MS IOCB */
4332                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4333                         &ha->ms_iocb_dma);
4334                 if (!ha->ms_iocb)
4335                         goto fail_dma_pool;
4336         /* Get consistent memory allocated for CT SNS commands */
4337                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
4338                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
4339                 if (!ha->ct_sns)
4340                         goto fail_free_ms_iocb;
4341                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
4342                     "ms_iocb=%p ct_sns=%p.\n",
4343                     ha->ms_iocb, ha->ct_sns);
4344         }
4345
4346         /* Allocate memory for request ring */
4347         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
4348         if (!*req) {
4349                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
4350                     "Failed to allocate memory for req.\n");
4351                 goto fail_req;
4352         }
4353         (*req)->length = req_len;
4354         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
4355                 ((*req)->length + 1) * sizeof(request_t),
4356                 &(*req)->dma, GFP_KERNEL);
4357         if (!(*req)->ring) {
4358                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
4359                     "Failed to allocate memory for req_ring.\n");
4360                 goto fail_req_ring;
4361         }
4362         /* Allocate memory for response ring */
4363         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
4364         if (!*rsp) {
4365                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
4366                     "Failed to allocate memory for rsp.\n");
4367                 goto fail_rsp;
4368         }
4369         (*rsp)->hw = ha;
4370         (*rsp)->length = rsp_len;
4371         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
4372                 ((*rsp)->length + 1) * sizeof(response_t),
4373                 &(*rsp)->dma, GFP_KERNEL);
4374         if (!(*rsp)->ring) {
4375                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
4376                     "Failed to allocate memory for rsp_ring.\n");
4377                 goto fail_rsp_ring;
4378         }
4379         (*req)->rsp = *rsp;
4380         (*rsp)->req = *req;
4381         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4382             "req=%p req->length=%d req->ring=%p rsp=%p "
4383             "rsp->length=%d rsp->ring=%p.\n",
4384             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4385             (*rsp)->ring);
4386         /* Allocate memory for NVRAM data for vports */
4387         if (ha->nvram_npiv_size) {
4388                 ha->npiv_info = kcalloc(ha->nvram_npiv_size,
4389                                         sizeof(struct qla_npiv_entry),
4390                                         GFP_KERNEL);
4391                 if (!ha->npiv_info) {
4392                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4393                             "Failed to allocate memory for npiv_info.\n");
4394                         goto fail_npiv_info;
4395                 }
4396         } else
4397                 ha->npiv_info = NULL;
4398
4399         /* Get consistent memory allocated for EX-INIT-CB. */
4400         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
4401             IS_QLA28XX(ha)) {
4402                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4403                     &ha->ex_init_cb_dma);
4404                 if (!ha->ex_init_cb)
4405                         goto fail_ex_init_cb;
4406                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4407                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4408         }
4409
4410         /* Get consistent memory allocated for Special Features-CB. */
4411         if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
4412                 ha->sf_init_cb = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL,
4413                                                 &ha->sf_init_cb_dma);
4414                 if (!ha->sf_init_cb)
4415                         goto fail_sf_init_cb;
4416                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0199,
4417                            "sf_init_cb=%p.\n", ha->sf_init_cb);
4418         }
4419
4420
4421         /* Get consistent memory allocated for Async Port-Database. */
4422         if (!IS_FWI2_CAPABLE(ha)) {
4423                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4424                         &ha->async_pd_dma);
4425                 if (!ha->async_pd)
4426                         goto fail_async_pd;
4427                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4428                     "async_pd=%p.\n", ha->async_pd);
4429         }
4430
4431         INIT_LIST_HEAD(&ha->vp_list);
4432
4433         /* Allocate memory for our loop_id bitmap */
4434         ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE),
4435                                   sizeof(long),
4436                                   GFP_KERNEL);
4437         if (!ha->loop_id_map)
4438                 goto fail_loop_id_map;
4439         else {
4440                 qla2x00_set_reserved_loop_ids(ha);
4441                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4442                     "loop_id_map=%p.\n", ha->loop_id_map);
4443         }
4444
4445         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4446             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4447         if (!ha->sfp_data) {
4448                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4449                     "Unable to allocate memory for SFP read-data.\n");
4450                 goto fail_sfp_data;
4451         }
4452
4453         ha->flt = dma_alloc_coherent(&ha->pdev->dev,
4454             sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE, &ha->flt_dma,
4455             GFP_KERNEL);
4456         if (!ha->flt) {
4457                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4458                     "Unable to allocate memory for FLT.\n");
4459                 goto fail_flt_buffer;
4460         }
4461
4462         /* allocate the purex dma pool */
4463         ha->purex_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4464             ELS_MAX_PAYLOAD, 8, 0);
4465
4466         if (!ha->purex_dma_pool) {
4467                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4468                     "Unable to allocate purex_dma_pool.\n");
4469                 goto fail_flt;
4470         }
4471
4472         ha->elsrej.size = sizeof(struct fc_els_ls_rjt) + 16;
4473         ha->elsrej.c = dma_alloc_coherent(&ha->pdev->dev,
4474                                           ha->elsrej.size,
4475                                           &ha->elsrej.cdma,
4476                                           GFP_KERNEL);
4477         if (!ha->elsrej.c) {
4478                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0xffff,
4479                     "Alloc failed for els reject cmd.\n");
4480                 goto fail_elsrej;
4481         }
4482         ha->elsrej.c->er_cmd = ELS_LS_RJT;
4483         ha->elsrej.c->er_reason = ELS_RJT_LOGIC;
4484         ha->elsrej.c->er_explan = ELS_EXPL_UNAB_DATA;
4485
4486         ha->lsrjt.size = sizeof(struct fcnvme_ls_rjt);
4487         ha->lsrjt.c = dma_alloc_coherent(&ha->pdev->dev, ha->lsrjt.size,
4488                         &ha->lsrjt.cdma, GFP_KERNEL);
4489         if (!ha->lsrjt.c) {
4490                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0xffff,
4491                            "Alloc failed for nvme fc reject cmd.\n");
4492                 goto fail_lsrjt;
4493         }
4494
4495         return 0;
4496
4497 fail_lsrjt:
4498         dma_free_coherent(&ha->pdev->dev, ha->elsrej.size,
4499                           ha->elsrej.c, ha->elsrej.cdma);
4500 fail_elsrej:
4501         dma_pool_destroy(ha->purex_dma_pool);
4502 fail_flt:
4503         dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4504             ha->flt, ha->flt_dma);
4505
4506 fail_flt_buffer:
4507         dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4508             ha->sfp_data, ha->sfp_data_dma);
4509 fail_sfp_data:
4510         kfree(ha->loop_id_map);
4511 fail_loop_id_map:
4512         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4513 fail_async_pd:
4514         dma_pool_free(ha->s_dma_pool, ha->sf_init_cb, ha->sf_init_cb_dma);
4515 fail_sf_init_cb:
4516         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4517 fail_ex_init_cb:
4518         kfree(ha->npiv_info);
4519 fail_npiv_info:
4520         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4521                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4522         (*rsp)->ring = NULL;
4523         (*rsp)->dma = 0;
4524 fail_rsp_ring:
4525         kfree(*rsp);
4526         *rsp = NULL;
4527 fail_rsp:
4528         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4529                 sizeof(request_t), (*req)->ring, (*req)->dma);
4530         (*req)->ring = NULL;
4531         (*req)->dma = 0;
4532 fail_req_ring:
4533         kfree(*req);
4534         *req = NULL;
4535 fail_req:
4536         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4537                 ha->ct_sns, ha->ct_sns_dma);
4538         ha->ct_sns = NULL;
4539         ha->ct_sns_dma = 0;
4540 fail_free_ms_iocb:
4541         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4542         ha->ms_iocb = NULL;
4543         ha->ms_iocb_dma = 0;
4544
4545         if (ha->sns_cmd)
4546                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4547                     ha->sns_cmd, ha->sns_cmd_dma);
4548 fail_dma_pool:
4549         if (ql2xenabledif) {
4550                 struct dsd_dma *dsd, *nxt;
4551
4552                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4553                     list) {
4554                         list_del(&dsd->list);
4555                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4556                             dsd->dsd_list_dma);
4557                         ha->dif_bundle_dma_allocs--;
4558                         kfree(dsd);
4559                         ha->dif_bundle_kallocs--;
4560                         ha->pool.unusable.count--;
4561                 }
4562                 dma_pool_destroy(ha->dif_bundl_pool);
4563                 ha->dif_bundl_pool = NULL;
4564         }
4565
4566 fail_dif_bundl_dma_pool:
4567         if (IS_QLA82XX(ha) || ql2xenabledif) {
4568                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4569                 ha->fcp_cmnd_dma_pool = NULL;
4570         }
4571 fail_dl_dma_pool:
4572         if (IS_QLA82XX(ha) || ql2xenabledif) {
4573                 dma_pool_destroy(ha->dl_dma_pool);
4574                 ha->dl_dma_pool = NULL;
4575         }
4576 fail_s_dma_pool:
4577         dma_pool_destroy(ha->s_dma_pool);
4578         ha->s_dma_pool = NULL;
4579 fail_free_nvram:
4580         kfree(ha->nvram);
4581         ha->nvram = NULL;
4582 fail_free_ctx_mempool:
4583         mempool_destroy(ha->ctx_mempool);
4584         ha->ctx_mempool = NULL;
4585 fail_free_srb_mempool:
4586         mempool_destroy(ha->srb_mempool);
4587         ha->srb_mempool = NULL;
4588 fail_free_gid_list:
4589         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4590         ha->gid_list,
4591         ha->gid_list_dma);
4592         ha->gid_list = NULL;
4593         ha->gid_list_dma = 0;
4594 fail_free_tgt_mem:
4595         qlt_mem_free(ha);
4596 fail_free_btree:
4597         btree_destroy32(&ha->host_map);
4598 fail_free_init_cb:
4599         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4600         ha->init_cb_dma);
4601         ha->init_cb = NULL;
4602         ha->init_cb_dma = 0;
4603 fail_free_vp_map:
4604         kfree(ha->vp_map);
4605 fail:
4606         ql_log(ql_log_fatal, NULL, 0x0030,
4607             "Memory allocation failure.\n");
4608         return -ENOMEM;
4609 }
4610
4611 int
4612 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4613 {
4614         int rval;
4615         uint16_t        size, max_cnt;
4616         uint32_t temp;
4617         struct qla_hw_data *ha = vha->hw;
4618
4619         /* Return if we don't need to alloacate any extended logins */
4620         if (ql2xexlogins <= MAX_FIBRE_DEVICES_2400)
4621                 return QLA_SUCCESS;
4622
4623         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4624                 return QLA_SUCCESS;
4625
4626         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4627         max_cnt = 0;
4628         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4629         if (rval != QLA_SUCCESS) {
4630                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4631                     "Failed to get exlogin status.\n");
4632                 return rval;
4633         }
4634
4635         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4636         temp *= size;
4637
4638         if (temp != ha->exlogin_size) {
4639                 qla2x00_free_exlogin_buffer(ha);
4640                 ha->exlogin_size = temp;
4641
4642                 ql_log(ql_log_info, vha, 0xd024,
4643                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4644                     max_cnt, size, temp);
4645
4646                 ql_log(ql_log_info, vha, 0xd025,
4647                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4648
4649                 /* Get consistent memory for extended logins */
4650                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4651                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4652                 if (!ha->exlogin_buf) {
4653                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4654                     "Failed to allocate memory for exlogin_buf_dma.\n");
4655                         return -ENOMEM;
4656                 }
4657         }
4658
4659         /* Now configure the dma buffer */
4660         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4661         if (rval) {
4662                 ql_log(ql_log_fatal, vha, 0xd033,
4663                     "Setup extended login buffer  ****FAILED****.\n");
4664                 qla2x00_free_exlogin_buffer(ha);
4665         }
4666
4667         return rval;
4668 }
4669
4670 /*
4671 * qla2x00_free_exlogin_buffer
4672 *
4673 * Input:
4674 *       ha = adapter block pointer
4675 */
4676 void
4677 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4678 {
4679         if (ha->exlogin_buf) {
4680                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4681                     ha->exlogin_buf, ha->exlogin_buf_dma);
4682                 ha->exlogin_buf = NULL;
4683                 ha->exlogin_size = 0;
4684         }
4685 }
4686
4687 static void
4688 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4689 {
4690         u32 temp;
4691         struct init_cb_81xx *icb = (struct init_cb_81xx *)&vha->hw->init_cb;
4692         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4693
4694         if (max_cnt > vha->hw->max_exchg)
4695                 max_cnt = vha->hw->max_exchg;
4696
4697         if (qla_ini_mode_enabled(vha)) {
4698                 if (vha->ql2xiniexchg > max_cnt)
4699                         vha->ql2xiniexchg = max_cnt;
4700
4701                 if (vha->ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4702                         *ret_cnt = vha->ql2xiniexchg;
4703
4704         } else if (qla_tgt_mode_enabled(vha)) {
4705                 if (vha->ql2xexchoffld > max_cnt) {
4706                         vha->ql2xexchoffld = max_cnt;
4707                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4708                 }
4709
4710                 if (vha->ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4711                         *ret_cnt = vha->ql2xexchoffld;
4712         } else if (qla_dual_mode_enabled(vha)) {
4713                 temp = vha->ql2xiniexchg + vha->ql2xexchoffld;
4714                 if (temp > max_cnt) {
4715                         vha->ql2xiniexchg -= (temp - max_cnt)/2;
4716                         vha->ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4717                         temp = max_cnt;
4718                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4719                 }
4720
4721                 if (temp > FW_DEF_EXCHANGES_CNT)
4722                         *ret_cnt = temp;
4723         }
4724 }
4725
4726 int
4727 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4728 {
4729         int rval;
4730         u16     size, max_cnt;
4731         u32 actual_cnt, totsz;
4732         struct qla_hw_data *ha = vha->hw;
4733
4734         if (!ha->flags.exchoffld_enabled)
4735                 return QLA_SUCCESS;
4736
4737         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4738                 return QLA_SUCCESS;
4739
4740         max_cnt = 0;
4741         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4742         if (rval != QLA_SUCCESS) {
4743                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4744                     "Failed to get exlogin status.\n");
4745                 return rval;
4746         }
4747
4748         qla2x00_number_of_exch(vha, &actual_cnt, max_cnt);
4749         ql_log(ql_log_info, vha, 0xd014,
4750             "Actual exchange offload count: %d.\n", actual_cnt);
4751
4752         totsz = actual_cnt * size;
4753
4754         if (totsz != ha->exchoffld_size) {
4755                 qla2x00_free_exchoffld_buffer(ha);
4756                 if (actual_cnt <= FW_DEF_EXCHANGES_CNT) {
4757                         ha->exchoffld_size = 0;
4758                         ha->flags.exchoffld_enabled = 0;
4759                         return QLA_SUCCESS;
4760                 }
4761
4762                 ha->exchoffld_size = totsz;
4763
4764                 ql_log(ql_log_info, vha, 0xd016,
4765                     "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4766                     max_cnt, actual_cnt, size, totsz);
4767
4768                 ql_log(ql_log_info, vha, 0xd017,
4769                     "Exchange Buffers requested size = 0x%x\n",
4770                     ha->exchoffld_size);
4771
4772                 /* Get consistent memory for extended logins */
4773                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4774                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4775                 if (!ha->exchoffld_buf) {
4776                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4777                         "Failed to allocate memory for Exchange Offload.\n");
4778
4779                         if (ha->max_exchg >
4780                             (FW_DEF_EXCHANGES_CNT + REDUCE_EXCHANGES_CNT)) {
4781                                 ha->max_exchg -= REDUCE_EXCHANGES_CNT;
4782                         } else if (ha->max_exchg >
4783                             (FW_DEF_EXCHANGES_CNT + 512)) {
4784                                 ha->max_exchg -= 512;
4785                         } else {
4786                                 ha->flags.exchoffld_enabled = 0;
4787                                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4788                                     "Disabling Exchange offload due to lack of memory\n");
4789                         }
4790                         ha->exchoffld_size = 0;
4791
4792                         return -ENOMEM;
4793                 }
4794         } else if (!ha->exchoffld_buf || (actual_cnt <= FW_DEF_EXCHANGES_CNT)) {
4795                 /* pathological case */
4796                 qla2x00_free_exchoffld_buffer(ha);
4797                 ha->exchoffld_size = 0;
4798                 ha->flags.exchoffld_enabled = 0;
4799                 ql_log(ql_log_info, vha, 0xd016,
4800                     "Exchange offload not enable: offld size=%d, actual count=%d entry sz=0x%x, total sz=0x%x.\n",
4801                     ha->exchoffld_size, actual_cnt, size, totsz);
4802                 return 0;
4803         }
4804
4805         /* Now configure the dma buffer */
4806         rval = qla_set_exchoffld_mem_cfg(vha);
4807         if (rval) {
4808                 ql_log(ql_log_fatal, vha, 0xd02e,
4809                     "Setup exchange offload buffer ****FAILED****.\n");
4810                 qla2x00_free_exchoffld_buffer(ha);
4811         } else {
4812                 /* re-adjust number of target exchange */
4813                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4814
4815                 if (qla_ini_mode_enabled(vha))
4816                         icb->exchange_count = 0;
4817                 else
4818                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4819         }
4820
4821         return rval;
4822 }
4823
4824 /*
4825 * qla2x00_free_exchoffld_buffer
4826 *
4827 * Input:
4828 *       ha = adapter block pointer
4829 */
4830 void
4831 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4832 {
4833         if (ha->exchoffld_buf) {
4834                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4835                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4836                 ha->exchoffld_buf = NULL;
4837                 ha->exchoffld_size = 0;
4838         }
4839 }
4840
4841 /*
4842 * qla2x00_free_fw_dump
4843 *       Frees fw dump stuff.
4844 *
4845 * Input:
4846 *       ha = adapter block pointer
4847 */
4848 static void
4849 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4850 {
4851         struct fwdt *fwdt = ha->fwdt;
4852         uint j;
4853
4854         if (ha->fce)
4855                 dma_free_coherent(&ha->pdev->dev,
4856                     FCE_SIZE, ha->fce, ha->fce_dma);
4857
4858         if (ha->eft)
4859                 dma_free_coherent(&ha->pdev->dev,
4860                     EFT_SIZE, ha->eft, ha->eft_dma);
4861
4862         vfree(ha->fw_dump);
4863
4864         ha->fce = NULL;
4865         ha->fce_dma = 0;
4866         ha->flags.fce_enabled = 0;
4867         ha->eft = NULL;
4868         ha->eft_dma = 0;
4869         ha->fw_dumped = false;
4870         ha->fw_dump_cap_flags = 0;
4871         ha->fw_dump_reading = 0;
4872         ha->fw_dump = NULL;
4873         ha->fw_dump_len = 0;
4874
4875         for (j = 0; j < 2; j++, fwdt++) {
4876                 vfree(fwdt->template);
4877                 fwdt->template = NULL;
4878                 fwdt->length = 0;
4879         }
4880 }
4881
4882 /*
4883 * qla2x00_mem_free
4884 *      Frees all adapter allocated memory.
4885 *
4886 * Input:
4887 *      ha = adapter block pointer.
4888 */
4889 static void
4890 qla2x00_mem_free(struct qla_hw_data *ha)
4891 {
4892         qla2x00_free_fw_dump(ha);
4893
4894         if (ha->mctp_dump)
4895                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4896                     ha->mctp_dump_dma);
4897         ha->mctp_dump = NULL;
4898
4899         mempool_destroy(ha->srb_mempool);
4900         ha->srb_mempool = NULL;
4901
4902         if (ha->dcbx_tlv)
4903                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4904                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4905         ha->dcbx_tlv = NULL;
4906
4907         if (ha->xgmac_data)
4908                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4909                     ha->xgmac_data, ha->xgmac_data_dma);
4910         ha->xgmac_data = NULL;
4911
4912         if (ha->sns_cmd)
4913                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4914                 ha->sns_cmd, ha->sns_cmd_dma);
4915         ha->sns_cmd = NULL;
4916         ha->sns_cmd_dma = 0;
4917
4918         if (ha->ct_sns)
4919                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4920                 ha->ct_sns, ha->ct_sns_dma);
4921         ha->ct_sns = NULL;
4922         ha->ct_sns_dma = 0;
4923
4924         if (ha->sfp_data)
4925                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4926                     ha->sfp_data_dma);
4927         ha->sfp_data = NULL;
4928
4929         if (ha->flt)
4930                 dma_free_coherent(&ha->pdev->dev,
4931                     sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE,
4932                     ha->flt, ha->flt_dma);
4933         ha->flt = NULL;
4934         ha->flt_dma = 0;
4935
4936         if (ha->ms_iocb)
4937                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4938         ha->ms_iocb = NULL;
4939         ha->ms_iocb_dma = 0;
4940
4941         if (ha->sf_init_cb)
4942                 dma_pool_free(ha->s_dma_pool,
4943                               ha->sf_init_cb, ha->sf_init_cb_dma);
4944
4945         if (ha->ex_init_cb)
4946                 dma_pool_free(ha->s_dma_pool,
4947                         ha->ex_init_cb, ha->ex_init_cb_dma);
4948         ha->ex_init_cb = NULL;
4949         ha->ex_init_cb_dma = 0;
4950
4951         if (ha->async_pd)
4952                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4953         ha->async_pd = NULL;
4954         ha->async_pd_dma = 0;
4955
4956         dma_pool_destroy(ha->s_dma_pool);
4957         ha->s_dma_pool = NULL;
4958
4959         if (ha->gid_list)
4960                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4961                 ha->gid_list, ha->gid_list_dma);
4962         ha->gid_list = NULL;
4963         ha->gid_list_dma = 0;
4964
4965         if (ha->base_qpair && !list_empty(&ha->base_qpair->dsd_list)) {
4966                 struct dsd_dma *dsd_ptr, *tdsd_ptr;
4967
4968                 /* clean up allocated prev pool */
4969                 list_for_each_entry_safe(dsd_ptr, tdsd_ptr,
4970                                          &ha->base_qpair->dsd_list, list) {
4971                         dma_pool_free(ha->dl_dma_pool, dsd_ptr->dsd_addr,
4972                                       dsd_ptr->dsd_list_dma);
4973                         list_del(&dsd_ptr->list);
4974                         kfree(dsd_ptr);
4975                 }
4976         }
4977
4978         dma_pool_destroy(ha->dl_dma_pool);
4979         ha->dl_dma_pool = NULL;
4980
4981         dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4982         ha->fcp_cmnd_dma_pool = NULL;
4983
4984         mempool_destroy(ha->ctx_mempool);
4985         ha->ctx_mempool = NULL;
4986
4987         if (ql2xenabledif && ha->dif_bundl_pool) {
4988                 struct dsd_dma *dsd, *nxt;
4989
4990                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4991                                          list) {
4992                         list_del(&dsd->list);
4993                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4994                                       dsd->dsd_list_dma);
4995                         ha->dif_bundle_dma_allocs--;
4996                         kfree(dsd);
4997                         ha->dif_bundle_kallocs--;
4998                         ha->pool.unusable.count--;
4999                 }
5000                 list_for_each_entry_safe(dsd, nxt, &ha->pool.good.head, list) {
5001                         list_del(&dsd->list);
5002                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
5003                                       dsd->dsd_list_dma);
5004                         ha->dif_bundle_dma_allocs--;
5005                         kfree(dsd);
5006                         ha->dif_bundle_kallocs--;
5007                 }
5008         }
5009
5010         dma_pool_destroy(ha->dif_bundl_pool);
5011         ha->dif_bundl_pool = NULL;
5012
5013         qlt_mem_free(ha);
5014         qla_remove_hostmap(ha);
5015
5016         if (ha->init_cb)
5017                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
5018                         ha->init_cb, ha->init_cb_dma);
5019
5020         dma_pool_destroy(ha->purex_dma_pool);
5021         ha->purex_dma_pool = NULL;
5022
5023         if (ha->elsrej.c) {
5024                 dma_free_coherent(&ha->pdev->dev, ha->elsrej.size,
5025                     ha->elsrej.c, ha->elsrej.cdma);
5026                 ha->elsrej.c = NULL;
5027         }
5028
5029         if (ha->lsrjt.c) {
5030                 dma_free_coherent(&ha->pdev->dev, ha->lsrjt.size, ha->lsrjt.c,
5031                                   ha->lsrjt.cdma);
5032                 ha->lsrjt.c = NULL;
5033         }
5034
5035         ha->init_cb = NULL;
5036         ha->init_cb_dma = 0;
5037
5038         vfree(ha->optrom_buffer);
5039         ha->optrom_buffer = NULL;
5040         kfree(ha->nvram);
5041         ha->nvram = NULL;
5042         kfree(ha->npiv_info);
5043         ha->npiv_info = NULL;
5044         kfree(ha->swl);
5045         ha->swl = NULL;
5046         kfree(ha->loop_id_map);
5047         ha->sf_init_cb = NULL;
5048         ha->sf_init_cb_dma = 0;
5049         ha->loop_id_map = NULL;
5050
5051         kfree(ha->vp_map);
5052         ha->vp_map = NULL;
5053 }
5054
5055 struct scsi_qla_host *qla2x00_create_host(const struct scsi_host_template *sht,
5056                                           struct qla_hw_data *ha)
5057 {
5058         struct Scsi_Host *host;
5059         struct scsi_qla_host *vha = NULL;
5060
5061         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
5062         if (!host) {
5063                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
5064                     "Failed to allocate host from the scsi layer, aborting.\n");
5065                 return NULL;
5066         }
5067
5068         /* Clear our data area */
5069         vha = shost_priv(host);
5070         memset(vha, 0, sizeof(scsi_qla_host_t));
5071
5072         vha->host = host;
5073         vha->host_no = host->host_no;
5074         vha->hw = ha;
5075
5076         vha->qlini_mode = ql2x_ini_mode;
5077         vha->ql2xexchoffld = ql2xexchoffld;
5078         vha->ql2xiniexchg = ql2xiniexchg;
5079
5080         INIT_LIST_HEAD(&vha->vp_fcports);
5081         INIT_LIST_HEAD(&vha->work_list);
5082         INIT_LIST_HEAD(&vha->list);
5083         INIT_LIST_HEAD(&vha->qla_cmd_list);
5084         INIT_LIST_HEAD(&vha->logo_list);
5085         INIT_LIST_HEAD(&vha->plogi_ack_list);
5086         INIT_LIST_HEAD(&vha->qp_list);
5087         INIT_LIST_HEAD(&vha->gnl.fcports);
5088         INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn);
5089
5090         INIT_LIST_HEAD(&vha->purex_list.head);
5091         spin_lock_init(&vha->purex_list.lock);
5092
5093         spin_lock_init(&vha->work_lock);
5094         spin_lock_init(&vha->cmd_list_lock);
5095         init_waitqueue_head(&vha->fcport_waitQ);
5096         init_waitqueue_head(&vha->vref_waitq);
5097         qla_enode_init(vha);
5098         qla_edb_init(vha);
5099
5100
5101         vha->gnl.size = sizeof(struct get_name_list_extended) *
5102                         (ha->max_loop_id + 1);
5103         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
5104             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
5105         if (!vha->gnl.l) {
5106                 ql_log(ql_log_fatal, vha, 0xd04a,
5107                     "Alloc failed for name list.\n");
5108                 scsi_host_put(vha->host);
5109                 return NULL;
5110         }
5111
5112         /* todo: what about ext login? */
5113         vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp);
5114         vha->scan.l = vmalloc(vha->scan.size);
5115         if (!vha->scan.l) {
5116                 ql_log(ql_log_fatal, vha, 0xd04a,
5117                     "Alloc failed for scan database.\n");
5118                 dma_free_coherent(&ha->pdev->dev, vha->gnl.size,
5119                     vha->gnl.l, vha->gnl.ldma);
5120                 vha->gnl.l = NULL;
5121                 scsi_host_put(vha->host);
5122                 return NULL;
5123         }
5124         INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn);
5125
5126         snprintf(vha->host_str, sizeof(vha->host_str), "%s_%lu",
5127                  QLA2XXX_DRIVER_NAME, vha->host_no);
5128         ql_dbg(ql_dbg_init, vha, 0x0041,
5129             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
5130             vha->host, vha->hw, vha,
5131             dev_name(&(ha->pdev->dev)));
5132
5133         return vha;
5134 }
5135
5136 struct qla_work_evt *
5137 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
5138 {
5139         struct qla_work_evt *e;
5140
5141         if (test_bit(UNLOADING, &vha->dpc_flags))
5142                 return NULL;
5143
5144         if (qla_vha_mark_busy(vha))
5145                 return NULL;
5146
5147         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
5148         if (!e) {
5149                 QLA_VHA_MARK_NOT_BUSY(vha);
5150                 return NULL;
5151         }
5152
5153         INIT_LIST_HEAD(&e->list);
5154         e->type = type;
5155         e->flags = QLA_EVT_FLAG_FREE;
5156         return e;
5157 }
5158
5159 int
5160 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
5161 {
5162         unsigned long flags;
5163         bool q = false;
5164
5165         spin_lock_irqsave(&vha->work_lock, flags);
5166         list_add_tail(&e->list, &vha->work_list);
5167
5168         if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
5169                 q = true;
5170
5171         spin_unlock_irqrestore(&vha->work_lock, flags);
5172
5173         if (q)
5174                 queue_work(vha->hw->wq, &vha->iocb_work);
5175
5176         return QLA_SUCCESS;
5177 }
5178
5179 int
5180 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
5181     u32 data)
5182 {
5183         struct qla_work_evt *e;
5184
5185         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
5186         if (!e)
5187                 return QLA_FUNCTION_FAILED;
5188
5189         e->u.aen.code = code;
5190         e->u.aen.data = data;
5191         return qla2x00_post_work(vha, e);
5192 }
5193
5194 int
5195 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
5196 {
5197         struct qla_work_evt *e;
5198
5199         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
5200         if (!e)
5201                 return QLA_FUNCTION_FAILED;
5202
5203         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
5204         return qla2x00_post_work(vha, e);
5205 }
5206
5207 #define qla2x00_post_async_work(name, type)     \
5208 int qla2x00_post_async_##name##_work(           \
5209     struct scsi_qla_host *vha,                  \
5210     fc_port_t *fcport, uint16_t *data)          \
5211 {                                               \
5212         struct qla_work_evt *e;                 \
5213                                                 \
5214         e = qla2x00_alloc_work(vha, type);      \
5215         if (!e)                                 \
5216                 return QLA_FUNCTION_FAILED;     \
5217                                                 \
5218         e->u.logio.fcport = fcport;             \
5219         if (data) {                             \
5220                 e->u.logio.data[0] = data[0];   \
5221                 e->u.logio.data[1] = data[1];   \
5222         }                                       \
5223         fcport->flags |= FCF_ASYNC_ACTIVE;      \
5224         return qla2x00_post_work(vha, e);       \
5225 }
5226
5227 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
5228 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
5229 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
5230 qla2x00_post_async_work(prlo, QLA_EVT_ASYNC_PRLO);
5231 qla2x00_post_async_work(prlo_done, QLA_EVT_ASYNC_PRLO_DONE);
5232
5233 int
5234 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
5235 {
5236         struct qla_work_evt *e;
5237
5238         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
5239         if (!e)
5240                 return QLA_FUNCTION_FAILED;
5241
5242         e->u.uevent.code = code;
5243         return qla2x00_post_work(vha, e);
5244 }
5245
5246 static void
5247 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
5248 {
5249         char event_string[40];
5250         char *envp[] = { event_string, NULL };
5251
5252         switch (code) {
5253         case QLA_UEVENT_CODE_FW_DUMP:
5254                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%lu",
5255                     vha->host_no);
5256                 break;
5257         default:
5258                 /* do nothing */
5259                 break;
5260         }
5261         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
5262 }
5263
5264 int
5265 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
5266                         uint32_t *data, int cnt)
5267 {
5268         struct qla_work_evt *e;
5269
5270         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
5271         if (!e)
5272                 return QLA_FUNCTION_FAILED;
5273
5274         e->u.aenfx.evtcode = evtcode;
5275         e->u.aenfx.count = cnt;
5276         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
5277         return qla2x00_post_work(vha, e);
5278 }
5279
5280 void qla24xx_sched_upd_fcport(fc_port_t *fcport)
5281 {
5282         unsigned long flags;
5283
5284         if (IS_SW_RESV_ADDR(fcport->d_id))
5285                 return;
5286
5287         spin_lock_irqsave(&fcport->vha->work_lock, flags);
5288         if (fcport->disc_state == DSC_UPD_FCPORT) {
5289                 spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
5290                 return;
5291         }
5292         fcport->jiffies_at_registration = jiffies;
5293         fcport->sec_since_registration = 0;
5294         fcport->next_disc_state = DSC_DELETED;
5295         qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
5296         spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
5297
5298         queue_work(system_unbound_wq, &fcport->reg_work);
5299 }
5300
5301 static
5302 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
5303 {
5304         unsigned long flags;
5305         fc_port_t *fcport =  NULL, *tfcp;
5306         struct qlt_plogi_ack_t *pla =
5307             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
5308         uint8_t free_fcport = 0;
5309
5310         ql_dbg(ql_dbg_disc, vha, 0xffff,
5311             "%s %d %8phC enter\n",
5312             __func__, __LINE__, e->u.new_sess.port_name);
5313
5314         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5315         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
5316         if (fcport) {
5317                 fcport->d_id = e->u.new_sess.id;
5318                 if (pla) {
5319                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5320                         memcpy(fcport->node_name,
5321                             pla->iocb.u.isp24.u.plogi.node_name,
5322                             WWN_SIZE);
5323                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
5324                         /* we took an extra ref_count to prevent PLOGI ACK when
5325                          * fcport/sess has not been created.
5326                          */
5327                         pla->ref_count--;
5328                 }
5329         } else {
5330                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5331                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5332                 if (fcport) {
5333                         fcport->d_id = e->u.new_sess.id;
5334                         fcport->flags |= FCF_FABRIC_DEVICE;
5335                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5336                         fcport->tgt_short_link_down_cnt = 0;
5337
5338                         memcpy(fcport->port_name, e->u.new_sess.port_name,
5339                             WWN_SIZE);
5340
5341                         fcport->fc4_type = e->u.new_sess.fc4_type;
5342                         if (NVME_PRIORITY(vha->hw, fcport))
5343                                 fcport->do_prli_nvme = 1;
5344                         else
5345                                 fcport->do_prli_nvme = 0;
5346
5347                         if (e->u.new_sess.fc4_type & FS_FCP_IS_N2N) {
5348                                 fcport->dm_login_expire = jiffies +
5349                                         QLA_N2N_WAIT_TIME * HZ;
5350                                 fcport->fc4_type = FS_FC4TYPE_FCP;
5351                                 fcport->n2n_flag = 1;
5352                                 if (vha->flags.nvme_enabled)
5353                                         fcport->fc4_type |= FS_FC4TYPE_NVME;
5354                         }
5355
5356                 } else {
5357                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5358                                    "%s %8phC mem alloc fail.\n",
5359                                    __func__, e->u.new_sess.port_name);
5360
5361                         if (pla) {
5362                                 list_del(&pla->list);
5363                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
5364                         }
5365                         return;
5366                 }
5367
5368                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5369                 /* search again to make sure no one else got ahead */
5370                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
5371                     e->u.new_sess.port_name, 1);
5372                 if (tfcp) {
5373                         /* should rarily happen */
5374                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5375                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
5376                             __func__, tfcp->port_name, tfcp->disc_state,
5377                             tfcp->fw_login_state);
5378
5379                         free_fcport = 1;
5380                 } else {
5381                         list_add_tail(&fcport->list, &vha->vp_fcports);
5382
5383                 }
5384                 if (pla) {
5385                         qlt_plogi_ack_link(vha, pla, fcport,
5386                             QLT_PLOGI_LINK_SAME_WWN);
5387                         pla->ref_count--;
5388                 }
5389         }
5390         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5391
5392         if (fcport) {
5393                 fcport->id_changed = 1;
5394                 fcport->scan_state = QLA_FCPORT_FOUND;
5395                 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5396                 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE);
5397
5398                 if (pla) {
5399                         if (pla->iocb.u.isp24.status_subcode == ELS_PRLI) {
5400                                 u16 wd3_lo;
5401
5402                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5403                                 fcport->local = 0;
5404                                 fcport->loop_id =
5405                                         le16_to_cpu(
5406                                             pla->iocb.u.isp24.nport_handle);
5407                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5408                                 wd3_lo =
5409                                     le16_to_cpu(
5410                                         pla->iocb.u.isp24.u.prli.wd3_lo);
5411
5412                                 if (wd3_lo & BIT_7)
5413                                         fcport->conf_compl_supported = 1;
5414
5415                                 if ((wd3_lo & BIT_4) == 0)
5416                                         fcport->port_type = FCT_INITIATOR;
5417                                 else
5418                                         fcport->port_type = FCT_TARGET;
5419                         }
5420                         qlt_plogi_ack_unref(vha, pla);
5421                 } else {
5422                         fc_port_t *dfcp = NULL;
5423
5424                         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5425                         tfcp = qla2x00_find_fcport_by_nportid(vha,
5426                             &e->u.new_sess.id, 1);
5427                         if (tfcp && (tfcp != fcport)) {
5428                                 /*
5429                                  * We have a conflict fcport with same NportID.
5430                                  */
5431                                 ql_dbg(ql_dbg_disc, vha, 0xffff,
5432                                     "%s %8phC found conflict b4 add. DS %d LS %d\n",
5433                                     __func__, tfcp->port_name, tfcp->disc_state,
5434                                     tfcp->fw_login_state);
5435
5436                                 switch (tfcp->disc_state) {
5437                                 case DSC_DELETED:
5438                                         break;
5439                                 case DSC_DELETE_PEND:
5440                                         fcport->login_pause = 1;
5441                                         tfcp->conflict = fcport;
5442                                         break;
5443                                 default:
5444                                         fcport->login_pause = 1;
5445                                         tfcp->conflict = fcport;
5446                                         dfcp = tfcp;
5447                                         break;
5448                                 }
5449                         }
5450                         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5451                         if (dfcp)
5452                                 qlt_schedule_sess_for_deletion(tfcp);
5453
5454                         if (N2N_TOPO(vha->hw)) {
5455                                 fcport->flags &= ~FCF_FABRIC_DEVICE;
5456                                 fcport->keep_nport_handle = 1;
5457                                 if (vha->flags.nvme_enabled) {
5458                                         fcport->fc4_type =
5459                                             (FS_FC4TYPE_NVME | FS_FC4TYPE_FCP);
5460                                         fcport->n2n_flag = 1;
5461                                 }
5462                                 fcport->fw_login_state = 0;
5463
5464                                 schedule_delayed_work(&vha->scan.scan_work, 5);
5465                         } else {
5466                                 qla24xx_fcport_handle_login(vha, fcport);
5467                         }
5468                 }
5469         }
5470
5471         if (free_fcport) {
5472                 qla2x00_free_fcport(fcport);
5473                 if (pla) {
5474                         list_del(&pla->list);
5475                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
5476                 }
5477         }
5478 }
5479
5480 static void qla_sp_retry(struct scsi_qla_host *vha, struct qla_work_evt *e)
5481 {
5482         struct srb *sp = e->u.iosb.sp;
5483         int rval;
5484
5485         rval = qla2x00_start_sp(sp);
5486         if (rval != QLA_SUCCESS) {
5487                 ql_dbg(ql_dbg_disc, vha, 0x2043,
5488                     "%s: %s: Re-issue IOCB failed (%d).\n",
5489                     __func__, sp->name, rval);
5490                 qla24xx_sp_unmap(vha, sp);
5491         }
5492 }
5493
5494 void
5495 qla2x00_do_work(struct scsi_qla_host *vha)
5496 {
5497         struct qla_work_evt *e, *tmp;
5498         unsigned long flags;
5499         LIST_HEAD(work);
5500         int rc;
5501
5502         spin_lock_irqsave(&vha->work_lock, flags);
5503         list_splice_init(&vha->work_list, &work);
5504         spin_unlock_irqrestore(&vha->work_lock, flags);
5505
5506         list_for_each_entry_safe(e, tmp, &work, list) {
5507                 rc = QLA_SUCCESS;
5508                 switch (e->type) {
5509                 case QLA_EVT_AEN:
5510                         fc_host_post_event(vha->host, fc_get_event_number(),
5511                             e->u.aen.code, e->u.aen.data);
5512                         break;
5513                 case QLA_EVT_IDC_ACK:
5514                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
5515                         break;
5516                 case QLA_EVT_ASYNC_LOGIN:
5517                         qla2x00_async_login(vha, e->u.logio.fcport,
5518                             e->u.logio.data);
5519                         break;
5520                 case QLA_EVT_ASYNC_LOGOUT:
5521                         rc = qla2x00_async_logout(vha, e->u.logio.fcport);
5522                         break;
5523                 case QLA_EVT_ASYNC_ADISC:
5524                         qla2x00_async_adisc(vha, e->u.logio.fcport,
5525                             e->u.logio.data);
5526                         break;
5527                 case QLA_EVT_UEVENT:
5528                         qla2x00_uevent_emit(vha, e->u.uevent.code);
5529                         break;
5530                 case QLA_EVT_AENFX:
5531                         qlafx00_process_aen(vha, e);
5532                         break;
5533                 case QLA_EVT_UNMAP:
5534                         qla24xx_sp_unmap(vha, e->u.iosb.sp);
5535                         break;
5536                 case QLA_EVT_RELOGIN:
5537                         qla2x00_relogin(vha);
5538                         break;
5539                 case QLA_EVT_NEW_SESS:
5540                         qla24xx_create_new_sess(vha, e);
5541                         break;
5542                 case QLA_EVT_GPDB:
5543                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
5544                             e->u.fcport.opt);
5545                         break;
5546                 case QLA_EVT_PRLI:
5547                         qla24xx_async_prli(vha, e->u.fcport.fcport);
5548                         break;
5549                 case QLA_EVT_GPSC:
5550                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
5551                         break;
5552                 case QLA_EVT_GNL:
5553                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
5554                         break;
5555                 case QLA_EVT_NACK:
5556                         qla24xx_do_nack_work(vha, e);
5557                         break;
5558                 case QLA_EVT_ASYNC_PRLO:
5559                         rc = qla2x00_async_prlo(vha, e->u.logio.fcport);
5560                         break;
5561                 case QLA_EVT_ASYNC_PRLO_DONE:
5562                         qla2x00_async_prlo_done(vha, e->u.logio.fcport,
5563                             e->u.logio.data);
5564                         break;
5565                 case QLA_EVT_GPNFT:
5566                         qla24xx_async_gpnft(vha, e->u.gpnft.fc4_type,
5567                             e->u.gpnft.sp);
5568                         break;
5569                 case QLA_EVT_GPNFT_DONE:
5570                         qla24xx_async_gpnft_done(vha, e->u.iosb.sp);
5571                         break;
5572                 case QLA_EVT_GNNFT_DONE:
5573                         qla24xx_async_gnnft_done(vha, e->u.iosb.sp);
5574                         break;
5575                 case QLA_EVT_GFPNID:
5576                         qla24xx_async_gfpnid(vha, e->u.fcport.fcport);
5577                         break;
5578                 case QLA_EVT_SP_RETRY:
5579                         qla_sp_retry(vha, e);
5580                         break;
5581                 case QLA_EVT_IIDMA:
5582                         qla_do_iidma_work(vha, e->u.fcport.fcport);
5583                         break;
5584                 case QLA_EVT_ELS_PLOGI:
5585                         qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
5586                             e->u.fcport.fcport, false);
5587                         break;
5588                 case QLA_EVT_SA_REPLACE:
5589                         rc = qla24xx_issue_sa_replace_iocb(vha, e);
5590                         break;
5591                 }
5592
5593                 if (rc == EAGAIN) {
5594                         /* put 'work' at head of 'vha->work_list' */
5595                         spin_lock_irqsave(&vha->work_lock, flags);
5596                         list_splice(&work, &vha->work_list);
5597                         spin_unlock_irqrestore(&vha->work_lock, flags);
5598                         break;
5599                 }
5600                 list_del_init(&e->list);
5601                 if (e->flags & QLA_EVT_FLAG_FREE)
5602                         kfree(e);
5603
5604                 /* For each work completed decrement vha ref count */
5605                 QLA_VHA_MARK_NOT_BUSY(vha);
5606         }
5607 }
5608
5609 int qla24xx_post_relogin_work(struct scsi_qla_host *vha)
5610 {
5611         struct qla_work_evt *e;
5612
5613         e = qla2x00_alloc_work(vha, QLA_EVT_RELOGIN);
5614
5615         if (!e) {
5616                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5617                 return QLA_FUNCTION_FAILED;
5618         }
5619
5620         return qla2x00_post_work(vha, e);
5621 }
5622
5623 /* Relogins all the fcports of a vport
5624  * Context: dpc thread
5625  */
5626 void qla2x00_relogin(struct scsi_qla_host *vha)
5627 {
5628         fc_port_t       *fcport;
5629         int status, relogin_needed = 0;
5630         struct event_arg ea;
5631
5632         list_for_each_entry(fcport, &vha->vp_fcports, list) {
5633                 /*
5634                  * If the port is not ONLINE then try to login
5635                  * to it if we haven't run out of retries.
5636                  */
5637                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
5638                     fcport->login_retry) {
5639                         if (fcport->scan_state != QLA_FCPORT_FOUND ||
5640                             fcport->disc_state == DSC_LOGIN_AUTH_PEND ||
5641                             fcport->disc_state == DSC_LOGIN_COMPLETE)
5642                                 continue;
5643
5644                         if (fcport->flags & (FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE) ||
5645                                 fcport->disc_state == DSC_DELETE_PEND) {
5646                                 relogin_needed = 1;
5647                         } else {
5648                                 if (vha->hw->current_topology != ISP_CFG_NL) {
5649                                         memset(&ea, 0, sizeof(ea));
5650                                         ea.fcport = fcport;
5651                                         qla24xx_handle_relogin_event(vha, &ea);
5652                                 } else if (vha->hw->current_topology ==
5653                                          ISP_CFG_NL &&
5654                                         IS_QLA2XXX_MIDTYPE(vha->hw)) {
5655                                         (void)qla24xx_fcport_handle_login(vha,
5656                                                                         fcport);
5657                                 } else if (vha->hw->current_topology ==
5658                                     ISP_CFG_NL) {
5659                                         fcport->login_retry--;
5660                                         status =
5661                                             qla2x00_local_device_login(vha,
5662                                                 fcport);
5663                                         if (status == QLA_SUCCESS) {
5664                                                 fcport->old_loop_id =
5665                                                     fcport->loop_id;
5666                                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
5667                                                     "Port login OK: logged in ID 0x%x.\n",
5668                                                     fcport->loop_id);
5669                                                 qla2x00_update_fcport
5670                                                         (vha, fcport);
5671                                         } else if (status == 1) {
5672                                                 set_bit(RELOGIN_NEEDED,
5673                                                     &vha->dpc_flags);
5674                                                 /* retry the login again */
5675                                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
5676                                                     "Retrying %d login again loop_id 0x%x.\n",
5677                                                     fcport->login_retry,
5678                                                     fcport->loop_id);
5679                                         } else {
5680                                                 fcport->login_retry = 0;
5681                                         }
5682
5683                                         if (fcport->login_retry == 0 &&
5684                                             status != QLA_SUCCESS)
5685                                                 qla2x00_clear_loop_id(fcport);
5686                                 }
5687                         }
5688                 }
5689                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5690                         break;
5691         }
5692
5693         if (relogin_needed)
5694                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5695
5696         ql_dbg(ql_dbg_disc, vha, 0x400e,
5697             "Relogin end.\n");
5698 }
5699
5700 /* Schedule work on any of the dpc-workqueues */
5701 void
5702 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
5703 {
5704         struct qla_hw_data *ha = base_vha->hw;
5705
5706         switch (work_code) {
5707         case MBA_IDC_AEN: /* 0x8200 */
5708                 if (ha->dpc_lp_wq)
5709                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
5710                 break;
5711
5712         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
5713                 if (!ha->flags.nic_core_reset_hdlr_active) {
5714                         if (ha->dpc_hp_wq)
5715                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
5716                 } else
5717                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
5718                             "NIC Core reset is already active. Skip "
5719                             "scheduling it again.\n");
5720                 break;
5721         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
5722                 if (ha->dpc_hp_wq)
5723                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
5724                 break;
5725         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
5726                 if (ha->dpc_hp_wq)
5727                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
5728                 break;
5729         default:
5730                 ql_log(ql_log_warn, base_vha, 0xb05f,
5731                     "Unknown work-code=0x%x.\n", work_code);
5732         }
5733
5734         return;
5735 }
5736
5737 /* Work: Perform NIC Core Unrecoverable state handling */
5738 void
5739 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
5740 {
5741         struct qla_hw_data *ha =
5742                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
5743         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5744         uint32_t dev_state = 0;
5745
5746         qla83xx_idc_lock(base_vha, 0);
5747         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5748         qla83xx_reset_ownership(base_vha);
5749         if (ha->flags.nic_core_reset_owner) {
5750                 ha->flags.nic_core_reset_owner = 0;
5751                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5752                     QLA8XXX_DEV_FAILED);
5753                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
5754                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5755         }
5756         qla83xx_idc_unlock(base_vha, 0);
5757 }
5758
5759 /* Work: Execute IDC state handler */
5760 void
5761 qla83xx_idc_state_handler_work(struct work_struct *work)
5762 {
5763         struct qla_hw_data *ha =
5764                 container_of(work, struct qla_hw_data, idc_state_handler);
5765         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5766         uint32_t dev_state = 0;
5767
5768         qla83xx_idc_lock(base_vha, 0);
5769         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5770         if (dev_state == QLA8XXX_DEV_FAILED ||
5771                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
5772                 qla83xx_idc_state_handler(base_vha);
5773         qla83xx_idc_unlock(base_vha, 0);
5774 }
5775
5776 static int
5777 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5778 {
5779         int rval = QLA_SUCCESS;
5780         unsigned long heart_beat_wait = jiffies + (1 * HZ);
5781         uint32_t heart_beat_counter1, heart_beat_counter2;
5782
5783         do {
5784                 if (time_after(jiffies, heart_beat_wait)) {
5785                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5786                             "Nic Core f/w is not alive.\n");
5787                         rval = QLA_FUNCTION_FAILED;
5788                         break;
5789                 }
5790
5791                 qla83xx_idc_lock(base_vha, 0);
5792                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5793                     &heart_beat_counter1);
5794                 qla83xx_idc_unlock(base_vha, 0);
5795                 msleep(100);
5796                 qla83xx_idc_lock(base_vha, 0);
5797                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5798                     &heart_beat_counter2);
5799                 qla83xx_idc_unlock(base_vha, 0);
5800         } while (heart_beat_counter1 == heart_beat_counter2);
5801
5802         return rval;
5803 }
5804
5805 /* Work: Perform NIC Core Reset handling */
5806 void
5807 qla83xx_nic_core_reset_work(struct work_struct *work)
5808 {
5809         struct qla_hw_data *ha =
5810                 container_of(work, struct qla_hw_data, nic_core_reset);
5811         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5812         uint32_t dev_state = 0;
5813
5814         if (IS_QLA2031(ha)) {
5815                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5816                         ql_log(ql_log_warn, base_vha, 0xb081,
5817                             "Failed to dump mctp\n");
5818                 return;
5819         }
5820
5821         if (!ha->flags.nic_core_reset_hdlr_active) {
5822                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5823                         qla83xx_idc_lock(base_vha, 0);
5824                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5825                             &dev_state);
5826                         qla83xx_idc_unlock(base_vha, 0);
5827                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5828                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5829                                     "Nic Core f/w is alive.\n");
5830                                 return;
5831                         }
5832                 }
5833
5834                 ha->flags.nic_core_reset_hdlr_active = 1;
5835                 if (qla83xx_nic_core_reset(base_vha)) {
5836                         /* NIC Core reset failed. */
5837                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5838                             "NIC Core reset failed.\n");
5839                 }
5840                 ha->flags.nic_core_reset_hdlr_active = 0;
5841         }
5842 }
5843
5844 /* Work: Handle 8200 IDC aens */
5845 void
5846 qla83xx_service_idc_aen(struct work_struct *work)
5847 {
5848         struct qla_hw_data *ha =
5849                 container_of(work, struct qla_hw_data, idc_aen);
5850         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5851         uint32_t dev_state, idc_control;
5852
5853         qla83xx_idc_lock(base_vha, 0);
5854         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5855         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5856         qla83xx_idc_unlock(base_vha, 0);
5857         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5858                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5859                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5860                             "Application requested NIC Core Reset.\n");
5861                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5862                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5863                     QLA_SUCCESS) {
5864                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5865                             "Other protocol driver requested NIC Core Reset.\n");
5866                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5867                 }
5868         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5869                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5870                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5871         }
5872 }
5873
5874 /*
5875  * Control the frequency of IDC lock retries
5876  */
5877 #define QLA83XX_WAIT_LOGIC_MS   100
5878
5879 static int
5880 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5881 {
5882         int rval;
5883         uint32_t data;
5884         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5885         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5886         struct qla_hw_data *ha = base_vha->hw;
5887
5888         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5889             "Trying force recovery of the IDC lock.\n");
5890
5891         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5892         if (rval)
5893                 return rval;
5894
5895         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5896                 return QLA_SUCCESS;
5897         } else {
5898                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5899                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5900                     data);
5901                 if (rval)
5902                         return rval;
5903
5904                 msleep(200);
5905
5906                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5907                     &data);
5908                 if (rval)
5909                         return rval;
5910
5911                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5912                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5913                                         ~(idc_lck_rcvry_stage_mask));
5914                         rval = qla83xx_wr_reg(base_vha,
5915                             QLA83XX_IDC_LOCK_RECOVERY, data);
5916                         if (rval)
5917                                 return rval;
5918
5919                         /* Forcefully perform IDC UnLock */
5920                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5921                             &data);
5922                         if (rval)
5923                                 return rval;
5924                         /* Clear lock-id by setting 0xff */
5925                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5926                             0xff);
5927                         if (rval)
5928                                 return rval;
5929                         /* Clear lock-recovery by setting 0x0 */
5930                         rval = qla83xx_wr_reg(base_vha,
5931                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5932                         if (rval)
5933                                 return rval;
5934                 } else
5935                         return QLA_SUCCESS;
5936         }
5937
5938         return rval;
5939 }
5940
5941 static int
5942 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5943 {
5944         int rval = QLA_SUCCESS;
5945         uint32_t o_drv_lockid, n_drv_lockid;
5946         unsigned long lock_recovery_timeout;
5947
5948         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5949 retry_lockid:
5950         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5951         if (rval)
5952                 goto exit;
5953
5954         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5955         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5956                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5957                         return QLA_SUCCESS;
5958                 else
5959                         return QLA_FUNCTION_FAILED;
5960         }
5961
5962         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5963         if (rval)
5964                 goto exit;
5965
5966         if (o_drv_lockid == n_drv_lockid) {
5967                 msleep(QLA83XX_WAIT_LOGIC_MS);
5968                 goto retry_lockid;
5969         } else
5970                 return QLA_SUCCESS;
5971
5972 exit:
5973         return rval;
5974 }
5975
5976 /*
5977  * Context: task, can sleep
5978  */
5979 void
5980 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5981 {
5982         uint32_t data;
5983         uint32_t lock_owner;
5984         struct qla_hw_data *ha = base_vha->hw;
5985
5986         might_sleep();
5987
5988         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5989 retry_lock:
5990         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5991             == QLA_SUCCESS) {
5992                 if (data) {
5993                         /* Setting lock-id to our function-number */
5994                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5995                             ha->portnum);
5996                 } else {
5997                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5998                             &lock_owner);
5999                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
6000                             "Failed to acquire IDC lock, acquired by %d, "
6001                             "retrying...\n", lock_owner);
6002
6003                         /* Retry/Perform IDC-Lock recovery */
6004                         if (qla83xx_idc_lock_recovery(base_vha)
6005                             == QLA_SUCCESS) {
6006                                 msleep(QLA83XX_WAIT_LOGIC_MS);
6007                                 goto retry_lock;
6008                         } else
6009                                 ql_log(ql_log_warn, base_vha, 0xb075,
6010                                     "IDC Lock recovery FAILED.\n");
6011                 }
6012
6013         }
6014
6015         return;
6016 }
6017
6018 static bool
6019 qla25xx_rdp_rsp_reduce_size(struct scsi_qla_host *vha,
6020         struct purex_entry_24xx *purex)
6021 {
6022         char fwstr[16];
6023         u32 sid = purex->s_id[2] << 16 | purex->s_id[1] << 8 | purex->s_id[0];
6024         struct port_database_24xx *pdb;
6025
6026         /* Domain Controller is always logged-out. */
6027         /* if RDP request is not from Domain Controller: */
6028         if (sid != 0xfffc01)
6029                 return false;
6030
6031         ql_dbg(ql_dbg_init, vha, 0x0181, "%s: s_id=%#x\n", __func__, sid);
6032
6033         pdb = kzalloc(sizeof(*pdb), GFP_KERNEL);
6034         if (!pdb) {
6035                 ql_dbg(ql_dbg_init, vha, 0x0181,
6036                     "%s: Failed allocate pdb\n", __func__);
6037         } else if (qla24xx_get_port_database(vha,
6038                                 le16_to_cpu(purex->nport_handle), pdb)) {
6039                 ql_dbg(ql_dbg_init, vha, 0x0181,
6040                     "%s: Failed get pdb sid=%x\n", __func__, sid);
6041         } else if (pdb->current_login_state != PDS_PLOGI_COMPLETE &&
6042             pdb->current_login_state != PDS_PRLI_COMPLETE) {
6043                 ql_dbg(ql_dbg_init, vha, 0x0181,
6044                     "%s: Port not logged in sid=%#x\n", __func__, sid);
6045         } else {
6046                 /* RDP request is from logged in port */
6047                 kfree(pdb);
6048                 return false;
6049         }
6050         kfree(pdb);
6051
6052         vha->hw->isp_ops->fw_version_str(vha, fwstr, sizeof(fwstr));
6053         fwstr[strcspn(fwstr, " ")] = 0;
6054         /* if FW version allows RDP response length upto 2048 bytes: */
6055         if (strcmp(fwstr, "8.09.00") > 0 || strcmp(fwstr, "8.05.65") == 0)
6056                 return false;
6057
6058         ql_dbg(ql_dbg_init, vha, 0x0181, "%s: fw=%s\n", __func__, fwstr);
6059
6060         /* RDP response length is to be reduced to maximum 256 bytes */
6061         return true;
6062 }
6063
6064 /*
6065  * Function Name: qla24xx_process_purex_iocb
6066  *
6067  * Description:
6068  * Prepare a RDP response and send to Fabric switch
6069  *
6070  * PARAMETERS:
6071  * vha: SCSI qla host
6072  * purex: RDP request received by HBA
6073  */
6074 void qla24xx_process_purex_rdp(struct scsi_qla_host *vha,
6075                                struct purex_item *item)
6076 {
6077         struct qla_hw_data *ha = vha->hw;
6078         struct purex_entry_24xx *purex =
6079             (struct purex_entry_24xx *)&item->iocb;
6080         dma_addr_t rsp_els_dma;
6081         dma_addr_t rsp_payload_dma;
6082         dma_addr_t stat_dma;
6083         dma_addr_t sfp_dma;
6084         struct els_entry_24xx *rsp_els = NULL;
6085         struct rdp_rsp_payload *rsp_payload = NULL;
6086         struct link_statistics *stat = NULL;
6087         uint8_t *sfp = NULL;
6088         uint16_t sfp_flags = 0;
6089         uint rsp_payload_length = sizeof(*rsp_payload);
6090         int rval;
6091
6092         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0180,
6093             "%s: Enter\n", __func__);
6094
6095         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0181,
6096             "-------- ELS REQ -------\n");
6097         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0182,
6098             purex, sizeof(*purex));
6099
6100         if (qla25xx_rdp_rsp_reduce_size(vha, purex)) {
6101                 rsp_payload_length =
6102                     offsetof(typeof(*rsp_payload), optical_elmt_desc);
6103                 ql_dbg(ql_dbg_init, vha, 0x0181,
6104                     "Reducing RSP payload length to %u bytes...\n",
6105                     rsp_payload_length);
6106         }
6107
6108         rsp_els = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_els),
6109             &rsp_els_dma, GFP_KERNEL);
6110         if (!rsp_els) {
6111                 ql_log(ql_log_warn, vha, 0x0183,
6112                     "Failed allocate dma buffer ELS RSP.\n");
6113                 goto dealloc;
6114         }
6115
6116         rsp_payload = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_payload),
6117             &rsp_payload_dma, GFP_KERNEL);
6118         if (!rsp_payload) {
6119                 ql_log(ql_log_warn, vha, 0x0184,
6120                     "Failed allocate dma buffer ELS RSP payload.\n");
6121                 goto dealloc;
6122         }
6123
6124         sfp = dma_alloc_coherent(&ha->pdev->dev, SFP_RTDI_LEN,
6125             &sfp_dma, GFP_KERNEL);
6126
6127         stat = dma_alloc_coherent(&ha->pdev->dev, sizeof(*stat),
6128             &stat_dma, GFP_KERNEL);
6129
6130         /* Prepare Response IOCB */
6131         rsp_els->entry_type = ELS_IOCB_TYPE;
6132         rsp_els->entry_count = 1;
6133         rsp_els->sys_define = 0;
6134         rsp_els->entry_status = 0;
6135         rsp_els->handle = 0;
6136         rsp_els->nport_handle = purex->nport_handle;
6137         rsp_els->tx_dsd_count = cpu_to_le16(1);
6138         rsp_els->vp_index = purex->vp_idx;
6139         rsp_els->sof_type = EST_SOFI3;
6140         rsp_els->rx_xchg_address = purex->rx_xchg_addr;
6141         rsp_els->rx_dsd_count = 0;
6142         rsp_els->opcode = purex->els_frame_payload[0];
6143
6144         rsp_els->d_id[0] = purex->s_id[0];
6145         rsp_els->d_id[1] = purex->s_id[1];
6146         rsp_els->d_id[2] = purex->s_id[2];
6147
6148         rsp_els->control_flags = cpu_to_le16(EPD_ELS_ACC);
6149         rsp_els->rx_byte_count = 0;
6150         rsp_els->tx_byte_count = cpu_to_le32(rsp_payload_length);
6151
6152         put_unaligned_le64(rsp_payload_dma, &rsp_els->tx_address);
6153         rsp_els->tx_len = rsp_els->tx_byte_count;
6154
6155         rsp_els->rx_address = 0;
6156         rsp_els->rx_len = 0;
6157
6158         /* Prepare Response Payload */
6159         rsp_payload->hdr.cmd = cpu_to_be32(0x2 << 24); /* LS_ACC */
6160         rsp_payload->hdr.len = cpu_to_be32(le32_to_cpu(rsp_els->tx_byte_count) -
6161                                            sizeof(rsp_payload->hdr));
6162
6163         /* Link service Request Info Descriptor */
6164         rsp_payload->ls_req_info_desc.desc_tag = cpu_to_be32(0x1);
6165         rsp_payload->ls_req_info_desc.desc_len =
6166             cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_req_info_desc));
6167         rsp_payload->ls_req_info_desc.req_payload_word_0 =
6168             cpu_to_be32p((uint32_t *)purex->els_frame_payload);
6169
6170         /* Link service Request Info Descriptor 2 */
6171         rsp_payload->ls_req_info_desc2.desc_tag = cpu_to_be32(0x1);
6172         rsp_payload->ls_req_info_desc2.desc_len =
6173             cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_req_info_desc2));
6174         rsp_payload->ls_req_info_desc2.req_payload_word_0 =
6175             cpu_to_be32p((uint32_t *)purex->els_frame_payload);
6176
6177
6178         rsp_payload->sfp_diag_desc.desc_tag = cpu_to_be32(0x10000);
6179         rsp_payload->sfp_diag_desc.desc_len =
6180                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->sfp_diag_desc));
6181
6182         if (sfp) {
6183                 /* SFP Flags */
6184                 memset(sfp, 0, SFP_RTDI_LEN);
6185                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 0x7, 2, 0);
6186                 if (!rval) {
6187                         /* SFP Flags bits 3-0: Port Tx Laser Type */
6188                         if (sfp[0] & BIT_2 || sfp[1] & (BIT_6|BIT_5))
6189                                 sfp_flags |= BIT_0; /* short wave */
6190                         else if (sfp[0] & BIT_1)
6191                                 sfp_flags |= BIT_1; /* long wave 1310nm */
6192                         else if (sfp[1] & BIT_4)
6193                                 sfp_flags |= BIT_1|BIT_0; /* long wave 1550nm */
6194                 }
6195
6196                 /* SFP Type */
6197                 memset(sfp, 0, SFP_RTDI_LEN);
6198                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 0x0, 1, 0);
6199                 if (!rval) {
6200                         sfp_flags |= BIT_4; /* optical */
6201                         if (sfp[0] == 0x3)
6202                                 sfp_flags |= BIT_6; /* sfp+ */
6203                 }
6204
6205                 rsp_payload->sfp_diag_desc.sfp_flags = cpu_to_be16(sfp_flags);
6206
6207                 /* SFP Diagnostics */
6208                 memset(sfp, 0, SFP_RTDI_LEN);
6209                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 0x60, 10, 0);
6210                 if (!rval) {
6211                         __be16 *trx = (__force __be16 *)sfp; /* already be16 */
6212                         rsp_payload->sfp_diag_desc.temperature = trx[0];
6213                         rsp_payload->sfp_diag_desc.vcc = trx[1];
6214                         rsp_payload->sfp_diag_desc.tx_bias = trx[2];
6215                         rsp_payload->sfp_diag_desc.tx_power = trx[3];
6216                         rsp_payload->sfp_diag_desc.rx_power = trx[4];
6217                 }
6218         }
6219
6220         /* Port Speed Descriptor */
6221         rsp_payload->port_speed_desc.desc_tag = cpu_to_be32(0x10001);
6222         rsp_payload->port_speed_desc.desc_len =
6223             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_speed_desc));
6224         rsp_payload->port_speed_desc.speed_capab = cpu_to_be16(
6225             qla25xx_fdmi_port_speed_capability(ha));
6226         rsp_payload->port_speed_desc.operating_speed = cpu_to_be16(
6227             qla25xx_fdmi_port_speed_currently(ha));
6228
6229         /* Link Error Status Descriptor */
6230         rsp_payload->ls_err_desc.desc_tag = cpu_to_be32(0x10002);
6231         rsp_payload->ls_err_desc.desc_len =
6232                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_err_desc));
6233
6234         if (stat) {
6235                 rval = qla24xx_get_isp_stats(vha, stat, stat_dma, 0);
6236                 if (!rval) {
6237                         rsp_payload->ls_err_desc.link_fail_cnt =
6238                             cpu_to_be32(le32_to_cpu(stat->link_fail_cnt));
6239                         rsp_payload->ls_err_desc.loss_sync_cnt =
6240                             cpu_to_be32(le32_to_cpu(stat->loss_sync_cnt));
6241                         rsp_payload->ls_err_desc.loss_sig_cnt =
6242                             cpu_to_be32(le32_to_cpu(stat->loss_sig_cnt));
6243                         rsp_payload->ls_err_desc.prim_seq_err_cnt =
6244                             cpu_to_be32(le32_to_cpu(stat->prim_seq_err_cnt));
6245                         rsp_payload->ls_err_desc.inval_xmit_word_cnt =
6246                             cpu_to_be32(le32_to_cpu(stat->inval_xmit_word_cnt));
6247                         rsp_payload->ls_err_desc.inval_crc_cnt =
6248                             cpu_to_be32(le32_to_cpu(stat->inval_crc_cnt));
6249                         rsp_payload->ls_err_desc.pn_port_phy_type |= BIT_6;
6250                 }
6251         }
6252
6253         /* Portname Descriptor */
6254         rsp_payload->port_name_diag_desc.desc_tag = cpu_to_be32(0x10003);
6255         rsp_payload->port_name_diag_desc.desc_len =
6256             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_name_diag_desc));
6257         memcpy(rsp_payload->port_name_diag_desc.WWNN,
6258             vha->node_name,
6259             sizeof(rsp_payload->port_name_diag_desc.WWNN));
6260         memcpy(rsp_payload->port_name_diag_desc.WWPN,
6261             vha->port_name,
6262             sizeof(rsp_payload->port_name_diag_desc.WWPN));
6263
6264         /* F-Port Portname Descriptor */
6265         rsp_payload->port_name_direct_desc.desc_tag = cpu_to_be32(0x10003);
6266         rsp_payload->port_name_direct_desc.desc_len =
6267             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_name_direct_desc));
6268         memcpy(rsp_payload->port_name_direct_desc.WWNN,
6269             vha->fabric_node_name,
6270             sizeof(rsp_payload->port_name_direct_desc.WWNN));
6271         memcpy(rsp_payload->port_name_direct_desc.WWPN,
6272             vha->fabric_port_name,
6273             sizeof(rsp_payload->port_name_direct_desc.WWPN));
6274
6275         /* Bufer Credit Descriptor */
6276         rsp_payload->buffer_credit_desc.desc_tag = cpu_to_be32(0x10006);
6277         rsp_payload->buffer_credit_desc.desc_len =
6278                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->buffer_credit_desc));
6279         rsp_payload->buffer_credit_desc.fcport_b2b = 0;
6280         rsp_payload->buffer_credit_desc.attached_fcport_b2b = cpu_to_be32(0);
6281         rsp_payload->buffer_credit_desc.fcport_rtt = cpu_to_be32(0);
6282
6283         if (ha->flags.plogi_template_valid) {
6284                 uint32_t tmp =
6285                 be16_to_cpu(ha->plogi_els_payld.fl_csp.sp_bb_cred);
6286                 rsp_payload->buffer_credit_desc.fcport_b2b = cpu_to_be32(tmp);
6287         }
6288
6289         if (rsp_payload_length < sizeof(*rsp_payload))
6290                 goto send;
6291
6292         /* Optical Element Descriptor, Temperature */
6293         rsp_payload->optical_elmt_desc[0].desc_tag = cpu_to_be32(0x10007);
6294         rsp_payload->optical_elmt_desc[0].desc_len =
6295                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6296         /* Optical Element Descriptor, Voltage */
6297         rsp_payload->optical_elmt_desc[1].desc_tag = cpu_to_be32(0x10007);
6298         rsp_payload->optical_elmt_desc[1].desc_len =
6299                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6300         /* Optical Element Descriptor, Tx Bias Current */
6301         rsp_payload->optical_elmt_desc[2].desc_tag = cpu_to_be32(0x10007);
6302         rsp_payload->optical_elmt_desc[2].desc_len =
6303                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6304         /* Optical Element Descriptor, Tx Power */
6305         rsp_payload->optical_elmt_desc[3].desc_tag = cpu_to_be32(0x10007);
6306         rsp_payload->optical_elmt_desc[3].desc_len =
6307                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6308         /* Optical Element Descriptor, Rx Power */
6309         rsp_payload->optical_elmt_desc[4].desc_tag = cpu_to_be32(0x10007);
6310         rsp_payload->optical_elmt_desc[4].desc_len =
6311                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6312
6313         if (sfp) {
6314                 memset(sfp, 0, SFP_RTDI_LEN);
6315                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 0, 64, 0);
6316                 if (!rval) {
6317                         __be16 *trx = (__force __be16 *)sfp; /* already be16 */
6318
6319                         /* Optical Element Descriptor, Temperature */
6320                         rsp_payload->optical_elmt_desc[0].high_alarm = trx[0];
6321                         rsp_payload->optical_elmt_desc[0].low_alarm = trx[1];
6322                         rsp_payload->optical_elmt_desc[0].high_warn = trx[2];
6323                         rsp_payload->optical_elmt_desc[0].low_warn = trx[3];
6324                         rsp_payload->optical_elmt_desc[0].element_flags =
6325                             cpu_to_be32(1 << 28);
6326
6327                         /* Optical Element Descriptor, Voltage */
6328                         rsp_payload->optical_elmt_desc[1].high_alarm = trx[4];
6329                         rsp_payload->optical_elmt_desc[1].low_alarm = trx[5];
6330                         rsp_payload->optical_elmt_desc[1].high_warn = trx[6];
6331                         rsp_payload->optical_elmt_desc[1].low_warn = trx[7];
6332                         rsp_payload->optical_elmt_desc[1].element_flags =
6333                             cpu_to_be32(2 << 28);
6334
6335                         /* Optical Element Descriptor, Tx Bias Current */
6336                         rsp_payload->optical_elmt_desc[2].high_alarm = trx[8];
6337                         rsp_payload->optical_elmt_desc[2].low_alarm = trx[9];
6338                         rsp_payload->optical_elmt_desc[2].high_warn = trx[10];
6339                         rsp_payload->optical_elmt_desc[2].low_warn = trx[11];
6340                         rsp_payload->optical_elmt_desc[2].element_flags =
6341                             cpu_to_be32(3 << 28);
6342
6343                         /* Optical Element Descriptor, Tx Power */
6344                         rsp_payload->optical_elmt_desc[3].high_alarm = trx[12];
6345                         rsp_payload->optical_elmt_desc[3].low_alarm = trx[13];
6346                         rsp_payload->optical_elmt_desc[3].high_warn = trx[14];
6347                         rsp_payload->optical_elmt_desc[3].low_warn = trx[15];
6348                         rsp_payload->optical_elmt_desc[3].element_flags =
6349                             cpu_to_be32(4 << 28);
6350
6351                         /* Optical Element Descriptor, Rx Power */
6352                         rsp_payload->optical_elmt_desc[4].high_alarm = trx[16];
6353                         rsp_payload->optical_elmt_desc[4].low_alarm = trx[17];
6354                         rsp_payload->optical_elmt_desc[4].high_warn = trx[18];
6355                         rsp_payload->optical_elmt_desc[4].low_warn = trx[19];
6356                         rsp_payload->optical_elmt_desc[4].element_flags =
6357                             cpu_to_be32(5 << 28);
6358                 }
6359
6360                 memset(sfp, 0, SFP_RTDI_LEN);
6361                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 112, 64, 0);
6362                 if (!rval) {
6363                         /* Temperature high/low alarm/warning */
6364                         rsp_payload->optical_elmt_desc[0].element_flags |=
6365                             cpu_to_be32(
6366                                 (sfp[0] >> 7 & 1) << 3 |
6367                                 (sfp[0] >> 6 & 1) << 2 |
6368                                 (sfp[4] >> 7 & 1) << 1 |
6369                                 (sfp[4] >> 6 & 1) << 0);
6370
6371                         /* Voltage high/low alarm/warning */
6372                         rsp_payload->optical_elmt_desc[1].element_flags |=
6373                             cpu_to_be32(
6374                                 (sfp[0] >> 5 & 1) << 3 |
6375                                 (sfp[0] >> 4 & 1) << 2 |
6376                                 (sfp[4] >> 5 & 1) << 1 |
6377                                 (sfp[4] >> 4 & 1) << 0);
6378
6379                         /* Tx Bias Current high/low alarm/warning */
6380                         rsp_payload->optical_elmt_desc[2].element_flags |=
6381                             cpu_to_be32(
6382                                 (sfp[0] >> 3 & 1) << 3 |
6383                                 (sfp[0] >> 2 & 1) << 2 |
6384                                 (sfp[4] >> 3 & 1) << 1 |
6385                                 (sfp[4] >> 2 & 1) << 0);
6386
6387                         /* Tx Power high/low alarm/warning */
6388                         rsp_payload->optical_elmt_desc[3].element_flags |=
6389                             cpu_to_be32(
6390                                 (sfp[0] >> 1 & 1) << 3 |
6391                                 (sfp[0] >> 0 & 1) << 2 |
6392                                 (sfp[4] >> 1 & 1) << 1 |
6393                                 (sfp[4] >> 0 & 1) << 0);
6394
6395                         /* Rx Power high/low alarm/warning */
6396                         rsp_payload->optical_elmt_desc[4].element_flags |=
6397                             cpu_to_be32(
6398                                 (sfp[1] >> 7 & 1) << 3 |
6399                                 (sfp[1] >> 6 & 1) << 2 |
6400                                 (sfp[5] >> 7 & 1) << 1 |
6401                                 (sfp[5] >> 6 & 1) << 0);
6402                 }
6403         }
6404
6405         /* Optical Product Data Descriptor */
6406         rsp_payload->optical_prod_desc.desc_tag = cpu_to_be32(0x10008);
6407         rsp_payload->optical_prod_desc.desc_len =
6408                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->optical_prod_desc));
6409
6410         if (sfp) {
6411                 memset(sfp, 0, SFP_RTDI_LEN);
6412                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 20, 64, 0);
6413                 if (!rval) {
6414                         memcpy(rsp_payload->optical_prod_desc.vendor_name,
6415                             sfp + 0,
6416                             sizeof(rsp_payload->optical_prod_desc.vendor_name));
6417                         memcpy(rsp_payload->optical_prod_desc.part_number,
6418                             sfp + 20,
6419                             sizeof(rsp_payload->optical_prod_desc.part_number));
6420                         memcpy(rsp_payload->optical_prod_desc.revision,
6421                             sfp + 36,
6422                             sizeof(rsp_payload->optical_prod_desc.revision));
6423                         memcpy(rsp_payload->optical_prod_desc.serial_number,
6424                             sfp + 48,
6425                             sizeof(rsp_payload->optical_prod_desc.serial_number));
6426                 }
6427
6428                 memset(sfp, 0, SFP_RTDI_LEN);
6429                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 84, 8, 0);
6430                 if (!rval) {
6431                         memcpy(rsp_payload->optical_prod_desc.date,
6432                             sfp + 0,
6433                             sizeof(rsp_payload->optical_prod_desc.date));
6434                 }
6435         }
6436
6437 send:
6438         ql_dbg(ql_dbg_init, vha, 0x0183,
6439             "Sending ELS Response to RDP Request...\n");
6440         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0184,
6441             "-------- ELS RSP -------\n");
6442         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0185,
6443             rsp_els, sizeof(*rsp_els));
6444         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0186,
6445             "-------- ELS RSP PAYLOAD -------\n");
6446         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0187,
6447             rsp_payload, rsp_payload_length);
6448
6449         rval = qla2x00_issue_iocb(vha, rsp_els, rsp_els_dma, 0);
6450
6451         if (rval) {
6452                 ql_log(ql_log_warn, vha, 0x0188,
6453                     "%s: iocb failed to execute -> %x\n", __func__, rval);
6454         } else if (rsp_els->comp_status) {
6455                 ql_log(ql_log_warn, vha, 0x0189,
6456                     "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
6457                     __func__, rsp_els->comp_status,
6458                     rsp_els->error_subcode_1, rsp_els->error_subcode_2);
6459         } else {
6460                 ql_dbg(ql_dbg_init, vha, 0x018a, "%s: done.\n", __func__);
6461         }
6462
6463 dealloc:
6464         if (stat)
6465                 dma_free_coherent(&ha->pdev->dev, sizeof(*stat),
6466                     stat, stat_dma);
6467         if (sfp)
6468                 dma_free_coherent(&ha->pdev->dev, SFP_RTDI_LEN,
6469                     sfp, sfp_dma);
6470         if (rsp_payload)
6471                 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_payload),
6472                     rsp_payload, rsp_payload_dma);
6473         if (rsp_els)
6474                 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_els),
6475                     rsp_els, rsp_els_dma);
6476 }
6477
6478 void
6479 qla24xx_free_purex_item(struct purex_item *item)
6480 {
6481         if (item == &item->vha->default_item)
6482                 memset(&item->vha->default_item, 0, sizeof(struct purex_item));
6483         else
6484                 kfree(item);
6485 }
6486
6487 void qla24xx_process_purex_list(struct purex_list *list)
6488 {
6489         struct list_head head = LIST_HEAD_INIT(head);
6490         struct purex_item *item, *next;
6491         ulong flags;
6492
6493         spin_lock_irqsave(&list->lock, flags);
6494         list_splice_init(&list->head, &head);
6495         spin_unlock_irqrestore(&list->lock, flags);
6496
6497         list_for_each_entry_safe(item, next, &head, list) {
6498                 list_del(&item->list);
6499                 item->process_item(item->vha, item);
6500                 qla24xx_free_purex_item(item);
6501         }
6502 }
6503
6504 /*
6505  * Context: task, can sleep
6506  */
6507 void
6508 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
6509 {
6510 #if 0
6511         uint16_t options = (requester_id << 15) | BIT_7;
6512 #endif
6513         uint16_t retry;
6514         uint32_t data;
6515         struct qla_hw_data *ha = base_vha->hw;
6516
6517         might_sleep();
6518
6519         /* IDC-unlock implementation using driver-unlock/lock-id
6520          * remote registers
6521          */
6522         retry = 0;
6523 retry_unlock:
6524         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
6525             == QLA_SUCCESS) {
6526                 if (data == ha->portnum) {
6527                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
6528                         /* Clearing lock-id by setting 0xff */
6529                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
6530                 } else if (retry < 10) {
6531                         /* SV: XXX: IDC unlock retrying needed here? */
6532
6533                         /* Retry for IDC-unlock */
6534                         msleep(QLA83XX_WAIT_LOGIC_MS);
6535                         retry++;
6536                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
6537                             "Failed to release IDC lock, retrying=%d\n", retry);
6538                         goto retry_unlock;
6539                 }
6540         } else if (retry < 10) {
6541                 /* Retry for IDC-unlock */
6542                 msleep(QLA83XX_WAIT_LOGIC_MS);
6543                 retry++;
6544                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
6545                     "Failed to read drv-lockid, retrying=%d\n", retry);
6546                 goto retry_unlock;
6547         }
6548
6549         return;
6550
6551 #if 0
6552         /* XXX: IDC-unlock implementation using access-control mbx */
6553         retry = 0;
6554 retry_unlock2:
6555         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
6556                 if (retry < 10) {
6557                         /* Retry for IDC-unlock */
6558                         msleep(QLA83XX_WAIT_LOGIC_MS);
6559                         retry++;
6560                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
6561                             "Failed to release IDC lock, retrying=%d\n", retry);
6562                         goto retry_unlock2;
6563                 }
6564         }
6565
6566         return;
6567 #endif
6568 }
6569
6570 int
6571 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
6572 {
6573         int rval = QLA_SUCCESS;
6574         struct qla_hw_data *ha = vha->hw;
6575         uint32_t drv_presence;
6576
6577         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6578         if (rval == QLA_SUCCESS) {
6579                 drv_presence |= (1 << ha->portnum);
6580                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6581                     drv_presence);
6582         }
6583
6584         return rval;
6585 }
6586
6587 int
6588 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
6589 {
6590         int rval = QLA_SUCCESS;
6591
6592         qla83xx_idc_lock(vha, 0);
6593         rval = __qla83xx_set_drv_presence(vha);
6594         qla83xx_idc_unlock(vha, 0);
6595
6596         return rval;
6597 }
6598
6599 int
6600 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
6601 {
6602         int rval = QLA_SUCCESS;
6603         struct qla_hw_data *ha = vha->hw;
6604         uint32_t drv_presence;
6605
6606         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6607         if (rval == QLA_SUCCESS) {
6608                 drv_presence &= ~(1 << ha->portnum);
6609                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6610                     drv_presence);
6611         }
6612
6613         return rval;
6614 }
6615
6616 int
6617 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
6618 {
6619         int rval = QLA_SUCCESS;
6620
6621         qla83xx_idc_lock(vha, 0);
6622         rval = __qla83xx_clear_drv_presence(vha);
6623         qla83xx_idc_unlock(vha, 0);
6624
6625         return rval;
6626 }
6627
6628 static void
6629 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
6630 {
6631         struct qla_hw_data *ha = vha->hw;
6632         uint32_t drv_ack, drv_presence;
6633         unsigned long ack_timeout;
6634
6635         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
6636         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
6637         while (1) {
6638                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6639                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6640                 if ((drv_ack & drv_presence) == drv_presence)
6641                         break;
6642
6643                 if (time_after_eq(jiffies, ack_timeout)) {
6644                         ql_log(ql_log_warn, vha, 0xb067,
6645                             "RESET ACK TIMEOUT! drv_presence=0x%x "
6646                             "drv_ack=0x%x\n", drv_presence, drv_ack);
6647                         /*
6648                          * The function(s) which did not ack in time are forced
6649                          * to withdraw any further participation in the IDC
6650                          * reset.
6651                          */
6652                         if (drv_ack != drv_presence)
6653                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6654                                     drv_ack);
6655                         break;
6656                 }
6657
6658                 qla83xx_idc_unlock(vha, 0);
6659                 msleep(1000);
6660                 qla83xx_idc_lock(vha, 0);
6661         }
6662
6663         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
6664         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
6665 }
6666
6667 static int
6668 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
6669 {
6670         int rval = QLA_SUCCESS;
6671         uint32_t idc_control;
6672
6673         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
6674         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
6675
6676         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
6677         __qla83xx_get_idc_control(vha, &idc_control);
6678         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
6679         __qla83xx_set_idc_control(vha, 0);
6680
6681         qla83xx_idc_unlock(vha, 0);
6682         rval = qla83xx_restart_nic_firmware(vha);
6683         qla83xx_idc_lock(vha, 0);
6684
6685         if (rval != QLA_SUCCESS) {
6686                 ql_log(ql_log_fatal, vha, 0xb06a,
6687                     "Failed to restart NIC f/w.\n");
6688                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
6689                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
6690         } else {
6691                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
6692                     "Success in restarting nic f/w.\n");
6693                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
6694                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
6695         }
6696
6697         return rval;
6698 }
6699
6700 /* Assumes idc_lock always held on entry */
6701 int
6702 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
6703 {
6704         struct qla_hw_data *ha = base_vha->hw;
6705         int rval = QLA_SUCCESS;
6706         unsigned long dev_init_timeout;
6707         uint32_t dev_state;
6708
6709         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
6710         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
6711
6712         while (1) {
6713
6714                 if (time_after_eq(jiffies, dev_init_timeout)) {
6715                         ql_log(ql_log_warn, base_vha, 0xb06e,
6716                             "Initialization TIMEOUT!\n");
6717                         /* Init timeout. Disable further NIC Core
6718                          * communication.
6719                          */
6720                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
6721                                 QLA8XXX_DEV_FAILED);
6722                         ql_log(ql_log_info, base_vha, 0xb06f,
6723                             "HW State: FAILED.\n");
6724                 }
6725
6726                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6727                 switch (dev_state) {
6728                 case QLA8XXX_DEV_READY:
6729                         if (ha->flags.nic_core_reset_owner)
6730                                 qla83xx_idc_audit(base_vha,
6731                                     IDC_AUDIT_COMPLETION);
6732                         ha->flags.nic_core_reset_owner = 0;
6733                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
6734                             "Reset_owner reset by 0x%x.\n",
6735                             ha->portnum);
6736                         goto exit;
6737                 case QLA8XXX_DEV_COLD:
6738                         if (ha->flags.nic_core_reset_owner)
6739                                 rval = qla83xx_device_bootstrap(base_vha);
6740                         else {
6741                         /* Wait for AEN to change device-state */
6742                                 qla83xx_idc_unlock(base_vha, 0);
6743                                 msleep(1000);
6744                                 qla83xx_idc_lock(base_vha, 0);
6745                         }
6746                         break;
6747                 case QLA8XXX_DEV_INITIALIZING:
6748                         /* Wait for AEN to change device-state */
6749                         qla83xx_idc_unlock(base_vha, 0);
6750                         msleep(1000);
6751                         qla83xx_idc_lock(base_vha, 0);
6752                         break;
6753                 case QLA8XXX_DEV_NEED_RESET:
6754                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
6755                                 qla83xx_need_reset_handler(base_vha);
6756                         else {
6757                                 /* Wait for AEN to change device-state */
6758                                 qla83xx_idc_unlock(base_vha, 0);
6759                                 msleep(1000);
6760                                 qla83xx_idc_lock(base_vha, 0);
6761                         }
6762                         /* reset timeout value after need reset handler */
6763                         dev_init_timeout = jiffies +
6764                             (ha->fcoe_dev_init_timeout * HZ);
6765                         break;
6766                 case QLA8XXX_DEV_NEED_QUIESCENT:
6767                         /* XXX: DEBUG for now */
6768                         qla83xx_idc_unlock(base_vha, 0);
6769                         msleep(1000);
6770                         qla83xx_idc_lock(base_vha, 0);
6771                         break;
6772                 case QLA8XXX_DEV_QUIESCENT:
6773                         /* XXX: DEBUG for now */
6774                         if (ha->flags.quiesce_owner)
6775                                 goto exit;
6776
6777                         qla83xx_idc_unlock(base_vha, 0);
6778                         msleep(1000);
6779                         qla83xx_idc_lock(base_vha, 0);
6780                         dev_init_timeout = jiffies +
6781                             (ha->fcoe_dev_init_timeout * HZ);
6782                         break;
6783                 case QLA8XXX_DEV_FAILED:
6784                         if (ha->flags.nic_core_reset_owner)
6785                                 qla83xx_idc_audit(base_vha,
6786                                     IDC_AUDIT_COMPLETION);
6787                         ha->flags.nic_core_reset_owner = 0;
6788                         __qla83xx_clear_drv_presence(base_vha);
6789                         qla83xx_idc_unlock(base_vha, 0);
6790                         qla8xxx_dev_failed_handler(base_vha);
6791                         rval = QLA_FUNCTION_FAILED;
6792                         qla83xx_idc_lock(base_vha, 0);
6793                         goto exit;
6794                 case QLA8XXX_BAD_VALUE:
6795                         qla83xx_idc_unlock(base_vha, 0);
6796                         msleep(1000);
6797                         qla83xx_idc_lock(base_vha, 0);
6798                         break;
6799                 default:
6800                         ql_log(ql_log_warn, base_vha, 0xb071,
6801                             "Unknown Device State: %x.\n", dev_state);
6802                         qla83xx_idc_unlock(base_vha, 0);
6803                         qla8xxx_dev_failed_handler(base_vha);
6804                         rval = QLA_FUNCTION_FAILED;
6805                         qla83xx_idc_lock(base_vha, 0);
6806                         goto exit;
6807                 }
6808         }
6809
6810 exit:
6811         return rval;
6812 }
6813
6814 void
6815 qla2x00_disable_board_on_pci_error(struct work_struct *work)
6816 {
6817         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
6818             board_disable);
6819         struct pci_dev *pdev = ha->pdev;
6820         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
6821
6822         ql_log(ql_log_warn, base_vha, 0x015b,
6823             "Disabling adapter.\n");
6824
6825         if (!atomic_read(&pdev->enable_cnt)) {
6826                 ql_log(ql_log_info, base_vha, 0xfffc,
6827                     "PCI device disabled, no action req for PCI error=%lx\n",
6828                     base_vha->pci_flags);
6829                 return;
6830         }
6831
6832         /*
6833          * if UNLOADING flag is already set, then continue unload,
6834          * where it was set first.
6835          */
6836         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
6837                 return;
6838
6839         qla2x00_wait_for_sess_deletion(base_vha);
6840
6841         qla2x00_delete_all_vps(ha, base_vha);
6842
6843         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6844
6845         qla2x00_dfs_remove(base_vha);
6846
6847         qla84xx_put_chip(base_vha);
6848
6849         if (base_vha->timer_active)
6850                 qla2x00_stop_timer(base_vha);
6851
6852         base_vha->flags.online = 0;
6853
6854         qla2x00_destroy_deferred_work(ha);
6855
6856         /*
6857          * Do not try to stop beacon blink as it will issue a mailbox
6858          * command.
6859          */
6860         qla2x00_free_sysfs_attr(base_vha, false);
6861
6862         fc_remove_host(base_vha->host);
6863
6864         scsi_remove_host(base_vha->host);
6865
6866         base_vha->flags.init_done = 0;
6867         qla25xx_delete_queues(base_vha);
6868         qla2x00_free_fcports(base_vha);
6869         qla2x00_free_irqs(base_vha);
6870         qla2x00_mem_free(ha);
6871         qla82xx_md_free(base_vha);
6872         qla2x00_free_queues(ha);
6873
6874         qla2x00_unmap_iobases(ha);
6875
6876         pci_release_selected_regions(ha->pdev, ha->bars);
6877         pci_disable_device(pdev);
6878
6879         /*
6880          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
6881          */
6882 }
6883
6884 /**************************************************************************
6885 * qla2x00_do_dpc
6886 *   This kernel thread is a task that is schedule by the interrupt handler
6887 *   to perform the background processing for interrupts.
6888 *
6889 * Notes:
6890 * This task always run in the context of a kernel thread.  It
6891 * is kick-off by the driver's detect code and starts up
6892 * up one per adapter. It immediately goes to sleep and waits for
6893 * some fibre event.  When either the interrupt handler or
6894 * the timer routine detects a event it will one of the task
6895 * bits then wake us up.
6896 **************************************************************************/
6897 static int
6898 qla2x00_do_dpc(void *data)
6899 {
6900         scsi_qla_host_t *base_vha;
6901         struct qla_hw_data *ha;
6902         uint32_t online;
6903         struct qla_qpair *qpair;
6904
6905         ha = (struct qla_hw_data *)data;
6906         base_vha = pci_get_drvdata(ha->pdev);
6907
6908         set_user_nice(current, MIN_NICE);
6909
6910         set_current_state(TASK_INTERRUPTIBLE);
6911         while (!kthread_should_stop()) {
6912                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
6913                     "DPC handler sleeping.\n");
6914
6915                 schedule();
6916
6917                 if (test_and_clear_bit(DO_EEH_RECOVERY, &base_vha->dpc_flags))
6918                         qla_pci_set_eeh_busy(base_vha);
6919
6920                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
6921                         goto end_loop;
6922
6923                 if (ha->flags.eeh_busy) {
6924                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
6925                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
6926                         goto end_loop;
6927                 }
6928
6929                 ha->dpc_active = 1;
6930
6931                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
6932                     "DPC handler waking up, dpc_flags=0x%lx.\n",
6933                     base_vha->dpc_flags);
6934
6935                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
6936                         break;
6937
6938                 if (IS_P3P_TYPE(ha)) {
6939                         if (IS_QLA8044(ha)) {
6940                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6941                                         &base_vha->dpc_flags)) {
6942                                         qla8044_idc_lock(ha);
6943                                         qla8044_wr_direct(base_vha,
6944                                                 QLA8044_CRB_DEV_STATE_INDEX,
6945                                                 QLA8XXX_DEV_FAILED);
6946                                         qla8044_idc_unlock(ha);
6947                                         ql_log(ql_log_info, base_vha, 0x4004,
6948                                                 "HW State: FAILED.\n");
6949                                         qla8044_device_state_handler(base_vha);
6950                                         continue;
6951                                 }
6952
6953                         } else {
6954                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6955                                         &base_vha->dpc_flags)) {
6956                                         qla82xx_idc_lock(ha);
6957                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6958                                                 QLA8XXX_DEV_FAILED);
6959                                         qla82xx_idc_unlock(ha);
6960                                         ql_log(ql_log_info, base_vha, 0x0151,
6961                                                 "HW State: FAILED.\n");
6962                                         qla82xx_device_state_handler(base_vha);
6963                                         continue;
6964                                 }
6965                         }
6966
6967                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
6968                                 &base_vha->dpc_flags)) {
6969
6970                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
6971                                     "FCoE context reset scheduled.\n");
6972                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
6973                                         &base_vha->dpc_flags))) {
6974                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
6975                                                 /* FCoE-ctx reset failed.
6976                                                  * Escalate to chip-reset
6977                                                  */
6978                                                 set_bit(ISP_ABORT_NEEDED,
6979                                                         &base_vha->dpc_flags);
6980                                         }
6981                                         clear_bit(ABORT_ISP_ACTIVE,
6982                                                 &base_vha->dpc_flags);
6983                                 }
6984
6985                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
6986                                     "FCoE context reset end.\n");
6987                         }
6988                 } else if (IS_QLAFX00(ha)) {
6989                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
6990                                 &base_vha->dpc_flags)) {
6991                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
6992                                     "Firmware Reset Recovery\n");
6993                                 if (qlafx00_reset_initialize(base_vha)) {
6994                                         /* Failed. Abort isp later. */
6995                                         if (!test_bit(UNLOADING,
6996                                             &base_vha->dpc_flags)) {
6997                                                 set_bit(ISP_UNRECOVERABLE,
6998                                                     &base_vha->dpc_flags);
6999                                                 ql_dbg(ql_dbg_dpc, base_vha,
7000                                                     0x4021,
7001                                                     "Reset Recovery Failed\n");
7002                                         }
7003                                 }
7004                         }
7005
7006                         if (test_and_clear_bit(FX00_TARGET_SCAN,
7007                                 &base_vha->dpc_flags)) {
7008                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
7009                                     "ISPFx00 Target Scan scheduled\n");
7010                                 if (qlafx00_rescan_isp(base_vha)) {
7011                                         if (!test_bit(UNLOADING,
7012                                             &base_vha->dpc_flags))
7013                                                 set_bit(ISP_UNRECOVERABLE,
7014                                                     &base_vha->dpc_flags);
7015                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
7016                                             "ISPFx00 Target Scan Failed\n");
7017                                 }
7018                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
7019                                     "ISPFx00 Target Scan End\n");
7020                         }
7021                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
7022                                 &base_vha->dpc_flags)) {
7023                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
7024                                     "ISPFx00 Host Info resend scheduled\n");
7025                                 qlafx00_fx_disc(base_vha,
7026                                     &base_vha->hw->mr.fcport,
7027                                     FXDISC_REG_HOST_INFO);
7028                         }
7029                 }
7030
7031                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
7032                     &base_vha->dpc_flags)) {
7033                         /* Semantic:
7034                          *  - NO-OP -- await next ISP-ABORT. Preferred method
7035                          *             to minimize disruptions that will occur
7036                          *             when a forced chip-reset occurs.
7037                          *  - Force -- ISP-ABORT scheduled.
7038                          */
7039                         /* set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags); */
7040                 }
7041
7042                 if (test_and_clear_bit
7043                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
7044                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
7045                         bool do_reset = true;
7046
7047                         switch (base_vha->qlini_mode) {
7048                         case QLA2XXX_INI_MODE_ENABLED:
7049                                 break;
7050                         case QLA2XXX_INI_MODE_DISABLED:
7051                                 if (!qla_tgt_mode_enabled(base_vha) &&
7052                                     !ha->flags.fw_started)
7053                                         do_reset = false;
7054                                 break;
7055                         case QLA2XXX_INI_MODE_DUAL:
7056                                 if (!qla_dual_mode_enabled(base_vha) &&
7057                                     !ha->flags.fw_started)
7058                                         do_reset = false;
7059                                 break;
7060                         default:
7061                                 break;
7062                         }
7063
7064                         if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
7065                             &base_vha->dpc_flags))) {
7066                                 base_vha->flags.online = 1;
7067                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
7068                                     "ISP abort scheduled.\n");
7069                                 if (ha->isp_ops->abort_isp(base_vha)) {
7070                                         /* failed. retry later */
7071                                         set_bit(ISP_ABORT_NEEDED,
7072                                             &base_vha->dpc_flags);
7073                                 }
7074                                 clear_bit(ABORT_ISP_ACTIVE,
7075                                                 &base_vha->dpc_flags);
7076                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
7077                                     "ISP abort end.\n");
7078                         }
7079                 }
7080
7081                 if (test_bit(PROCESS_PUREX_IOCB, &base_vha->dpc_flags)) {
7082                         if (atomic_read(&base_vha->loop_state) == LOOP_READY) {
7083                                 qla24xx_process_purex_list
7084                                         (&base_vha->purex_list);
7085                                 clear_bit(PROCESS_PUREX_IOCB,
7086                                     &base_vha->dpc_flags);
7087                         }
7088                 }
7089
7090                 if (IS_QLAFX00(ha))
7091                         goto loop_resync_check;
7092
7093                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
7094                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
7095                             "Quiescence mode scheduled.\n");
7096                         if (IS_P3P_TYPE(ha)) {
7097                                 if (IS_QLA82XX(ha))
7098                                         qla82xx_device_state_handler(base_vha);
7099                                 if (IS_QLA8044(ha))
7100                                         qla8044_device_state_handler(base_vha);
7101                                 clear_bit(ISP_QUIESCE_NEEDED,
7102                                     &base_vha->dpc_flags);
7103                                 if (!ha->flags.quiesce_owner) {
7104                                         qla2x00_perform_loop_resync(base_vha);
7105                                         if (IS_QLA82XX(ha)) {
7106                                                 qla82xx_idc_lock(ha);
7107                                                 qla82xx_clear_qsnt_ready(
7108                                                     base_vha);
7109                                                 qla82xx_idc_unlock(ha);
7110                                         } else if (IS_QLA8044(ha)) {
7111                                                 qla8044_idc_lock(ha);
7112                                                 qla8044_clear_qsnt_ready(
7113                                                     base_vha);
7114                                                 qla8044_idc_unlock(ha);
7115                                         }
7116                                 }
7117                         } else {
7118                                 clear_bit(ISP_QUIESCE_NEEDED,
7119                                     &base_vha->dpc_flags);
7120                                 qla2x00_quiesce_io(base_vha);
7121                         }
7122                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
7123                             "Quiescence mode end.\n");
7124                 }
7125
7126                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
7127                                 &base_vha->dpc_flags) &&
7128                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
7129
7130                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
7131                             "Reset marker scheduled.\n");
7132                         qla2x00_rst_aen(base_vha);
7133                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
7134                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
7135                             "Reset marker end.\n");
7136                 }
7137
7138                 /* Retry each device up to login retry count */
7139                 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
7140                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
7141                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
7142
7143                         if (!base_vha->relogin_jif ||
7144                             time_after_eq(jiffies, base_vha->relogin_jif)) {
7145                                 base_vha->relogin_jif = jiffies + HZ;
7146                                 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
7147
7148                                 ql_dbg(ql_dbg_disc, base_vha, 0x400d,
7149                                     "Relogin scheduled.\n");
7150                                 qla24xx_post_relogin_work(base_vha);
7151                         }
7152                 }
7153 loop_resync_check:
7154                 if (!qla2x00_reset_active(base_vha) &&
7155                     test_and_clear_bit(LOOP_RESYNC_NEEDED,
7156                     &base_vha->dpc_flags)) {
7157                         /*
7158                          * Allow abort_isp to complete before moving on to scanning.
7159                          */
7160                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
7161                             "Loop resync scheduled.\n");
7162
7163                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
7164                             &base_vha->dpc_flags))) {
7165
7166                                 qla2x00_loop_resync(base_vha);
7167
7168                                 clear_bit(LOOP_RESYNC_ACTIVE,
7169                                                 &base_vha->dpc_flags);
7170                         }
7171
7172                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
7173                             "Loop resync end.\n");
7174                 }
7175
7176                 if (IS_QLAFX00(ha))
7177                         goto intr_on_check;
7178
7179                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
7180                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
7181                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
7182                         qla2xxx_flash_npiv_conf(base_vha);
7183                 }
7184
7185 intr_on_check:
7186                 if (!ha->interrupts_on)
7187                         ha->isp_ops->enable_intrs(ha);
7188
7189                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
7190                                         &base_vha->dpc_flags)) {
7191                         if (ha->beacon_blink_led == 1)
7192                                 ha->isp_ops->beacon_blink(base_vha);
7193                 }
7194
7195                 /* qpair online check */
7196                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
7197                     &base_vha->dpc_flags)) {
7198                         if (ha->flags.eeh_busy ||
7199                             ha->flags.pci_channel_io_perm_failure)
7200                                 online = 0;
7201                         else
7202                                 online = 1;
7203
7204                         mutex_lock(&ha->mq_lock);
7205                         list_for_each_entry(qpair, &base_vha->qp_list,
7206                             qp_list_elem)
7207                         qpair->online = online;
7208                         mutex_unlock(&ha->mq_lock);
7209                 }
7210
7211                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED,
7212                                        &base_vha->dpc_flags)) {
7213                         u16 threshold = ha->nvme_last_rptd_aen + ha->last_zio_threshold;
7214
7215                         if (threshold > ha->orig_fw_xcb_count)
7216                                 threshold = ha->orig_fw_xcb_count;
7217
7218                         ql_log(ql_log_info, base_vha, 0xffffff,
7219                                "SET ZIO Activity exchange threshold to %d.\n",
7220                                threshold);
7221                         if (qla27xx_set_zio_threshold(base_vha, threshold)) {
7222                                 ql_log(ql_log_info, base_vha, 0xffffff,
7223                                        "Unable to SET ZIO Activity exchange threshold to %d.\n",
7224                                        threshold);
7225                         }
7226                 }
7227
7228                 if (!IS_QLAFX00(ha))
7229                         qla2x00_do_dpc_all_vps(base_vha);
7230
7231                 if (test_and_clear_bit(N2N_LINK_RESET,
7232                         &base_vha->dpc_flags)) {
7233                         qla2x00_lip_reset(base_vha);
7234                 }
7235
7236                 ha->dpc_active = 0;
7237 end_loop:
7238                 set_current_state(TASK_INTERRUPTIBLE);
7239         } /* End of while(1) */
7240         __set_current_state(TASK_RUNNING);
7241
7242         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
7243             "DPC handler exiting.\n");
7244
7245         /*
7246          * Make sure that nobody tries to wake us up again.
7247          */
7248         ha->dpc_active = 0;
7249
7250         /* Cleanup any residual CTX SRBs. */
7251         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
7252
7253         return 0;
7254 }
7255
7256 void
7257 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
7258 {
7259         struct qla_hw_data *ha = vha->hw;
7260         struct task_struct *t = ha->dpc_thread;
7261
7262         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
7263                 wake_up_process(t);
7264 }
7265
7266 /*
7267 *  qla2x00_rst_aen
7268 *      Processes asynchronous reset.
7269 *
7270 * Input:
7271 *      ha  = adapter block pointer.
7272 */
7273 static void
7274 qla2x00_rst_aen(scsi_qla_host_t *vha)
7275 {
7276         if (vha->flags.online && !vha->flags.reset_active &&
7277             !atomic_read(&vha->loop_down_timer) &&
7278             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
7279                 do {
7280                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7281
7282                         /*
7283                          * Issue marker command only when we are going to start
7284                          * the I/O.
7285                          */
7286                         vha->marker_needed = 1;
7287                 } while (!atomic_read(&vha->loop_down_timer) &&
7288                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
7289         }
7290 }
7291
7292 static bool qla_do_heartbeat(struct scsi_qla_host *vha)
7293 {
7294         struct qla_hw_data *ha = vha->hw;
7295         u32 cmpl_cnt;
7296         u16 i;
7297         bool do_heartbeat = false;
7298
7299         /*
7300          * Allow do_heartbeat only if we don’t have any active interrupts,
7301          * but there are still IOs outstanding with firmware.
7302          */
7303         cmpl_cnt = ha->base_qpair->cmd_completion_cnt;
7304         if (cmpl_cnt == ha->base_qpair->prev_completion_cnt &&
7305             cmpl_cnt != ha->base_qpair->cmd_cnt) {
7306                 do_heartbeat = true;
7307                 goto skip;
7308         }
7309         ha->base_qpair->prev_completion_cnt = cmpl_cnt;
7310
7311         for (i = 0; i < ha->max_qpairs; i++) {
7312                 if (ha->queue_pair_map[i]) {
7313                         cmpl_cnt = ha->queue_pair_map[i]->cmd_completion_cnt;
7314                         if (cmpl_cnt == ha->queue_pair_map[i]->prev_completion_cnt &&
7315                             cmpl_cnt != ha->queue_pair_map[i]->cmd_cnt) {
7316                                 do_heartbeat = true;
7317                                 break;
7318                         }
7319                         ha->queue_pair_map[i]->prev_completion_cnt = cmpl_cnt;
7320                 }
7321         }
7322
7323 skip:
7324         return do_heartbeat;
7325 }
7326
7327 static void qla_heart_beat(struct scsi_qla_host *vha, u16 dpc_started)
7328 {
7329         struct qla_hw_data *ha = vha->hw;
7330
7331         if (vha->vp_idx)
7332                 return;
7333
7334         if (vha->hw->flags.eeh_busy || qla2x00_chip_is_down(vha))
7335                 return;
7336
7337         /*
7338          * dpc thread cannot run if heartbeat is running at the same time.
7339          * We also do not want to starve heartbeat task. Therefore, do
7340          * heartbeat task at least once every 5 seconds.
7341          */
7342         if (dpc_started &&
7343             time_before(jiffies, ha->last_heartbeat_run_jiffies + 5 * HZ))
7344                 return;
7345
7346         if (qla_do_heartbeat(vha)) {
7347                 ha->last_heartbeat_run_jiffies = jiffies;
7348                 queue_work(ha->wq, &ha->heartbeat_work);
7349         }
7350 }
7351
7352 static void qla_wind_down_chip(scsi_qla_host_t *vha)
7353 {
7354         struct qla_hw_data *ha = vha->hw;
7355
7356         if (!ha->flags.eeh_busy)
7357                 return;
7358         if (ha->pci_error_state)
7359                 /* system is trying to recover */
7360                 return;
7361
7362         /*
7363          * Current system is not handling PCIE error.  At this point, this is
7364          * best effort to wind down the adapter.
7365          */
7366         if (time_after_eq(jiffies, ha->eeh_jif + ql2xdelay_before_pci_error_handling * HZ) &&
7367             !ha->flags.eeh_flush) {
7368                 ql_log(ql_log_info, vha, 0x9009,
7369                     "PCI Error detected, attempting to reset hardware.\n");
7370
7371                 ha->isp_ops->reset_chip(vha);
7372                 ha->isp_ops->disable_intrs(ha);
7373
7374                 ha->flags.eeh_flush = EEH_FLUSH_RDY;
7375                 ha->eeh_jif = jiffies;
7376
7377         } else if (ha->flags.eeh_flush == EEH_FLUSH_RDY &&
7378             time_after_eq(jiffies, ha->eeh_jif +  5 * HZ)) {
7379                 pci_clear_master(ha->pdev);
7380
7381                 /* flush all command */
7382                 qla2x00_abort_isp_cleanup(vha);
7383                 ha->flags.eeh_flush = EEH_FLUSH_DONE;
7384
7385                 ql_log(ql_log_info, vha, 0x900a,
7386                     "PCI Error handling complete, all IOs aborted.\n");
7387         }
7388 }
7389
7390 /**************************************************************************
7391 *   qla2x00_timer
7392 *
7393 * Description:
7394 *   One second timer
7395 *
7396 * Context: Interrupt
7397 ***************************************************************************/
7398 void
7399 qla2x00_timer(struct timer_list *t)
7400 {
7401         scsi_qla_host_t *vha = from_timer(vha, t, timer);
7402         unsigned long   cpu_flags = 0;
7403         int             start_dpc = 0;
7404         int             index;
7405         srb_t           *sp;
7406         uint16_t        w;
7407         struct qla_hw_data *ha = vha->hw;
7408         struct req_que *req;
7409         unsigned long flags;
7410         fc_port_t *fcport = NULL;
7411
7412         if (ha->flags.eeh_busy) {
7413                 qla_wind_down_chip(vha);
7414
7415                 ql_dbg(ql_dbg_timer, vha, 0x6000,
7416                     "EEH = %d, restarting timer.\n",
7417                     ha->flags.eeh_busy);
7418                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
7419                 return;
7420         }
7421
7422         /*
7423          * Hardware read to raise pending EEH errors during mailbox waits. If
7424          * the read returns -1 then disable the board.
7425          */
7426         if (!pci_channel_offline(ha->pdev)) {
7427                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
7428                 qla2x00_check_reg16_for_disconnect(vha, w);
7429         }
7430
7431         /* Make sure qla82xx_watchdog is run only for physical port */
7432         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
7433                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
7434                         start_dpc++;
7435                 if (IS_QLA82XX(ha))
7436                         qla82xx_watchdog(vha);
7437                 else if (IS_QLA8044(ha))
7438                         qla8044_watchdog(vha);
7439         }
7440
7441         if (!vha->vp_idx && IS_QLAFX00(ha))
7442                 qlafx00_timer_routine(vha);
7443
7444         if (vha->link_down_time < QLA2XX_MAX_LINK_DOWN_TIME)
7445                 vha->link_down_time++;
7446
7447         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
7448         list_for_each_entry(fcport, &vha->vp_fcports, list) {
7449                 if (fcport->tgt_link_down_time < QLA2XX_MAX_LINK_DOWN_TIME)
7450                         fcport->tgt_link_down_time++;
7451         }
7452         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
7453
7454         /* Loop down handler. */
7455         if (atomic_read(&vha->loop_down_timer) > 0 &&
7456             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
7457             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
7458                 && vha->flags.online) {
7459
7460                 if (atomic_read(&vha->loop_down_timer) ==
7461                     vha->loop_down_abort_time) {
7462
7463                         ql_log(ql_log_info, vha, 0x6008,
7464                             "Loop down - aborting the queues before time expires.\n");
7465
7466                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
7467                                 atomic_set(&vha->loop_state, LOOP_DEAD);
7468
7469                         /*
7470                          * Schedule an ISP abort to return any FCP2-device
7471                          * commands.
7472                          */
7473                         /* NPIV - scan physical port only */
7474                         if (!vha->vp_idx) {
7475                                 spin_lock_irqsave(&ha->hardware_lock,
7476                                     cpu_flags);
7477                                 req = ha->req_q_map[0];
7478                                 for (index = 1;
7479                                     index < req->num_outstanding_cmds;
7480                                     index++) {
7481                                         fc_port_t *sfcp;
7482
7483                                         sp = req->outstanding_cmds[index];
7484                                         if (!sp)
7485                                                 continue;
7486                                         if (sp->cmd_type != TYPE_SRB)
7487                                                 continue;
7488                                         if (sp->type != SRB_SCSI_CMD)
7489                                                 continue;
7490                                         sfcp = sp->fcport;
7491                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
7492                                                 continue;
7493
7494                                         if (IS_QLA82XX(ha))
7495                                                 set_bit(FCOE_CTX_RESET_NEEDED,
7496                                                         &vha->dpc_flags);
7497                                         else
7498                                                 set_bit(ISP_ABORT_NEEDED,
7499                                                         &vha->dpc_flags);
7500                                         break;
7501                                 }
7502                                 spin_unlock_irqrestore(&ha->hardware_lock,
7503                                                                 cpu_flags);
7504                         }
7505                         start_dpc++;
7506                 }
7507
7508                 /* if the loop has been down for 4 minutes, reinit adapter */
7509                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
7510                         if (!(vha->device_flags & DFLG_NO_CABLE) && !vha->vp_idx) {
7511                                 ql_log(ql_log_warn, vha, 0x6009,
7512                                     "Loop down - aborting ISP.\n");
7513
7514                                 if (IS_QLA82XX(ha))
7515                                         set_bit(FCOE_CTX_RESET_NEEDED,
7516                                                 &vha->dpc_flags);
7517                                 else
7518                                         set_bit(ISP_ABORT_NEEDED,
7519                                                 &vha->dpc_flags);
7520                         }
7521                 }
7522                 ql_dbg(ql_dbg_timer, vha, 0x600a,
7523                     "Loop down - seconds remaining %d.\n",
7524                     atomic_read(&vha->loop_down_timer));
7525         }
7526         /* Check if beacon LED needs to be blinked for physical host only */
7527         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
7528                 /* There is no beacon_blink function for ISP82xx */
7529                 if (!IS_P3P_TYPE(ha)) {
7530                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
7531                         start_dpc++;
7532                 }
7533         }
7534
7535         /* check if edif running */
7536         if (vha->hw->flags.edif_enabled)
7537                 qla_edif_timer(vha);
7538
7539         /* Process any deferred work. */
7540         if (!list_empty(&vha->work_list)) {
7541                 unsigned long flags;
7542                 bool q = false;
7543
7544                 spin_lock_irqsave(&vha->work_lock, flags);
7545                 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
7546                         q = true;
7547                 spin_unlock_irqrestore(&vha->work_lock, flags);
7548                 if (q)
7549                         queue_work(vha->hw->wq, &vha->iocb_work);
7550         }
7551
7552         /*
7553          * FC-NVME
7554          * see if the active AEN count has changed from what was last reported.
7555          */
7556         index = atomic_read(&ha->nvme_active_aen_cnt);
7557         if (!vha->vp_idx &&
7558             (index != ha->nvme_last_rptd_aen) &&
7559             ha->zio_mode == QLA_ZIO_MODE_6 &&
7560             !ha->flags.host_shutting_down) {
7561                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
7562                 ql_log(ql_log_info, vha, 0x3002,
7563                     "nvme: Sched: Set ZIO exchange threshold to %d.\n",
7564                     ha->nvme_last_rptd_aen);
7565                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
7566                 start_dpc++;
7567         }
7568
7569         if (!vha->vp_idx &&
7570             atomic_read(&ha->zio_threshold) != ha->last_zio_threshold &&
7571             IS_ZIO_THRESHOLD_CAPABLE(ha)) {
7572                 ql_log(ql_log_info, vha, 0x3002,
7573                     "Sched: Set ZIO exchange threshold to %d.\n",
7574                     ha->last_zio_threshold);
7575                 ha->last_zio_threshold = atomic_read(&ha->zio_threshold);
7576                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
7577                 start_dpc++;
7578         }
7579         qla_adjust_buf(vha);
7580
7581         /* borrowing w to signify dpc will run */
7582         w = 0;
7583         /* Schedule the DPC routine if needed */
7584         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
7585             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
7586             start_dpc ||
7587             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
7588             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
7589             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
7590             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
7591             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
7592             test_bit(RELOGIN_NEEDED, &vha->dpc_flags) ||
7593             test_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags))) {
7594                 ql_dbg(ql_dbg_timer, vha, 0x600b,
7595                     "isp_abort_needed=%d loop_resync_needed=%d "
7596                     "start_dpc=%d reset_marker_needed=%d",
7597                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
7598                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
7599                     start_dpc, test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
7600                 ql_dbg(ql_dbg_timer, vha, 0x600c,
7601                     "beacon_blink_needed=%d isp_unrecoverable=%d "
7602                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
7603                     "relogin_needed=%d, Process_purex_iocb=%d.\n",
7604                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
7605                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
7606                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
7607                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
7608                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags),
7609                     test_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags));
7610                 qla2xxx_wake_dpc(vha);
7611                 w = 1;
7612         }
7613
7614         qla_heart_beat(vha, w);
7615
7616         qla2x00_restart_timer(vha, WATCH_INTERVAL);
7617 }
7618
7619 /* Firmware interface routines. */
7620
7621 #define FW_ISP21XX      0
7622 #define FW_ISP22XX      1
7623 #define FW_ISP2300      2
7624 #define FW_ISP2322      3
7625 #define FW_ISP24XX      4
7626 #define FW_ISP25XX      5
7627 #define FW_ISP81XX      6
7628 #define FW_ISP82XX      7
7629 #define FW_ISP2031      8
7630 #define FW_ISP8031      9
7631 #define FW_ISP27XX      10
7632 #define FW_ISP28XX      11
7633
7634 #define FW_FILE_ISP21XX "ql2100_fw.bin"
7635 #define FW_FILE_ISP22XX "ql2200_fw.bin"
7636 #define FW_FILE_ISP2300 "ql2300_fw.bin"
7637 #define FW_FILE_ISP2322 "ql2322_fw.bin"
7638 #define FW_FILE_ISP24XX "ql2400_fw.bin"
7639 #define FW_FILE_ISP25XX "ql2500_fw.bin"
7640 #define FW_FILE_ISP81XX "ql8100_fw.bin"
7641 #define FW_FILE_ISP82XX "ql8200_fw.bin"
7642 #define FW_FILE_ISP2031 "ql2600_fw.bin"
7643 #define FW_FILE_ISP8031 "ql8300_fw.bin"
7644 #define FW_FILE_ISP27XX "ql2700_fw.bin"
7645 #define FW_FILE_ISP28XX "ql2800_fw.bin"
7646
7647
7648 static DEFINE_MUTEX(qla_fw_lock);
7649
7650 static struct fw_blob qla_fw_blobs[] = {
7651         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
7652         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
7653         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
7654         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
7655         { .name = FW_FILE_ISP24XX, },
7656         { .name = FW_FILE_ISP25XX, },
7657         { .name = FW_FILE_ISP81XX, },
7658         { .name = FW_FILE_ISP82XX, },
7659         { .name = FW_FILE_ISP2031, },
7660         { .name = FW_FILE_ISP8031, },
7661         { .name = FW_FILE_ISP27XX, },
7662         { .name = FW_FILE_ISP28XX, },
7663         { .name = NULL, },
7664 };
7665
7666 struct fw_blob *
7667 qla2x00_request_firmware(scsi_qla_host_t *vha)
7668 {
7669         struct qla_hw_data *ha = vha->hw;
7670         struct fw_blob *blob;
7671
7672         if (IS_QLA2100(ha)) {
7673                 blob = &qla_fw_blobs[FW_ISP21XX];
7674         } else if (IS_QLA2200(ha)) {
7675                 blob = &qla_fw_blobs[FW_ISP22XX];
7676         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
7677                 blob = &qla_fw_blobs[FW_ISP2300];
7678         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
7679                 blob = &qla_fw_blobs[FW_ISP2322];
7680         } else if (IS_QLA24XX_TYPE(ha)) {
7681                 blob = &qla_fw_blobs[FW_ISP24XX];
7682         } else if (IS_QLA25XX(ha)) {
7683                 blob = &qla_fw_blobs[FW_ISP25XX];
7684         } else if (IS_QLA81XX(ha)) {
7685                 blob = &qla_fw_blobs[FW_ISP81XX];
7686         } else if (IS_QLA82XX(ha)) {
7687                 blob = &qla_fw_blobs[FW_ISP82XX];
7688         } else if (IS_QLA2031(ha)) {
7689                 blob = &qla_fw_blobs[FW_ISP2031];
7690         } else if (IS_QLA8031(ha)) {
7691                 blob = &qla_fw_blobs[FW_ISP8031];
7692         } else if (IS_QLA27XX(ha)) {
7693                 blob = &qla_fw_blobs[FW_ISP27XX];
7694         } else if (IS_QLA28XX(ha)) {
7695                 blob = &qla_fw_blobs[FW_ISP28XX];
7696         } else {
7697                 return NULL;
7698         }
7699
7700         if (!blob->name)
7701                 return NULL;
7702
7703         mutex_lock(&qla_fw_lock);
7704         if (blob->fw)
7705                 goto out;
7706
7707         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
7708                 ql_log(ql_log_warn, vha, 0x0063,
7709                     "Failed to load firmware image (%s).\n", blob->name);
7710                 blob->fw = NULL;
7711                 blob = NULL;
7712         }
7713
7714 out:
7715         mutex_unlock(&qla_fw_lock);
7716         return blob;
7717 }
7718
7719 static void
7720 qla2x00_release_firmware(void)
7721 {
7722         struct fw_blob *blob;
7723
7724         mutex_lock(&qla_fw_lock);
7725         for (blob = qla_fw_blobs; blob->name; blob++)
7726                 release_firmware(blob->fw);
7727         mutex_unlock(&qla_fw_lock);
7728 }
7729
7730 static void qla_pci_error_cleanup(scsi_qla_host_t *vha)
7731 {
7732         struct qla_hw_data *ha = vha->hw;
7733         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
7734         struct qla_qpair *qpair = NULL;
7735         struct scsi_qla_host *vp, *tvp;
7736         fc_port_t *fcport;
7737         int i;
7738         unsigned long flags;
7739
7740         ql_dbg(ql_dbg_aer, vha, 0x9000,
7741                "%s\n", __func__);
7742         ha->chip_reset++;
7743
7744         ha->base_qpair->chip_reset = ha->chip_reset;
7745         for (i = 0; i < ha->max_qpairs; i++) {
7746                 if (ha->queue_pair_map[i])
7747                         ha->queue_pair_map[i]->chip_reset =
7748                             ha->base_qpair->chip_reset;
7749         }
7750
7751         /*
7752          * purge mailbox might take a while. Slot Reset/chip reset
7753          * will take care of the purge
7754          */
7755
7756         mutex_lock(&ha->mq_lock);
7757         ha->base_qpair->online = 0;
7758         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7759                 qpair->online = 0;
7760         wmb();
7761         mutex_unlock(&ha->mq_lock);
7762
7763         qla2x00_mark_all_devices_lost(vha);
7764
7765         spin_lock_irqsave(&ha->vport_slock, flags);
7766         list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7767                 atomic_inc(&vp->vref_count);
7768                 spin_unlock_irqrestore(&ha->vport_slock, flags);
7769                 qla2x00_mark_all_devices_lost(vp);
7770                 spin_lock_irqsave(&ha->vport_slock, flags);
7771                 atomic_dec(&vp->vref_count);
7772         }
7773         spin_unlock_irqrestore(&ha->vport_slock, flags);
7774
7775         /* Clear all async request states across all VPs. */
7776         list_for_each_entry(fcport, &vha->vp_fcports, list)
7777                 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7778
7779         spin_lock_irqsave(&ha->vport_slock, flags);
7780         list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7781                 atomic_inc(&vp->vref_count);
7782                 spin_unlock_irqrestore(&ha->vport_slock, flags);
7783                 list_for_each_entry(fcport, &vp->vp_fcports, list)
7784                         fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7785                 spin_lock_irqsave(&ha->vport_slock, flags);
7786                 atomic_dec(&vp->vref_count);
7787         }
7788         spin_unlock_irqrestore(&ha->vport_slock, flags);
7789 }
7790
7791
7792 static pci_ers_result_t
7793 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
7794 {
7795         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
7796         struct qla_hw_data *ha = vha->hw;
7797         pci_ers_result_t ret = PCI_ERS_RESULT_NEED_RESET;
7798
7799         ql_log(ql_log_warn, vha, 0x9000,
7800                "PCI error detected, state %x.\n", state);
7801         ha->pci_error_state = QLA_PCI_ERR_DETECTED;
7802
7803         if (!atomic_read(&pdev->enable_cnt)) {
7804                 ql_log(ql_log_info, vha, 0xffff,
7805                         "PCI device is disabled,state %x\n", state);
7806                 ret = PCI_ERS_RESULT_NEED_RESET;
7807                 goto out;
7808         }
7809
7810         switch (state) {
7811         case pci_channel_io_normal:
7812                 qla_pci_set_eeh_busy(vha);
7813                 if (ql2xmqsupport || ql2xnvmeenable) {
7814                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
7815                         qla2xxx_wake_dpc(vha);
7816                 }
7817                 ret = PCI_ERS_RESULT_CAN_RECOVER;
7818                 break;
7819         case pci_channel_io_frozen:
7820                 qla_pci_set_eeh_busy(vha);
7821                 ret = PCI_ERS_RESULT_NEED_RESET;
7822                 break;
7823         case pci_channel_io_perm_failure:
7824                 ha->flags.pci_channel_io_perm_failure = 1;
7825                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
7826                 if (ql2xmqsupport || ql2xnvmeenable) {
7827                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
7828                         qla2xxx_wake_dpc(vha);
7829                 }
7830                 ret = PCI_ERS_RESULT_DISCONNECT;
7831         }
7832 out:
7833         ql_dbg(ql_dbg_aer, vha, 0x600d,
7834                "PCI error detected returning [%x].\n", ret);
7835         return ret;
7836 }
7837
7838 static pci_ers_result_t
7839 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
7840 {
7841         int risc_paused = 0;
7842         uint32_t stat;
7843         unsigned long flags;
7844         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7845         struct qla_hw_data *ha = base_vha->hw;
7846         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7847         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
7848
7849         ql_log(ql_log_warn, base_vha, 0x9000,
7850                "mmio enabled\n");
7851
7852         ha->pci_error_state = QLA_PCI_MMIO_ENABLED;
7853
7854         if (IS_QLA82XX(ha))
7855                 return PCI_ERS_RESULT_RECOVERED;
7856
7857         if (qla2x00_isp_reg_stat(ha)) {
7858                 ql_log(ql_log_info, base_vha, 0x803f,
7859                     "During mmio enabled, PCI/Register disconnect still detected.\n");
7860                 goto out;
7861         }
7862
7863         spin_lock_irqsave(&ha->hardware_lock, flags);
7864         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
7865                 stat = rd_reg_word(&reg->hccr);
7866                 if (stat & HCCR_RISC_PAUSE)
7867                         risc_paused = 1;
7868         } else if (IS_QLA23XX(ha)) {
7869                 stat = rd_reg_dword(&reg->u.isp2300.host_status);
7870                 if (stat & HSR_RISC_PAUSED)
7871                         risc_paused = 1;
7872         } else if (IS_FWI2_CAPABLE(ha)) {
7873                 stat = rd_reg_dword(&reg24->host_status);
7874                 if (stat & HSRX_RISC_PAUSED)
7875                         risc_paused = 1;
7876         }
7877         spin_unlock_irqrestore(&ha->hardware_lock, flags);
7878
7879         if (risc_paused) {
7880                 ql_log(ql_log_info, base_vha, 0x9003,
7881                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
7882                 qla2xxx_dump_fw(base_vha);
7883         }
7884 out:
7885         /* set PCI_ERS_RESULT_NEED_RESET to trigger call to qla2xxx_pci_slot_reset */
7886         ql_dbg(ql_dbg_aer, base_vha, 0x600d,
7887                "mmio enabled returning.\n");
7888         return PCI_ERS_RESULT_NEED_RESET;
7889 }
7890
7891 static pci_ers_result_t
7892 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
7893 {
7894         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
7895         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7896         struct qla_hw_data *ha = base_vha->hw;
7897         int rc;
7898         struct qla_qpair *qpair = NULL;
7899
7900         ql_log(ql_log_warn, base_vha, 0x9004,
7901                "Slot Reset.\n");
7902
7903         ha->pci_error_state = QLA_PCI_SLOT_RESET;
7904         /* Workaround: qla2xxx driver which access hardware earlier
7905          * needs error state to be pci_channel_io_online.
7906          * Otherwise mailbox command timesout.
7907          */
7908         pdev->error_state = pci_channel_io_normal;
7909
7910         pci_restore_state(pdev);
7911
7912         /* pci_restore_state() clears the saved_state flag of the device
7913          * save restored state which resets saved_state flag
7914          */
7915         pci_save_state(pdev);
7916
7917         if (ha->mem_only)
7918                 rc = pci_enable_device_mem(pdev);
7919         else
7920                 rc = pci_enable_device(pdev);
7921
7922         if (rc) {
7923                 ql_log(ql_log_warn, base_vha, 0x9005,
7924                     "Can't re-enable PCI device after reset.\n");
7925                 goto exit_slot_reset;
7926         }
7927
7928
7929         if (ha->isp_ops->pci_config(base_vha))
7930                 goto exit_slot_reset;
7931
7932         mutex_lock(&ha->mq_lock);
7933         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7934                 qpair->online = 1;
7935         mutex_unlock(&ha->mq_lock);
7936
7937         ha->flags.eeh_busy = 0;
7938         base_vha->flags.online = 1;
7939         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7940         ha->isp_ops->abort_isp(base_vha);
7941         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7942
7943         if (qla2x00_isp_reg_stat(ha)) {
7944                 ha->flags.eeh_busy = 1;
7945                 qla_pci_error_cleanup(base_vha);
7946                 ql_log(ql_log_warn, base_vha, 0x9005,
7947                        "Device unable to recover from PCI error.\n");
7948         } else {
7949                 ret =  PCI_ERS_RESULT_RECOVERED;
7950         }
7951
7952 exit_slot_reset:
7953         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
7954             "Slot Reset returning %x.\n", ret);
7955
7956         return ret;
7957 }
7958
7959 static void
7960 qla2xxx_pci_resume(struct pci_dev *pdev)
7961 {
7962         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7963         struct qla_hw_data *ha = base_vha->hw;
7964         int ret;
7965
7966         ql_log(ql_log_warn, base_vha, 0x900f,
7967                "Pci Resume.\n");
7968
7969
7970         ret = qla2x00_wait_for_hba_online(base_vha);
7971         if (ret != QLA_SUCCESS) {
7972                 ql_log(ql_log_fatal, base_vha, 0x9002,
7973                     "The device failed to resume I/O from slot/link_reset.\n");
7974         }
7975         ha->pci_error_state = QLA_PCI_RESUME;
7976         ql_dbg(ql_dbg_aer, base_vha, 0x600d,
7977                "Pci Resume returning.\n");
7978 }
7979
7980 void qla_pci_set_eeh_busy(struct scsi_qla_host *vha)
7981 {
7982         struct qla_hw_data *ha = vha->hw;
7983         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7984         bool do_cleanup = false;
7985         unsigned long flags;
7986
7987         if (ha->flags.eeh_busy)
7988                 return;
7989
7990         spin_lock_irqsave(&base_vha->work_lock, flags);
7991         if (!ha->flags.eeh_busy) {
7992                 ha->eeh_jif = jiffies;
7993                 ha->flags.eeh_flush = 0;
7994
7995                 ha->flags.eeh_busy = 1;
7996                 do_cleanup = true;
7997         }
7998         spin_unlock_irqrestore(&base_vha->work_lock, flags);
7999
8000         if (do_cleanup)
8001                 qla_pci_error_cleanup(base_vha);
8002 }
8003
8004 /*
8005  * this routine will schedule a task to pause IO from interrupt context
8006  * if caller sees a PCIE error event (register read = 0xf's)
8007  */
8008 void qla_schedule_eeh_work(struct scsi_qla_host *vha)
8009 {
8010         struct qla_hw_data *ha = vha->hw;
8011         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
8012
8013         if (ha->flags.eeh_busy)
8014                 return;
8015
8016         set_bit(DO_EEH_RECOVERY, &base_vha->dpc_flags);
8017         qla2xxx_wake_dpc(base_vha);
8018 }
8019
8020 static void
8021 qla_pci_reset_prepare(struct pci_dev *pdev)
8022 {
8023         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
8024         struct qla_hw_data *ha = base_vha->hw;
8025         struct qla_qpair *qpair;
8026
8027         ql_log(ql_log_warn, base_vha, 0xffff,
8028             "%s.\n", __func__);
8029
8030         /*
8031          * PCI FLR/function reset is about to reset the
8032          * slot. Stop the chip to stop all DMA access.
8033          * It is assumed that pci_reset_done will be called
8034          * after FLR to resume Chip operation.
8035          */
8036         ha->flags.eeh_busy = 1;
8037         mutex_lock(&ha->mq_lock);
8038         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
8039                 qpair->online = 0;
8040         mutex_unlock(&ha->mq_lock);
8041
8042         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
8043         qla2x00_abort_isp_cleanup(base_vha);
8044         qla2x00_abort_all_cmds(base_vha, DID_RESET << 16);
8045 }
8046
8047 static void
8048 qla_pci_reset_done(struct pci_dev *pdev)
8049 {
8050         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
8051         struct qla_hw_data *ha = base_vha->hw;
8052         struct qla_qpair *qpair;
8053
8054         ql_log(ql_log_warn, base_vha, 0xffff,
8055             "%s.\n", __func__);
8056
8057         /*
8058          * FLR just completed by PCI layer. Resume adapter
8059          */
8060         ha->flags.eeh_busy = 0;
8061         mutex_lock(&ha->mq_lock);
8062         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
8063                 qpair->online = 1;
8064         mutex_unlock(&ha->mq_lock);
8065
8066         base_vha->flags.online = 1;
8067         ha->isp_ops->abort_isp(base_vha);
8068         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
8069 }
8070
8071 static void qla2xxx_map_queues(struct Scsi_Host *shost)
8072 {
8073         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
8074         struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT];
8075
8076         if (USER_CTRL_IRQ(vha->hw) || !vha->hw->mqiobase)
8077                 blk_mq_map_queues(qmap);
8078         else
8079                 blk_mq_pci_map_queues(qmap, vha->hw->pdev, vha->irq_offset);
8080 }
8081
8082 struct scsi_host_template qla2xxx_driver_template = {
8083         .module                 = THIS_MODULE,
8084         .name                   = QLA2XXX_DRIVER_NAME,
8085         .queuecommand           = qla2xxx_queuecommand,
8086
8087         .eh_timed_out           = fc_eh_timed_out,
8088         .eh_abort_handler       = qla2xxx_eh_abort,
8089         .eh_should_retry_cmd    = fc_eh_should_retry_cmd,
8090         .eh_device_reset_handler = qla2xxx_eh_device_reset,
8091         .eh_target_reset_handler = qla2xxx_eh_target_reset,
8092         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
8093         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
8094
8095         .slave_configure        = qla2xxx_slave_configure,
8096
8097         .slave_alloc            = qla2xxx_slave_alloc,
8098         .slave_destroy          = qla2xxx_slave_destroy,
8099         .scan_finished          = qla2xxx_scan_finished,
8100         .scan_start             = qla2xxx_scan_start,
8101         .change_queue_depth     = scsi_change_queue_depth,
8102         .map_queues             = qla2xxx_map_queues,
8103         .this_id                = -1,
8104         .cmd_per_lun            = 3,
8105         .sg_tablesize           = SG_ALL,
8106
8107         .max_sectors            = 0xFFFF,
8108         .shost_groups           = qla2x00_host_groups,
8109
8110         .supported_mode         = MODE_INITIATOR,
8111         .track_queue_depth      = 1,
8112         .cmd_size               = sizeof(srb_t),
8113 };
8114
8115 static const struct pci_error_handlers qla2xxx_err_handler = {
8116         .error_detected = qla2xxx_pci_error_detected,
8117         .mmio_enabled = qla2xxx_pci_mmio_enabled,
8118         .slot_reset = qla2xxx_pci_slot_reset,
8119         .resume = qla2xxx_pci_resume,
8120         .reset_prepare = qla_pci_reset_prepare,
8121         .reset_done = qla_pci_reset_done,
8122 };
8123
8124 static struct pci_device_id qla2xxx_pci_tbl[] = {
8125         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
8126         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
8127         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
8128         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
8129         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
8130         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
8131         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
8132         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
8133         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
8134         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
8135         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
8136         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
8137         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
8138         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
8139         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
8140         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
8141         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
8142         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
8143         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
8144         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
8145         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
8146         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
8147         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2061) },
8148         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2081) },
8149         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2281) },
8150         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2089) },
8151         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2289) },
8152         { 0 },
8153 };
8154 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
8155
8156 static struct pci_driver qla2xxx_pci_driver = {
8157         .name           = QLA2XXX_DRIVER_NAME,
8158         .driver         = {
8159                 .owner          = THIS_MODULE,
8160         },
8161         .id_table       = qla2xxx_pci_tbl,
8162         .probe          = qla2x00_probe_one,
8163         .remove         = qla2x00_remove_one,
8164         .shutdown       = qla2x00_shutdown,
8165         .err_handler    = &qla2xxx_err_handler,
8166 };
8167
8168 static const struct file_operations apidev_fops = {
8169         .owner = THIS_MODULE,
8170         .llseek = noop_llseek,
8171 };
8172
8173 /**
8174  * qla2x00_module_init - Module initialization.
8175  **/
8176 static int __init
8177 qla2x00_module_init(void)
8178 {
8179         int ret = 0;
8180
8181         BUILD_BUG_ON(sizeof(cmd_a64_entry_t) != 64);
8182         BUILD_BUG_ON(sizeof(cmd_entry_t) != 64);
8183         BUILD_BUG_ON(sizeof(cont_a64_entry_t) != 64);
8184         BUILD_BUG_ON(sizeof(cont_entry_t) != 64);
8185         BUILD_BUG_ON(sizeof(init_cb_t) != 96);
8186         BUILD_BUG_ON(sizeof(mrk_entry_t) != 64);
8187         BUILD_BUG_ON(sizeof(ms_iocb_entry_t) != 64);
8188         BUILD_BUG_ON(sizeof(request_t) != 64);
8189         BUILD_BUG_ON(sizeof(struct abort_entry_24xx) != 64);
8190         BUILD_BUG_ON(sizeof(struct abort_iocb_entry_fx00) != 64);
8191         BUILD_BUG_ON(sizeof(struct abts_entry_24xx) != 64);
8192         BUILD_BUG_ON(sizeof(struct access_chip_84xx) != 64);
8193         BUILD_BUG_ON(sizeof(struct access_chip_rsp_84xx) != 64);
8194         BUILD_BUG_ON(sizeof(struct cmd_bidir) != 64);
8195         BUILD_BUG_ON(sizeof(struct cmd_nvme) != 64);
8196         BUILD_BUG_ON(sizeof(struct cmd_type_6) != 64);
8197         BUILD_BUG_ON(sizeof(struct cmd_type_7) != 64);
8198         BUILD_BUG_ON(sizeof(struct cmd_type_7_fx00) != 64);
8199         BUILD_BUG_ON(sizeof(struct cmd_type_crc_2) != 64);
8200         BUILD_BUG_ON(sizeof(struct ct_entry_24xx) != 64);
8201         BUILD_BUG_ON(sizeof(struct ct_fdmi1_hba_attributes) != 2604);
8202         BUILD_BUG_ON(sizeof(struct ct_fdmi2_hba_attributes) != 4424);
8203         BUILD_BUG_ON(sizeof(struct ct_fdmi2_port_attributes) != 4164);
8204         BUILD_BUG_ON(sizeof(struct ct_fdmi_hba_attr) != 260);
8205         BUILD_BUG_ON(sizeof(struct ct_fdmi_port_attr) != 260);
8206         BUILD_BUG_ON(sizeof(struct ct_rsp_hdr) != 16);
8207         BUILD_BUG_ON(sizeof(struct ctio_crc2_to_fw) != 64);
8208         BUILD_BUG_ON(sizeof(struct device_reg_24xx) != 256);
8209         BUILD_BUG_ON(sizeof(struct device_reg_25xxmq) != 24);
8210         BUILD_BUG_ON(sizeof(struct device_reg_2xxx) != 256);
8211         BUILD_BUG_ON(sizeof(struct device_reg_82xx) != 1288);
8212         BUILD_BUG_ON(sizeof(struct device_reg_fx00) != 216);
8213         BUILD_BUG_ON(sizeof(struct els_entry_24xx) != 64);
8214         BUILD_BUG_ON(sizeof(struct els_sts_entry_24xx) != 64);
8215         BUILD_BUG_ON(sizeof(struct fxdisc_entry_fx00) != 64);
8216         BUILD_BUG_ON(sizeof(struct imm_ntfy_from_isp) != 64);
8217         BUILD_BUG_ON(sizeof(struct init_cb_24xx) != 128);
8218         BUILD_BUG_ON(sizeof(struct init_cb_81xx) != 128);
8219         BUILD_BUG_ON(sizeof(struct logio_entry_24xx) != 64);
8220         BUILD_BUG_ON(sizeof(struct mbx_entry) != 64);
8221         BUILD_BUG_ON(sizeof(struct mid_init_cb_24xx) != 5252);
8222         BUILD_BUG_ON(sizeof(struct mrk_entry_24xx) != 64);
8223         BUILD_BUG_ON(sizeof(struct nvram_24xx) != 512);
8224         BUILD_BUG_ON(sizeof(struct nvram_81xx) != 512);
8225         BUILD_BUG_ON(sizeof(struct pt_ls4_request) != 64);
8226         BUILD_BUG_ON(sizeof(struct pt_ls4_rx_unsol) != 64);
8227         BUILD_BUG_ON(sizeof(struct purex_entry_24xx) != 64);
8228         BUILD_BUG_ON(sizeof(struct qla2100_fw_dump) != 123634);
8229         BUILD_BUG_ON(sizeof(struct qla2300_fw_dump) != 136100);
8230         BUILD_BUG_ON(sizeof(struct qla24xx_fw_dump) != 37976);
8231         BUILD_BUG_ON(sizeof(struct qla25xx_fw_dump) != 39228);
8232         BUILD_BUG_ON(sizeof(struct qla2xxx_fce_chain) != 52);
8233         BUILD_BUG_ON(sizeof(struct qla2xxx_fw_dump) != 136172);
8234         BUILD_BUG_ON(sizeof(struct qla2xxx_mq_chain) != 524);
8235         BUILD_BUG_ON(sizeof(struct qla2xxx_mqueue_chain) != 8);
8236         BUILD_BUG_ON(sizeof(struct qla2xxx_mqueue_header) != 12);
8237         BUILD_BUG_ON(sizeof(struct qla2xxx_offld_chain) != 24);
8238         BUILD_BUG_ON(sizeof(struct qla81xx_fw_dump) != 39420);
8239         BUILD_BUG_ON(sizeof(struct qla82xx_uri_data_desc) != 28);
8240         BUILD_BUG_ON(sizeof(struct qla82xx_uri_table_desc) != 32);
8241         BUILD_BUG_ON(sizeof(struct qla83xx_fw_dump) != 51196);
8242         BUILD_BUG_ON(sizeof(struct qla_fcp_prio_cfg) != FCP_PRIO_CFG_SIZE);
8243         BUILD_BUG_ON(sizeof(struct qla_fdt_layout) != 128);
8244         BUILD_BUG_ON(sizeof(struct qla_flt_header) != 8);
8245         BUILD_BUG_ON(sizeof(struct qla_flt_region) != 16);
8246         BUILD_BUG_ON(sizeof(struct qla_npiv_entry) != 24);
8247         BUILD_BUG_ON(sizeof(struct qla_npiv_header) != 16);
8248         BUILD_BUG_ON(sizeof(struct rdp_rsp_payload) != 336);
8249         BUILD_BUG_ON(sizeof(struct sns_cmd_pkt) != 2064);
8250         BUILD_BUG_ON(sizeof(struct sts_entry_24xx) != 64);
8251         BUILD_BUG_ON(sizeof(struct tsk_mgmt_entry) != 64);
8252         BUILD_BUG_ON(sizeof(struct tsk_mgmt_entry_fx00) != 64);
8253         BUILD_BUG_ON(sizeof(struct verify_chip_entry_84xx) != 64);
8254         BUILD_BUG_ON(sizeof(struct verify_chip_rsp_84xx) != 52);
8255         BUILD_BUG_ON(sizeof(struct vf_evfp_entry_24xx) != 56);
8256         BUILD_BUG_ON(sizeof(struct vp_config_entry_24xx) != 64);
8257         BUILD_BUG_ON(sizeof(struct vp_ctrl_entry_24xx) != 64);
8258         BUILD_BUG_ON(sizeof(struct vp_rpt_id_entry_24xx) != 64);
8259         BUILD_BUG_ON(sizeof(sts21_entry_t) != 64);
8260         BUILD_BUG_ON(sizeof(sts22_entry_t) != 64);
8261         BUILD_BUG_ON(sizeof(sts_cont_entry_t) != 64);
8262         BUILD_BUG_ON(sizeof(sts_entry_t) != 64);
8263         BUILD_BUG_ON(sizeof(sw_info_t) != 32);
8264         BUILD_BUG_ON(sizeof(target_id_t) != 2);
8265
8266         qla_trace_init();
8267
8268         /* Allocate cache for SRBs. */
8269         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
8270             SLAB_HWCACHE_ALIGN, NULL);
8271         if (srb_cachep == NULL) {
8272                 ql_log(ql_log_fatal, NULL, 0x0001,
8273                     "Unable to allocate SRB cache...Failing load!.\n");
8274                 return -ENOMEM;
8275         }
8276
8277         /* Initialize target kmem_cache and mem_pools */
8278         ret = qlt_init();
8279         if (ret < 0) {
8280                 goto destroy_cache;
8281         } else if (ret > 0) {
8282                 /*
8283                  * If initiator mode is explictly disabled by qlt_init(),
8284                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
8285                  * performing scsi_scan_target() during LOOP UP event.
8286                  */
8287                 qla2xxx_transport_functions.disable_target_scan = 1;
8288                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
8289         }
8290
8291         /* Derive version string. */
8292         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
8293         if (ql2xextended_error_logging)
8294                 strcat(qla2x00_version_str, "-debug");
8295         if (ql2xextended_error_logging == 1)
8296                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
8297
8298         qla2xxx_transport_template =
8299             fc_attach_transport(&qla2xxx_transport_functions);
8300         if (!qla2xxx_transport_template) {
8301                 ql_log(ql_log_fatal, NULL, 0x0002,
8302                     "fc_attach_transport failed...Failing load!.\n");
8303                 ret = -ENODEV;
8304                 goto qlt_exit;
8305         }
8306
8307         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
8308         if (apidev_major < 0) {
8309                 ql_log(ql_log_fatal, NULL, 0x0003,
8310                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
8311         }
8312
8313         qla2xxx_transport_vport_template =
8314             fc_attach_transport(&qla2xxx_transport_vport_functions);
8315         if (!qla2xxx_transport_vport_template) {
8316                 ql_log(ql_log_fatal, NULL, 0x0004,
8317                     "fc_attach_transport vport failed...Failing load!.\n");
8318                 ret = -ENODEV;
8319                 goto unreg_chrdev;
8320         }
8321         ql_log(ql_log_info, NULL, 0x0005,
8322             "QLogic Fibre Channel HBA Driver: %s.\n",
8323             qla2x00_version_str);
8324         ret = pci_register_driver(&qla2xxx_pci_driver);
8325         if (ret) {
8326                 ql_log(ql_log_fatal, NULL, 0x0006,
8327                     "pci_register_driver failed...ret=%d Failing load!.\n",
8328                     ret);
8329                 goto release_vport_transport;
8330         }
8331         return ret;
8332
8333 release_vport_transport:
8334         fc_release_transport(qla2xxx_transport_vport_template);
8335
8336 unreg_chrdev:
8337         if (apidev_major >= 0)
8338                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
8339         fc_release_transport(qla2xxx_transport_template);
8340
8341 qlt_exit:
8342         qlt_exit();
8343
8344 destroy_cache:
8345         kmem_cache_destroy(srb_cachep);
8346
8347         qla_trace_uninit();
8348         return ret;
8349 }
8350
8351 /**
8352  * qla2x00_module_exit - Module cleanup.
8353  **/
8354 static void __exit
8355 qla2x00_module_exit(void)
8356 {
8357         pci_unregister_driver(&qla2xxx_pci_driver);
8358         qla2x00_release_firmware();
8359         kmem_cache_destroy(ctx_cachep);
8360         fc_release_transport(qla2xxx_transport_vport_template);
8361         if (apidev_major >= 0)
8362                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
8363         fc_release_transport(qla2xxx_transport_template);
8364         qlt_exit();
8365         kmem_cache_destroy(srb_cachep);
8366         qla_trace_uninit();
8367 }
8368
8369 module_init(qla2x00_module_init);
8370 module_exit(qla2x00_module_exit);
8371
8372 MODULE_AUTHOR("QLogic Corporation");
8373 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
8374 MODULE_LICENSE("GPL");
8375 MODULE_FIRMWARE(FW_FILE_ISP21XX);
8376 MODULE_FIRMWARE(FW_FILE_ISP22XX);
8377 MODULE_FIRMWARE(FW_FILE_ISP2300);
8378 MODULE_FIRMWARE(FW_FILE_ISP2322);
8379 MODULE_FIRMWARE(FW_FILE_ISP24XX);
8380 MODULE_FIRMWARE(FW_FILE_ISP25XX);