drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c

   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
   9  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  10  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
  11  * Copyright(c) 2018        Intel Corporation
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of version 2 of the GNU General Public License as
  15  * published by the Free Software Foundation.
  16  *
  17  * This program is distributed in the hope that it will be useful, but
  18  * WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  20  * General Public License for more details.
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  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  25  * USA
  26  *
  27  * The full GNU General Public License is included in this distribution
  28  * in the file called COPYING.
  29  *
  30  * Contact Information:
  31  *  Intel Linux Wireless <linuxwifi@intel.com>
  32  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  33  *
  34  * BSD LICENSE
  35  *
  36  * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
  37  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  38  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
  39  * Copyright(c) 2018        Intel Corporation
  40  * All rights reserved.
  41  *
  42  * Redistribution and use in source and binary forms, with or without
  43  * modification, are permitted provided that the following conditions
  44  * are met:
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  47  *    notice, this list of conditions and the following disclaimer.
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  50  *    the documentation and/or other materials provided with the
  51  *    distribution.
  52  *  * Neither the name Intel Corporation nor the names of its
  53  *    contributors may be used to endorse or promote products derived
  54  *    from this software without specific prior written permission.
  55  *
  56  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  57  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  58  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  59  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  60  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  61  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  62  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  63  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  64  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  65  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  66  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  67  *****************************************************************************/
  68 #include <linux/types.h>
  69 #include <linux/slab.h>
  70 #include <linux/export.h>
  71 #include <linux/etherdevice.h>
  72 #include <linux/pci.h>
  73 #include <linux/firmware.h>
  74
  75 #include "iwl-drv.h"
  76 #include "iwl-modparams.h"
  77 #include "iwl-nvm-parse.h"
  78 #include "iwl-prph.h"
  79 #include "iwl-io.h"
  80 #include "iwl-csr.h"
  81 #include "fw/acpi.h"
  82 #include "fw/api/nvm-reg.h"
  83 #include "fw/api/commands.h"
  84 #include "fw/api/cmdhdr.h"
  85 #include "fw/img.h"
  86
  87 /* NVM offsets (in words) definitions */
  88 enum nvm_offsets {
  89         /* NVM HW-Section offset (in words) definitions */
  90         SUBSYSTEM_ID = 0x0A,
  91         HW_ADDR = 0x15,
  92
  93         /* NVM SW-Section offset (in words) definitions */
  94         NVM_SW_SECTION = 0x1C0,
  95         NVM_VERSION = 0,
  96         RADIO_CFG = 1,
  97         SKU = 2,
  98         N_HW_ADDRS = 3,
  99         NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION,
 100
 101         /* NVM calibration section offset (in words) definitions */
 102         NVM_CALIB_SECTION = 0x2B8,
 103         XTAL_CALIB = 0x316 - NVM_CALIB_SECTION,
 104
 105         /* NVM REGULATORY -Section offset (in words) definitions */
 106         NVM_CHANNELS_SDP = 0,
 107 };
 108
 109 enum ext_nvm_offsets {
 110         /* NVM HW-Section offset (in words) definitions */
 111         MAC_ADDRESS_OVERRIDE_EXT_NVM = 1,
 112
 113         /* NVM SW-Section offset (in words) definitions */
 114         NVM_VERSION_EXT_NVM = 0,
 115         RADIO_CFG_FAMILY_EXT_NVM = 0,
 116         SKU_FAMILY_8000 = 2,
 117         N_HW_ADDRS_FAMILY_8000 = 3,
 118
 119         /* NVM REGULATORY -Section offset (in words) definitions */
 120         NVM_CHANNELS_EXTENDED = 0,
 121         NVM_LAR_OFFSET_OLD = 0x4C7,
 122         NVM_LAR_OFFSET = 0x507,
 123         NVM_LAR_ENABLED = 0x7,
 124 };
 125
 126 /* SKU Capabilities (actual values from NVM definition) */
 127 enum nvm_sku_bits {
 128         NVM_SKU_CAP_BAND_24GHZ          = BIT(0),
 129         NVM_SKU_CAP_BAND_52GHZ          = BIT(1),
 130         NVM_SKU_CAP_11N_ENABLE          = BIT(2),
 131         NVM_SKU_CAP_11AC_ENABLE         = BIT(3),
 132         NVM_SKU_CAP_MIMO_DISABLE        = BIT(5),
 133 };
 134
 135 /*
 136  * These are the channel numbers in the order that they are stored in the NVM
 137  */
 138 static const u8 iwl_nvm_channels[] = {
 139         /* 2.4 GHz */
 140         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
 141         /* 5 GHz */
 142         36, 40, 44 , 48, 52, 56, 60, 64,
 143         100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
 144         149, 153, 157, 161, 165
 145 };
 146
 147 static const u8 iwl_ext_nvm_channels[] = {
 148         /* 2.4 GHz */
 149         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
 150         /* 5 GHz */
 151         36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
 152         96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
 153         149, 153, 157, 161, 165, 169, 173, 177, 181
 154 };
 155
 156 #define IWL_NVM_NUM_CHANNELS            ARRAY_SIZE(iwl_nvm_channels)
 157 #define IWL_NVM_NUM_CHANNELS_EXT        ARRAY_SIZE(iwl_ext_nvm_channels)
 158 #define NUM_2GHZ_CHANNELS               14
 159 #define NUM_2GHZ_CHANNELS_EXT   14
 160 #define FIRST_2GHZ_HT_MINUS             5
 161 #define LAST_2GHZ_HT_PLUS               9
 162 #define LAST_5GHZ_HT                    165
 163 #define LAST_5GHZ_HT_FAMILY_8000        181
 164 #define N_HW_ADDR_MASK                  0xF
 165
 166 /* rate data (static) */
 167 static struct ieee80211_rate iwl_cfg80211_rates[] = {
 168         { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, },
 169         { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1,
 170           .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
 171         { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2,
 172           .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
 173         { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3,
 174           .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
 175         { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, },
 176         { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, },
 177         { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, },
 178         { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, },
 179         { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, },
 180         { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, },
 181         { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, },
 182         { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, },
 183 };
 184 #define RATES_24_OFFS   0
 185 #define N_RATES_24      ARRAY_SIZE(iwl_cfg80211_rates)
 186 #define RATES_52_OFFS   4
 187 #define N_RATES_52      (N_RATES_24 - RATES_52_OFFS)
 188
 189 /**
 190  * enum iwl_nvm_channel_flags - channel flags in NVM
 191  * @NVM_CHANNEL_VALID: channel is usable for this SKU/geo
 192  * @NVM_CHANNEL_IBSS: usable as an IBSS channel
 193  * @NVM_CHANNEL_ACTIVE: active scanning allowed
 194  * @NVM_CHANNEL_RADAR: radar detection required
 195  * @NVM_CHANNEL_INDOOR_ONLY: only indoor use is allowed
 196  * @NVM_CHANNEL_GO_CONCURRENT: GO operation is allowed when connected to BSS
 197  *      on same channel on 2.4 or same UNII band on 5.2
 198  * @NVM_CHANNEL_UNIFORM: uniform spreading required
 199  * @NVM_CHANNEL_20MHZ: 20 MHz channel okay
 200  * @NVM_CHANNEL_40MHZ: 40 MHz channel okay
 201  * @NVM_CHANNEL_80MHZ: 80 MHz channel okay
 202  * @NVM_CHANNEL_160MHZ: 160 MHz channel okay
 203  * @NVM_CHANNEL_DC_HIGH: DC HIGH required/allowed (?)
 204  */
 205 enum iwl_nvm_channel_flags {
 206         NVM_CHANNEL_VALID               = BIT(0),
 207         NVM_CHANNEL_IBSS                = BIT(1),
 208         NVM_CHANNEL_ACTIVE              = BIT(3),
 209         NVM_CHANNEL_RADAR               = BIT(4),
 210         NVM_CHANNEL_INDOOR_ONLY         = BIT(5),
 211         NVM_CHANNEL_GO_CONCURRENT       = BIT(6),
 212         NVM_CHANNEL_UNIFORM             = BIT(7),
 213         NVM_CHANNEL_20MHZ               = BIT(8),
 214         NVM_CHANNEL_40MHZ               = BIT(9),
 215         NVM_CHANNEL_80MHZ               = BIT(10),
 216         NVM_CHANNEL_160MHZ              = BIT(11),
 217         NVM_CHANNEL_DC_HIGH             = BIT(12),
 218 };
 219
 220 static inline void iwl_nvm_print_channel_flags(struct device *dev, u32 level,
 221                                                int chan, u16 flags)
 222 {
 223 #define CHECK_AND_PRINT_I(x)    \
 224         ((flags & NVM_CHANNEL_##x) ? " " #x : "")
 225
 226         if (!(flags & NVM_CHANNEL_VALID)) {
 227                 IWL_DEBUG_DEV(dev, level, "Ch. %d: 0x%x: No traffic\n",
 228                               chan, flags);
 229                 return;
 230         }
 231
 232         /* Note: already can print up to 101 characters, 110 is the limit! */
 233         IWL_DEBUG_DEV(dev, level,
 234                       "Ch. %d: 0x%x:%s%s%s%s%s%s%s%s%s%s%s%s\n",
 235                       chan, flags,
 236                       CHECK_AND_PRINT_I(VALID),
 237                       CHECK_AND_PRINT_I(IBSS),
 238                       CHECK_AND_PRINT_I(ACTIVE),
 239                       CHECK_AND_PRINT_I(RADAR),
 240                       CHECK_AND_PRINT_I(INDOOR_ONLY),
 241                       CHECK_AND_PRINT_I(GO_CONCURRENT),
 242                       CHECK_AND_PRINT_I(UNIFORM),
 243                       CHECK_AND_PRINT_I(20MHZ),
 244                       CHECK_AND_PRINT_I(40MHZ),
 245                       CHECK_AND_PRINT_I(80MHZ),
 246                       CHECK_AND_PRINT_I(160MHZ),
 247                       CHECK_AND_PRINT_I(DC_HIGH));
 248 #undef CHECK_AND_PRINT_I
 249 }
 250
 251 static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, bool is_5ghz,
 252                                  u16 nvm_flags, const struct iwl_cfg *cfg)
 253 {
 254         u32 flags = IEEE80211_CHAN_NO_HT40;
 255         u32 last_5ghz_ht = LAST_5GHZ_HT;
 256
 257         if (cfg->nvm_type == IWL_NVM_EXT)
 258                 last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
 259
 260         if (!is_5ghz && (nvm_flags & NVM_CHANNEL_40MHZ)) {
 261                 if (ch_num <= LAST_2GHZ_HT_PLUS)
 262                         flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
 263                 if (ch_num >= FIRST_2GHZ_HT_MINUS)
 264                         flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
 265         } else if (ch_num <= last_5ghz_ht && (nvm_flags & NVM_CHANNEL_40MHZ)) {
 266                 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
 267                         flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
 268                 else
 269                         flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
 270         }
 271         if (!(nvm_flags & NVM_CHANNEL_80MHZ))
 272                 flags |= IEEE80211_CHAN_NO_80MHZ;
 273         if (!(nvm_flags & NVM_CHANNEL_160MHZ))
 274                 flags |= IEEE80211_CHAN_NO_160MHZ;
 275
 276         if (!(nvm_flags & NVM_CHANNEL_IBSS))
 277                 flags |= IEEE80211_CHAN_NO_IR;
 278
 279         if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
 280                 flags |= IEEE80211_CHAN_NO_IR;
 281
 282         if (nvm_flags & NVM_CHANNEL_RADAR)
 283                 flags |= IEEE80211_CHAN_RADAR;
 284
 285         if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
 286                 flags |= IEEE80211_CHAN_INDOOR_ONLY;
 287
 288         /* Set the GO concurrent flag only in case that NO_IR is set.
 289          * Otherwise it is meaningless
 290          */
 291         if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
 292             (flags & IEEE80211_CHAN_NO_IR))
 293                 flags |= IEEE80211_CHAN_IR_CONCURRENT;
 294
 295         return flags;
 296 }
 297
 298 static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
 299                                 struct iwl_nvm_data *data,
 300                                 const __le16 * const nvm_ch_flags,
 301                                 u32 sbands_flags)
 302 {
 303         int ch_idx;
 304         int n_channels = 0;
 305         struct ieee80211_channel *channel;
 306         u16 ch_flags;
 307         int num_of_ch, num_2ghz_channels;
 308         const u8 *nvm_chan;
 309
 310         if (cfg->nvm_type != IWL_NVM_EXT) {
 311                 num_of_ch = IWL_NVM_NUM_CHANNELS;
 312                 nvm_chan = &iwl_nvm_channels[0];
 313                 num_2ghz_channels = NUM_2GHZ_CHANNELS;
 314         } else {
 315                 num_of_ch = IWL_NVM_NUM_CHANNELS_EXT;
 316                 nvm_chan = &iwl_ext_nvm_channels[0];
 317                 num_2ghz_channels = NUM_2GHZ_CHANNELS_EXT;
 318         }
 319
 320         for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
 321                 bool is_5ghz = (ch_idx >= num_2ghz_channels);
 322
 323                 ch_flags = __le16_to_cpup(nvm_ch_flags + ch_idx);
 324
 325                 if (is_5ghz && !data->sku_cap_band_52ghz_enable)
 326                         continue;
 327
 328                 /* workaround to disable wide channels in 5GHz */
 329                 if ((sbands_flags & IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ) &&
 330                     is_5ghz) {
 331                         ch_flags &= ~(NVM_CHANNEL_40MHZ |
 332                                      NVM_CHANNEL_80MHZ |
 333                                      NVM_CHANNEL_160MHZ);
 334                 }
 335
 336                 if (ch_flags & NVM_CHANNEL_160MHZ)
 337                         data->vht160_supported = true;
 338
 339                 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR) &&
 340                     !(ch_flags & NVM_CHANNEL_VALID)) {
 341                         /*
 342                          * Channels might become valid later if lar is
 343                          * supported, hence we still want to add them to
 344                          * the list of supported channels to cfg80211.
 345                          */
 346                         iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
 347                                                     nvm_chan[ch_idx], ch_flags);
 348                         continue;
 349                 }
 350
 351                 channel = &data->channels[n_channels];
 352                 n_channels++;
 353
 354                 channel->hw_value = nvm_chan[ch_idx];
 355                 channel->band = is_5ghz ?
 356                                 NL80211_BAND_5GHZ : NL80211_BAND_2GHZ;
 357                 channel->center_freq =
 358                         ieee80211_channel_to_frequency(
 359                                 channel->hw_value, channel->band);
 360
 361                 /* Initialize regulatory-based run-time data */
 362
 363                 /*
 364                  * Default value - highest tx power value.  max_power
 365                  * is not used in mvm, and is used for backwards compatibility
 366                  */
 367                 channel->max_power = IWL_DEFAULT_MAX_TX_POWER;
 368
 369                 /* don't put limitations in case we're using LAR */
 370                 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR))
 371                         channel->flags = iwl_get_channel_flags(nvm_chan[ch_idx],
 372                                                                ch_idx, is_5ghz,
 373                                                                ch_flags, cfg);
 374                 else
 375                         channel->flags = 0;
 376
 377                 iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
 378                                             channel->hw_value, ch_flags);
 379                 IWL_DEBUG_EEPROM(dev, "Ch. %d: %ddBm\n",
 380                                  channel->hw_value, channel->max_power);
 381         }
 382
 383         return n_channels;
 384 }
 385
 386 static void iwl_init_vht_hw_capab(const struct iwl_cfg *cfg,
 387                                   struct iwl_nvm_data *data,
 388                                   struct ieee80211_sta_vht_cap *vht_cap,
 389                                   u8 tx_chains, u8 rx_chains)
 390 {
 391         int num_rx_ants = num_of_ant(rx_chains);
 392         int num_tx_ants = num_of_ant(tx_chains);
 393         unsigned int max_ampdu_exponent = (cfg->max_vht_ampdu_exponent ?:
 394                                            IEEE80211_VHT_MAX_AMPDU_1024K);
 395
 396         vht_cap->vht_supported = true;
 397
 398         vht_cap->cap = IEEE80211_VHT_CAP_SHORT_GI_80 |
 399                        IEEE80211_VHT_CAP_RXSTBC_1 |
 400                        IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
 401                        3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT |
 402                        max_ampdu_exponent <<
 403                        IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT;
 404
 405         if (data->vht160_supported)
 406                 vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ |
 407                                 IEEE80211_VHT_CAP_SHORT_GI_160;
 408
 409         if (cfg->vht_mu_mimo_supported)
 410                 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE;
 411
 412         if (cfg->ht_params->ldpc)
 413                 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
 414
 415         if (data->sku_cap_mimo_disabled) {
 416                 num_rx_ants = 1;
 417                 num_tx_ants = 1;
 418         }
 419
 420         if (num_tx_ants > 1)
 421                 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
 422         else
 423                 vht_cap->cap |= IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN;
 424
 425         switch (iwlwifi_mod_params.amsdu_size) {
 426         case IWL_AMSDU_DEF:
 427                 if (cfg->mq_rx_supported)
 428                         vht_cap->cap |=
 429                                 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
 430                 else
 431                         vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
 432                 break;
 433         case IWL_AMSDU_4K:
 434                 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
 435                 break;
 436         case IWL_AMSDU_8K:
 437                 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
 438                 break;
 439         case IWL_AMSDU_12K:
 440                 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
 441                 break;
 442         default:
 443                 break;
 444         }
 445
 446         vht_cap->vht_mcs.rx_mcs_map =
 447                 cpu_to_le16(IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
 448                             IEEE80211_VHT_MCS_SUPPORT_0_9 << 2 |
 449                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
 450                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
 451                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
 452                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
 453                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
 454                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 14);
 455
 456         if (num_rx_ants == 1 || cfg->rx_with_siso_diversity) {
 457                 vht_cap->cap |= IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN;
 458                 /* this works because NOT_SUPPORTED == 3 */
 459                 vht_cap->vht_mcs.rx_mcs_map |=
 460                         cpu_to_le16(IEEE80211_VHT_MCS_NOT_SUPPORTED << 2);
 461         }
 462
 463         vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map;
 464 }
 465
 466 static void iwl_init_sbands(struct device *dev, const struct iwl_cfg *cfg,
 467                             struct iwl_nvm_data *data,
 468                             const __le16 *nvm_ch_flags, u8 tx_chains,
 469                             u8 rx_chains, u32 sbands_flags)
 470 {
 471         int n_channels;
 472         int n_used = 0;
 473         struct ieee80211_supported_band *sband;
 474
 475         n_channels = iwl_init_channel_map(dev, cfg, data, nvm_ch_flags,
 476                                           sbands_flags);
 477         sband = &data->bands[NL80211_BAND_2GHZ];
 478         sband->band = NL80211_BAND_2GHZ;
 479         sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS];
 480         sband->n_bitrates = N_RATES_24;
 481         n_used += iwl_init_sband_channels(data, sband, n_channels,
 482                                           NL80211_BAND_2GHZ);
 483         iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, NL80211_BAND_2GHZ,
 484                              tx_chains, rx_chains);
 485
 486         sband = &data->bands[NL80211_BAND_5GHZ];
 487         sband->band = NL80211_BAND_5GHZ;
 488         sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
 489         sband->n_bitrates = N_RATES_52;
 490         n_used += iwl_init_sband_channels(data, sband, n_channels,
 491                                           NL80211_BAND_5GHZ);
 492         iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, NL80211_BAND_5GHZ,
 493                              tx_chains, rx_chains);
 494         if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac)
 495                 iwl_init_vht_hw_capab(cfg, data, &sband->vht_cap,
 496                                       tx_chains, rx_chains);
 497
 498         if (n_channels != n_used)
 499                 IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n",
 500                             n_used, n_channels);
 501 }
 502
 503 static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
 504                        const __le16 *phy_sku)
 505 {
 506         if (cfg->nvm_type != IWL_NVM_EXT)
 507                 return le16_to_cpup(nvm_sw + SKU);
 508
 509         return le32_to_cpup((__le32 *)(phy_sku + SKU_FAMILY_8000));
 510 }
 511
 512 static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
 513 {
 514         if (cfg->nvm_type != IWL_NVM_EXT)
 515                 return le16_to_cpup(nvm_sw + NVM_VERSION);
 516         else
 517                 return le32_to_cpup((__le32 *)(nvm_sw +
 518                                                NVM_VERSION_EXT_NVM));
 519 }
 520
 521 static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
 522                              const __le16 *phy_sku)
 523 {
 524         if (cfg->nvm_type != IWL_NVM_EXT)
 525                 return le16_to_cpup(nvm_sw + RADIO_CFG);
 526
 527         return le32_to_cpup((__le32 *)(phy_sku + RADIO_CFG_FAMILY_EXT_NVM));
 528
 529 }
 530
 531 static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
 532 {
 533         int n_hw_addr;
 534
 535         if (cfg->nvm_type != IWL_NVM_EXT)
 536                 return le16_to_cpup(nvm_sw + N_HW_ADDRS);
 537
 538         n_hw_addr = le32_to_cpup((__le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000));
 539
 540         return n_hw_addr & N_HW_ADDR_MASK;
 541 }
 542
 543 static void iwl_set_radio_cfg(const struct iwl_cfg *cfg,
 544                               struct iwl_nvm_data *data,
 545                               u32 radio_cfg)
 546 {
 547         if (cfg->nvm_type != IWL_NVM_EXT) {
 548                 data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg);
 549                 data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg);
 550                 data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg);
 551                 data->radio_cfg_pnum = NVM_RF_CFG_PNUM_MSK(radio_cfg);
 552                 return;
 553         }
 554
 555         /* set the radio configuration for family 8000 */
 556         data->radio_cfg_type = EXT_NVM_RF_CFG_TYPE_MSK(radio_cfg);
 557         data->radio_cfg_step = EXT_NVM_RF_CFG_STEP_MSK(radio_cfg);
 558         data->radio_cfg_dash = EXT_NVM_RF_CFG_DASH_MSK(radio_cfg);
 559         data->radio_cfg_pnum = EXT_NVM_RF_CFG_FLAVOR_MSK(radio_cfg);
 560         data->valid_tx_ant = EXT_NVM_RF_CFG_TX_ANT_MSK(radio_cfg);
 561         data->valid_rx_ant = EXT_NVM_RF_CFG_RX_ANT_MSK(radio_cfg);
 562 }
 563
 564 static void iwl_flip_hw_address(__le32 mac_addr0, __le32 mac_addr1, u8 *dest)
 565 {
 566         const u8 *hw_addr;
 567
 568         hw_addr = (const u8 *)&mac_addr0;
 569         dest[0] = hw_addr[3];
 570         dest[1] = hw_addr[2];
 571         dest[2] = hw_addr[1];
 572         dest[3] = hw_addr[0];
 573
 574         hw_addr = (const u8 *)&mac_addr1;
 575         dest[4] = hw_addr[1];
 576         dest[5] = hw_addr[0];
 577 }
 578
 579 static void iwl_set_hw_address_from_csr(struct iwl_trans *trans,
 580                                         struct iwl_nvm_data *data)
 581 {
 582         __le32 mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_STRAP));
 583         __le32 mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_STRAP));
 584
 585         iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
 586         /*
 587          * If the OEM fused a valid address, use it instead of the one in the
 588          * OTP
 589          */
 590         if (is_valid_ether_addr(data->hw_addr))
 591                 return;
 592
 593         mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_OTP));
 594         mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_OTP));
 595
 596         iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
 597 }
 598
 599 static void iwl_set_hw_address_family_8000(struct iwl_trans *trans,
 600                                            const struct iwl_cfg *cfg,
 601                                            struct iwl_nvm_data *data,
 602                                            const __le16 *mac_override,
 603                                            const __be16 *nvm_hw)
 604 {
 605         const u8 *hw_addr;
 606
 607         if (mac_override) {
 608                 static const u8 reserved_mac[] = {
 609                         0x02, 0xcc, 0xaa, 0xff, 0xee, 0x00
 610                 };
 611
 612                 hw_addr = (const u8 *)(mac_override +
 613                                  MAC_ADDRESS_OVERRIDE_EXT_NVM);
 614
 615                 /*
 616                  * Store the MAC address from MAO section.
 617                  * No byte swapping is required in MAO section
 618                  */
 619                 memcpy(data->hw_addr, hw_addr, ETH_ALEN);
 620
 621                 /*
 622                  * Force the use of the OTP MAC address in case of reserved MAC
 623                  * address in the NVM, or if address is given but invalid.
 624                  */
 625                 if (is_valid_ether_addr(data->hw_addr) &&
 626                     memcmp(reserved_mac, hw_addr, ETH_ALEN) != 0)
 627                         return;
 628
 629                 IWL_ERR(trans,
 630                         "mac address from nvm override section is not valid\n");
 631         }
 632
 633         if (nvm_hw) {
 634                 /* read the mac address from WFMP registers */
 635                 __le32 mac_addr0 = cpu_to_le32(iwl_trans_read_prph(trans,
 636                                                 WFMP_MAC_ADDR_0));
 637                 __le32 mac_addr1 = cpu_to_le32(iwl_trans_read_prph(trans,
 638                                                 WFMP_MAC_ADDR_1));
 639
 640                 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
 641
 642                 return;
 643         }
 644
 645         IWL_ERR(trans, "mac address is not found\n");
 646 }
 647
 648 static int iwl_set_hw_address(struct iwl_trans *trans,
 649                               const struct iwl_cfg *cfg,
 650                               struct iwl_nvm_data *data, const __be16 *nvm_hw,
 651                               const __le16 *mac_override)
 652 {
 653         if (cfg->mac_addr_from_csr) {
 654                 iwl_set_hw_address_from_csr(trans, data);
 655         } else if (cfg->nvm_type != IWL_NVM_EXT) {
 656                 const u8 *hw_addr = (const u8 *)(nvm_hw + HW_ADDR);
 657
 658                 /* The byte order is little endian 16 bit, meaning 214365 */
 659                 data->hw_addr[0] = hw_addr[1];
 660                 data->hw_addr[1] = hw_addr[0];
 661                 data->hw_addr[2] = hw_addr[3];
 662                 data->hw_addr[3] = hw_addr[2];
 663                 data->hw_addr[4] = hw_addr[5];
 664                 data->hw_addr[5] = hw_addr[4];
 665         } else {
 666                 iwl_set_hw_address_family_8000(trans, cfg, data,
 667                                                mac_override, nvm_hw);
 668         }
 669
 670         if (!is_valid_ether_addr(data->hw_addr)) {
 671                 IWL_ERR(trans, "no valid mac address was found\n");
 672                 return -EINVAL;
 673         }
 674
 675         IWL_INFO(trans, "base HW address: %pM\n", data->hw_addr);
 676
 677         return 0;
 678 }
 679
 680 static bool
 681 iwl_nvm_no_wide_in_5ghz(struct device *dev, const struct iwl_cfg *cfg,
 682                         const __be16 *nvm_hw)
 683 {
 684         /*
 685          * Workaround a bug in Indonesia SKUs where the regulatory in
 686          * some 7000-family OTPs erroneously allow wide channels in
 687          * 5GHz.  To check for Indonesia, we take the SKU value from
 688          * bits 1-4 in the subsystem ID and check if it is either 5 or
 689          * 9.  In those cases, we need to force-disable wide channels
 690          * in 5GHz otherwise the FW will throw a sysassert when we try
 691          * to use them.
 692          */
 693         if (cfg->device_family == IWL_DEVICE_FAMILY_7000) {
 694                 /*
 695                  * Unlike the other sections in the NVM, the hw
 696                  * section uses big-endian.
 697                  */
 698                 u16 subsystem_id = be16_to_cpup(nvm_hw + SUBSYSTEM_ID);
 699                 u8 sku = (subsystem_id & 0x1e) >> 1;
 700
 701                 if (sku == 5 || sku == 9) {
 702                         IWL_DEBUG_EEPROM(dev,
 703                                          "disabling wide channels in 5GHz (0x%0x %d)\n",
 704                                          subsystem_id, sku);
 705                         return true;
 706                 }
 707         }
 708
 709         return false;
 710 }
 711
 712 struct iwl_nvm_data *
 713 iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
 714                    const __be16 *nvm_hw, const __le16 *nvm_sw,
 715                    const __le16 *nvm_calib, const __le16 *regulatory,
 716                    const __le16 *mac_override, const __le16 *phy_sku,
 717                    u8 tx_chains, u8 rx_chains, bool lar_fw_supported)
 718 {
 719         struct device *dev = trans->dev;
 720         struct iwl_nvm_data *data;
 721         bool lar_enabled;
 722         u32 sku, radio_cfg;
 723         u32 sbands_flags = 0;
 724         u16 lar_config;
 725         const __le16 *ch_section;
 726
 727         if (cfg->nvm_type != IWL_NVM_EXT)
 728                 data = kzalloc(sizeof(*data) +
 729                                sizeof(struct ieee80211_channel) *
 730                                IWL_NVM_NUM_CHANNELS,
 731                                GFP_KERNEL);
 732         else
 733                 data = kzalloc(sizeof(*data) +
 734                                sizeof(struct ieee80211_channel) *
 735                                IWL_NVM_NUM_CHANNELS_EXT,
 736                                GFP_KERNEL);
 737         if (!data)
 738                 return NULL;
 739
 740         data->nvm_version = iwl_get_nvm_version(cfg, nvm_sw);
 741
 742         radio_cfg = iwl_get_radio_cfg(cfg, nvm_sw, phy_sku);
 743         iwl_set_radio_cfg(cfg, data, radio_cfg);
 744         if (data->valid_tx_ant)
 745                 tx_chains &= data->valid_tx_ant;
 746         if (data->valid_rx_ant)
 747                 rx_chains &= data->valid_rx_ant;
 748
 749         sku = iwl_get_sku(cfg, nvm_sw, phy_sku);
 750         data->sku_cap_band_24ghz_enable = sku & NVM_SKU_CAP_BAND_24GHZ;
 751         data->sku_cap_band_52ghz_enable = sku & NVM_SKU_CAP_BAND_52GHZ;
 752         data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE;
 753         if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
 754                 data->sku_cap_11n_enable = false;
 755         data->sku_cap_11ac_enable = data->sku_cap_11n_enable &&
 756                                     (sku & NVM_SKU_CAP_11AC_ENABLE);
 757         data->sku_cap_mimo_disabled = sku & NVM_SKU_CAP_MIMO_DISABLE;
 758
 759         data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw);
 760
 761         if (cfg->nvm_type != IWL_NVM_EXT) {
 762                 /* Checking for required sections */
 763                 if (!nvm_calib) {
 764                         IWL_ERR(trans,
 765                                 "Can't parse empty Calib NVM sections\n");
 766                         kfree(data);
 767                         return NULL;
 768                 }
 769
 770                 ch_section = cfg->nvm_type == IWL_NVM_SDP ?
 771                              &regulatory[NVM_CHANNELS_SDP] :
 772                              &nvm_sw[NVM_CHANNELS];
 773
 774                 /* in family 8000 Xtal calibration values moved to OTP */
 775                 data->xtal_calib[0] = *(nvm_calib + XTAL_CALIB);
 776                 data->xtal_calib[1] = *(nvm_calib + XTAL_CALIB + 1);
 777                 lar_enabled = true;
 778         } else {
 779                 u16 lar_offset = data->nvm_version < 0xE39 ?
 780                                  NVM_LAR_OFFSET_OLD :
 781                                  NVM_LAR_OFFSET;
 782
 783                 lar_config = le16_to_cpup(regulatory + lar_offset);
 784                 data->lar_enabled = !!(lar_config &
 785                                        NVM_LAR_ENABLED);
 786                 lar_enabled = data->lar_enabled;
 787                 ch_section = &regulatory[NVM_CHANNELS_EXTENDED];
 788         }
 789
 790         /* If no valid mac address was found - bail out */
 791         if (iwl_set_hw_address(trans, cfg, data, nvm_hw, mac_override)) {
 792                 kfree(data);
 793                 return NULL;
 794         }
 795
 796         if (lar_fw_supported && lar_enabled)
 797                 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR;
 798
 799         if (iwl_nvm_no_wide_in_5ghz(dev, cfg, nvm_hw))
 800                 sbands_flags |= IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ;
 801
 802         iwl_init_sbands(dev, cfg, data, ch_section, tx_chains, rx_chains,
 803                         sbands_flags);
 804         data->calib_version = 255;
 805
 806         return data;
 807 }
 808 IWL_EXPORT_SYMBOL(iwl_parse_nvm_data);
 809
 810 static u32 iwl_nvm_get_regdom_bw_flags(const u8 *nvm_chan,
 811                                        int ch_idx, u16 nvm_flags,
 812                                        const struct iwl_cfg *cfg)
 813 {
 814         u32 flags = NL80211_RRF_NO_HT40;
 815         u32 last_5ghz_ht = LAST_5GHZ_HT;
 816
 817         if (cfg->nvm_type == IWL_NVM_EXT)
 818                 last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
 819
 820         if (ch_idx < NUM_2GHZ_CHANNELS &&
 821             (nvm_flags & NVM_CHANNEL_40MHZ)) {
 822                 if (nvm_chan[ch_idx] <= LAST_2GHZ_HT_PLUS)
 823                         flags &= ~NL80211_RRF_NO_HT40PLUS;
 824                 if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS)
 825                         flags &= ~NL80211_RRF_NO_HT40MINUS;
 826         } else if (nvm_chan[ch_idx] <= last_5ghz_ht &&
 827                    (nvm_flags & NVM_CHANNEL_40MHZ)) {
 828                 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
 829                         flags &= ~NL80211_RRF_NO_HT40PLUS;
 830                 else
 831                         flags &= ~NL80211_RRF_NO_HT40MINUS;
 832         }
 833
 834         if (!(nvm_flags & NVM_CHANNEL_80MHZ))
 835                 flags |= NL80211_RRF_NO_80MHZ;
 836         if (!(nvm_flags & NVM_CHANNEL_160MHZ))
 837                 flags |= NL80211_RRF_NO_160MHZ;
 838
 839         if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
 840                 flags |= NL80211_RRF_NO_IR;
 841
 842         if (nvm_flags & NVM_CHANNEL_RADAR)
 843                 flags |= NL80211_RRF_DFS;
 844
 845         if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
 846                 flags |= NL80211_RRF_NO_OUTDOOR;
 847
 848         /* Set the GO concurrent flag only in case that NO_IR is set.
 849          * Otherwise it is meaningless
 850          */
 851         if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
 852             (flags & NL80211_RRF_NO_IR))
 853                 flags |= NL80211_RRF_GO_CONCURRENT;
 854
 855         return flags;
 856 }
 857
 858 struct regdb_ptrs {
 859         struct ieee80211_wmm_rule *rule;
 860         u32 token;
 861 };
 862
 863 struct ieee80211_regdomain *
 864 iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
 865                        int num_of_ch, __le32 *channels, u16 fw_mcc,
 866                        u16 geo_info)
 867 {
 868         int ch_idx;
 869         u16 ch_flags;
 870         u32 reg_rule_flags, prev_reg_rule_flags = 0;
 871         const u8 *nvm_chan = cfg->nvm_type == IWL_NVM_EXT ?
 872                              iwl_ext_nvm_channels : iwl_nvm_channels;
 873         struct ieee80211_regdomain *regd, *copy_rd;
 874         int size_of_regd, regd_to_copy, wmms_to_copy;
 875         int size_of_wmms = 0;
 876         struct ieee80211_reg_rule *rule;
 877         struct ieee80211_wmm_rule *wmm_rule, *d_wmm, *s_wmm;
 878         struct regdb_ptrs *regdb_ptrs;
 879         enum nl80211_band band;
 880         int center_freq, prev_center_freq = 0;
 881         int valid_rules = 0, n_wmms = 0;
 882         int i;
 883         bool new_rule;
 884         int max_num_ch = cfg->nvm_type == IWL_NVM_EXT ?
 885                          IWL_NVM_NUM_CHANNELS_EXT : IWL_NVM_NUM_CHANNELS;
 886
 887         if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES))
 888                 return ERR_PTR(-EINVAL);
 889
 890         if (WARN_ON(num_of_ch > max_num_ch))
 891                 num_of_ch = max_num_ch;
 892
 893         IWL_DEBUG_DEV(dev, IWL_DL_LAR, "building regdom for %d channels\n",
 894                       num_of_ch);
 895
 896         /* build a regdomain rule for every valid channel */
 897         size_of_regd =
 898                 sizeof(struct ieee80211_regdomain) +
 899                 num_of_ch * sizeof(struct ieee80211_reg_rule);
 900
 901         if (geo_info & GEO_WMM_ETSI_5GHZ_INFO)
 902                 size_of_wmms =
 903                         num_of_ch * sizeof(struct ieee80211_wmm_rule);
 904
 905         regd = kzalloc(size_of_regd + size_of_wmms, GFP_KERNEL);
 906         if (!regd)
 907                 return ERR_PTR(-ENOMEM);
 908
 909         regdb_ptrs = kcalloc(num_of_ch, sizeof(*regdb_ptrs), GFP_KERNEL);
 910         if (!regdb_ptrs) {
 911                 copy_rd = ERR_PTR(-ENOMEM);
 912                 goto out;
 913         }
 914
 915         /* set alpha2 from FW. */
 916         regd->alpha2[0] = fw_mcc >> 8;
 917         regd->alpha2[1] = fw_mcc & 0xff;
 918
 919         wmm_rule = (struct ieee80211_wmm_rule *)((u8 *)regd + size_of_regd);
 920
 921         for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
 922                 ch_flags = (u16)__le32_to_cpup(channels + ch_idx);
 923                 band = (ch_idx < NUM_2GHZ_CHANNELS) ?
 924                        NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
 925                 center_freq = ieee80211_channel_to_frequency(nvm_chan[ch_idx],
 926                                                              band);
 927                 new_rule = false;
 928
 929                 if (!(ch_flags & NVM_CHANNEL_VALID)) {
 930                         iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
 931                                                     nvm_chan[ch_idx], ch_flags);
 932                         continue;
 933                 }
 934
 935                 reg_rule_flags = iwl_nvm_get_regdom_bw_flags(nvm_chan, ch_idx,
 936                                                              ch_flags, cfg);
 937
 938                 /* we can't continue the same rule */
 939                 if (ch_idx == 0 || prev_reg_rule_flags != reg_rule_flags ||
 940                     center_freq - prev_center_freq > 20) {
 941                         valid_rules++;
 942                         new_rule = true;
 943                 }
 944
 945                 rule = &regd->reg_rules[valid_rules - 1];
 946
 947                 if (new_rule)
 948                         rule->freq_range.start_freq_khz =
 949                                                 MHZ_TO_KHZ(center_freq - 10);
 950
 951                 rule->freq_range.end_freq_khz = MHZ_TO_KHZ(center_freq + 10);
 952
 953                 /* this doesn't matter - not used by FW */
 954                 rule->power_rule.max_antenna_gain = DBI_TO_MBI(6);
 955                 rule->power_rule.max_eirp =
 956                         DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER);
 957
 958                 rule->flags = reg_rule_flags;
 959
 960                 /* rely on auto-calculation to merge BW of contiguous chans */
 961                 rule->flags |= NL80211_RRF_AUTO_BW;
 962                 rule->freq_range.max_bandwidth_khz = 0;
 963
 964                 prev_center_freq = center_freq;
 965                 prev_reg_rule_flags = reg_rule_flags;
 966
 967                 iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
 968                                             nvm_chan[ch_idx], ch_flags);
 969
 970                 if (!(geo_info & GEO_WMM_ETSI_5GHZ_INFO) ||
 971                     band == NL80211_BAND_2GHZ)
 972                         continue;
 973
 974                 if (!reg_query_regdb_wmm(regd->alpha2, center_freq,
 975                                          &regdb_ptrs[n_wmms].token, wmm_rule)) {
 976                         /* Add only new rules */
 977                         for (i = 0; i < n_wmms; i++) {
 978                                 if (regdb_ptrs[i].token ==
 979                                     regdb_ptrs[n_wmms].token) {
 980                                         rule->wmm_rule = regdb_ptrs[i].rule;
 981                                         break;
 982                                 }
 983                         }
 984                         if (i == n_wmms) {
 985                                 rule->wmm_rule = wmm_rule;
 986                                 regdb_ptrs[n_wmms++].rule = wmm_rule;
 987                                 wmm_rule++;
 988                         }
 989                 }
 990         }
 991
 992         regd->n_reg_rules = valid_rules;
 993         regd->n_wmm_rules = n_wmms;
 994
 995         /*
 996          * Narrow down regdom for unused regulatory rules to prevent hole
 997          * between reg rules to wmm rules.
 998          */
 999         regd_to_copy = sizeof(struct ieee80211_regdomain) +
1000                 valid_rules * sizeof(struct ieee80211_reg_rule);
1001
1002         wmms_to_copy = sizeof(struct ieee80211_wmm_rule) * n_wmms;
1003
1004         copy_rd = kzalloc(regd_to_copy + wmms_to_copy, GFP_KERNEL);
1005         if (!copy_rd) {
1006                 copy_rd = ERR_PTR(-ENOMEM);
1007                 goto out;
1008         }
1009
1010         memcpy(copy_rd, regd, regd_to_copy);
1011         memcpy((u8 *)copy_rd + regd_to_copy, (u8 *)regd + size_of_regd,
1012                wmms_to_copy);
1013
1014         d_wmm = (struct ieee80211_wmm_rule *)((u8 *)copy_rd + regd_to_copy);
1015         s_wmm = (struct ieee80211_wmm_rule *)((u8 *)regd + size_of_regd);
1016
1017         for (i = 0; i < regd->n_reg_rules; i++) {
1018                 if (!regd->reg_rules[i].wmm_rule)
1019                         continue;
1020
1021                 copy_rd->reg_rules[i].wmm_rule = d_wmm +
1022                         (regd->reg_rules[i].wmm_rule - s_wmm) /
1023                         sizeof(struct ieee80211_wmm_rule);
1024         }
1025
1026 out:
1027         kfree(regdb_ptrs);
1028         kfree(regd);
1029         return copy_rd;
1030 }
1031 IWL_EXPORT_SYMBOL(iwl_parse_nvm_mcc_info);
1032
1033 #define IWL_MAX_NVM_SECTION_SIZE        0x1b58
1034 #define IWL_MAX_EXT_NVM_SECTION_SIZE    0x1ffc
1035 #define MAX_NVM_FILE_LEN        16384
1036
1037 void iwl_nvm_fixups(u32 hw_id, unsigned int section, u8 *data,
1038                     unsigned int len)
1039 {
1040 #define IWL_4165_DEVICE_ID      0x5501
1041 #define NVM_SKU_CAP_MIMO_DISABLE BIT(5)
1042
1043         if (section == NVM_SECTION_TYPE_PHY_SKU &&
1044             hw_id == IWL_4165_DEVICE_ID && data && len >= 5 &&
1045             (data[4] & NVM_SKU_CAP_MIMO_DISABLE))
1046                 /* OTP 0x52 bug work around: it's a 1x1 device */
1047                 data[3] = ANT_B | (ANT_B << 4);
1048 }
1049 IWL_EXPORT_SYMBOL(iwl_nvm_fixups);
1050
1051 /*
1052  * Reads external NVM from a file into mvm->nvm_sections
1053  *
1054  * HOW TO CREATE THE NVM FILE FORMAT:
1055  * ------------------------------
1056  * 1. create hex file, format:
1057  *      3800 -> header
1058  *      0000 -> header
1059  *      5a40 -> data
1060  *
1061  *   rev - 6 bit (word1)
1062  *   len - 10 bit (word1)
1063  *   id - 4 bit (word2)
1064  *   rsv - 12 bit (word2)
1065  *
1066  * 2. flip 8bits with 8 bits per line to get the right NVM file format
1067  *
1068  * 3. create binary file from the hex file
1069  *
1070  * 4. save as "iNVM_xxx.bin" under /lib/firmware
1071  */
1072 int iwl_read_external_nvm(struct iwl_trans *trans,
1073                           const char *nvm_file_name,
1074                           struct iwl_nvm_section *nvm_sections)
1075 {
1076         int ret, section_size;
1077         u16 section_id;
1078         const struct firmware *fw_entry;
1079         const struct {
1080                 __le16 word1;
1081                 __le16 word2;
1082                 u8 data[];
1083         } *file_sec;
1084         const u8 *eof;
1085         u8 *temp;
1086         int max_section_size;
1087         const __le32 *dword_buff;
1088
1089 #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
1090 #define NVM_WORD2_ID(x) (x >> 12)
1091 #define EXT_NVM_WORD2_LEN(x) (2 * (((x) & 0xFF) << 8 | (x) >> 8))
1092 #define EXT_NVM_WORD1_ID(x) ((x) >> 4)
1093 #define NVM_HEADER_0    (0x2A504C54)
1094 #define NVM_HEADER_1    (0x4E564D2A)
1095 #define NVM_HEADER_SIZE (4 * sizeof(u32))
1096
1097         IWL_DEBUG_EEPROM(trans->dev, "Read from external NVM\n");
1098
1099         /* Maximal size depends on NVM version */
1100         if (trans->cfg->nvm_type != IWL_NVM_EXT)
1101                 max_section_size = IWL_MAX_NVM_SECTION_SIZE;
1102         else
1103                 max_section_size = IWL_MAX_EXT_NVM_SECTION_SIZE;
1104
1105         /*
1106          * Obtain NVM image via request_firmware. Since we already used
1107          * request_firmware_nowait() for the firmware binary load and only
1108          * get here after that we assume the NVM request can be satisfied
1109          * synchronously.
1110          */
1111         ret = request_firmware(&fw_entry, nvm_file_name, trans->dev);
1112         if (ret) {
1113                 IWL_ERR(trans, "ERROR: %s isn't available %d\n",
1114                         nvm_file_name, ret);
1115                 return ret;
1116         }
1117
1118         IWL_INFO(trans, "Loaded NVM file %s (%zu bytes)\n",
1119                  nvm_file_name, fw_entry->size);
1120
1121         if (fw_entry->size > MAX_NVM_FILE_LEN) {
1122                 IWL_ERR(trans, "NVM file too large\n");
1123                 ret = -EINVAL;
1124                 goto out;
1125         }
1126
1127         eof = fw_entry->data + fw_entry->size;
1128         dword_buff = (__le32 *)fw_entry->data;
1129
1130         /* some NVM file will contain a header.
1131          * The header is identified by 2 dwords header as follow:
1132          * dword[0] = 0x2A504C54
1133          * dword[1] = 0x4E564D2A
1134          *
1135          * This header must be skipped when providing the NVM data to the FW.
1136          */
1137         if (fw_entry->size > NVM_HEADER_SIZE &&
1138             dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
1139             dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
1140                 file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE);
1141                 IWL_INFO(trans, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
1142                 IWL_INFO(trans, "NVM Manufacturing date %08X\n",
1143                          le32_to_cpu(dword_buff[3]));
1144
1145                 /* nvm file validation, dword_buff[2] holds the file version */
1146                 if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000 &&
1147                     CSR_HW_REV_STEP(trans->hw_rev) == SILICON_C_STEP &&
1148                     le32_to_cpu(dword_buff[2]) < 0xE4A) {
1149                         ret = -EFAULT;
1150                         goto out;
1151                 }
1152         } else {
1153                 file_sec = (void *)fw_entry->data;
1154         }
1155
1156         while (true) {
1157                 if (file_sec->data > eof) {
1158                         IWL_ERR(trans,
1159                                 "ERROR - NVM file too short for section header\n");
1160                         ret = -EINVAL;
1161                         break;
1162                 }
1163
1164                 /* check for EOF marker */
1165                 if (!file_sec->word1 && !file_sec->word2) {
1166                         ret = 0;
1167                         break;
1168                 }
1169
1170                 if (trans->cfg->nvm_type != IWL_NVM_EXT) {
1171                         section_size =
1172                                 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
1173                         section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
1174                 } else {
1175                         section_size = 2 * EXT_NVM_WORD2_LEN(
1176                                                 le16_to_cpu(file_sec->word2));
1177                         section_id = EXT_NVM_WORD1_ID(
1178                                                 le16_to_cpu(file_sec->word1));
1179                 }
1180
1181                 if (section_size > max_section_size) {
1182                         IWL_ERR(trans, "ERROR - section too large (%d)\n",
1183                                 section_size);
1184                         ret = -EINVAL;
1185                         break;
1186                 }
1187
1188                 if (!section_size) {
1189                         IWL_ERR(trans, "ERROR - section empty\n");
1190                         ret = -EINVAL;
1191                         break;
1192                 }
1193
1194                 if (file_sec->data + section_size > eof) {
1195                         IWL_ERR(trans,
1196                                 "ERROR - NVM file too short for section (%d bytes)\n",
1197                                 section_size);
1198                         ret = -EINVAL;
1199                         break;
1200                 }
1201
1202                 if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
1203                          "Invalid NVM section ID %d\n", section_id)) {
1204                         ret = -EINVAL;
1205                         break;
1206                 }
1207
1208                 temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
1209                 if (!temp) {
1210                         ret = -ENOMEM;
1211                         break;
1212                 }
1213
1214                 iwl_nvm_fixups(trans->hw_id, section_id, temp, section_size);
1215
1216                 kfree(nvm_sections[section_id].data);
1217                 nvm_sections[section_id].data = temp;
1218                 nvm_sections[section_id].length = section_size;
1219
1220                 /* advance to the next section */
1221                 file_sec = (void *)(file_sec->data + section_size);
1222         }
1223 out:
1224         release_firmware(fw_entry);
1225         return ret;
1226 }
1227 IWL_EXPORT_SYMBOL(iwl_read_external_nvm);
1228
1229 struct iwl_nvm_data *iwl_get_nvm(struct iwl_trans *trans,
1230                                  const struct iwl_fw *fw)
1231 {
1232         struct iwl_nvm_get_info cmd = {};
1233         struct iwl_nvm_get_info_rsp *rsp;
1234         struct iwl_nvm_data *nvm;
1235         struct iwl_host_cmd hcmd = {
1236                 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
1237                 .data = { &cmd, },
1238                 .len = { sizeof(cmd) },
1239                 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, NVM_GET_INFO)
1240         };
1241         int  ret;
1242         bool lar_fw_supported = !iwlwifi_mod_params.lar_disable &&
1243                                 fw_has_capa(&fw->ucode_capa,
1244                                             IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
1245         u32 mac_flags;
1246         u32 sbands_flags = 0;
1247
1248         ret = iwl_trans_send_cmd(trans, &hcmd);
1249         if (ret)
1250                 return ERR_PTR(ret);
1251
1252         if (WARN(iwl_rx_packet_payload_len(hcmd.resp_pkt) != sizeof(*rsp),
1253                  "Invalid payload len in NVM response from FW %d",
1254                  iwl_rx_packet_payload_len(hcmd.resp_pkt))) {
1255                 ret = -EINVAL;
1256                 goto out;
1257         }
1258
1259         rsp = (void *)hcmd.resp_pkt->data;
1260         if (le32_to_cpu(rsp->general.flags) & NVM_GENERAL_FLAGS_EMPTY_OTP)
1261                 IWL_INFO(trans, "OTP is empty\n");
1262
1263         nvm = kzalloc(sizeof(*nvm) +
1264                       sizeof(struct ieee80211_channel) * IWL_NUM_CHANNELS,
1265                       GFP_KERNEL);
1266         if (!nvm) {
1267                 ret = -ENOMEM;
1268                 goto out;
1269         }
1270
1271         iwl_set_hw_address_from_csr(trans, nvm);
1272         /* TODO: if platform NVM has MAC address - override it here */
1273
1274         if (!is_valid_ether_addr(nvm->hw_addr)) {
1275                 IWL_ERR(trans, "no valid mac address was found\n");
1276                 ret = -EINVAL;
1277                 goto err_free;
1278         }
1279
1280         IWL_INFO(trans, "base HW address: %pM\n", nvm->hw_addr);
1281
1282         /* Initialize general data */
1283         nvm->nvm_version = le16_to_cpu(rsp->general.nvm_version);
1284
1285         /* Initialize MAC sku data */
1286         mac_flags = le32_to_cpu(rsp->mac_sku.mac_sku_flags);
1287         nvm->sku_cap_11ac_enable =
1288                 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AC_ENABLED);
1289         nvm->sku_cap_11n_enable =
1290                 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11N_ENABLED);
1291         nvm->sku_cap_band_24ghz_enable =
1292                 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_2_4_ENABLED);
1293         nvm->sku_cap_band_52ghz_enable =
1294                 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_5_2_ENABLED);
1295         nvm->sku_cap_mimo_disabled =
1296                 !!(mac_flags & NVM_MAC_SKU_FLAGS_MIMO_DISABLED);
1297
1298         /* Initialize PHY sku data */
1299         nvm->valid_tx_ant = (u8)le32_to_cpu(rsp->phy_sku.tx_chains);
1300         nvm->valid_rx_ant = (u8)le32_to_cpu(rsp->phy_sku.rx_chains);
1301
1302         if (le32_to_cpu(rsp->regulatory.lar_enabled) && lar_fw_supported) {
1303                 nvm->lar_enabled = true;
1304                 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR;
1305         }
1306
1307         iwl_init_sbands(trans->dev, trans->cfg, nvm,
1308                         rsp->regulatory.channel_profile,
1309                         nvm->valid_tx_ant & fw->valid_tx_ant,
1310                         nvm->valid_rx_ant & fw->valid_rx_ant,
1311                         sbands_flags);
1312
1313         iwl_free_resp(&hcmd);
1314         return nvm;
1315
1316 err_free:
1317         kfree(nvm);
1318 out:
1319         iwl_free_resp(&hcmd);
1320         return ERR_PTR(ret);
1321 }
1322 IWL_EXPORT_SYMBOL(iwl_get_nvm);