2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
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33 #include <linux/irq.h>
36 #include "en/xsk/tx.h"
38 static inline bool mlx5e_channel_no_affinity_change(struct mlx5e_channel *c)
40 int current_cpu = smp_processor_id();
41 const struct cpumask *aff;
42 struct irq_data *idata;
44 idata = irq_desc_get_irq_data(c->irq_desc);
45 aff = irq_data_get_affinity_mask(idata);
46 return cpumask_test_cpu(current_cpu, aff);
49 static void mlx5e_handle_tx_dim(struct mlx5e_txqsq *sq)
51 struct mlx5e_sq_stats *stats = sq->stats;
52 struct dim_sample dim_sample = {};
54 if (unlikely(!test_bit(MLX5E_SQ_STATE_AM, &sq->state)))
57 dim_update_sample(sq->cq.event_ctr, stats->packets, stats->bytes, &dim_sample);
58 net_dim(&sq->dim, dim_sample);
61 static void mlx5e_handle_rx_dim(struct mlx5e_rq *rq)
63 struct mlx5e_rq_stats *stats = rq->stats;
64 struct dim_sample dim_sample = {};
66 if (unlikely(!test_bit(MLX5E_RQ_STATE_AM, &rq->state)))
69 dim_update_sample(rq->cq.event_ctr, stats->packets, stats->bytes, &dim_sample);
70 net_dim(&rq->dim, dim_sample);
73 void mlx5e_trigger_irq(struct mlx5e_icosq *sq)
75 struct mlx5_wq_cyc *wq = &sq->wq;
76 struct mlx5e_tx_wqe *nopwqe;
77 u16 pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc);
79 sq->db.ico_wqe[pi].opcode = MLX5_OPCODE_NOP;
80 nopwqe = mlx5e_post_nop(wq, sq->sqn, &sq->pc);
81 mlx5e_notify_hw(wq, sq->pc, sq->uar_map, &nopwqe->ctrl);
84 static bool mlx5e_napi_xsk_post(struct mlx5e_xdpsq *xsksq, struct mlx5e_rq *xskrq)
86 bool busy_xsk = false;
88 busy_xsk |= mlx5e_xsk_tx(xsksq, MLX5E_TX_XSK_POLL_BUDGET);
89 busy_xsk |= xskrq->post_wqes(xskrq);
94 int mlx5e_napi_poll(struct napi_struct *napi, int budget)
96 struct mlx5e_channel *c = container_of(napi, struct mlx5e_channel,
98 struct mlx5e_ch_stats *ch_stats = c->stats;
99 struct mlx5e_xdpsq *xsksq = &c->xsksq;
100 struct mlx5e_rq *xskrq = &c->xskrq;
101 struct mlx5e_rq *rq = &c->rq;
102 bool xsk_open = test_bit(MLX5E_CHANNEL_STATE_XSK, c->state);
103 bool aff_change = false;
104 bool busy_xsk = false;
111 for (i = 0; i < c->num_tc; i++)
112 busy |= mlx5e_poll_tx_cq(&c->sq[i].cq, budget);
114 busy |= mlx5e_poll_xdpsq_cq(&c->xdpsq.cq);
117 busy |= mlx5e_poll_xdpsq_cq(&c->rq_xdpsq.cq);
119 if (likely(budget)) { /* budget=0 means: don't poll rx rings */
121 work_done = mlx5e_poll_rx_cq(&xskrq->cq, budget);
123 if (likely(budget - work_done))
124 work_done += mlx5e_poll_rx_cq(&rq->cq, budget - work_done);
126 busy |= work_done == budget;
129 mlx5e_poll_ico_cq(&c->icosq.cq);
131 busy |= rq->post_wqes(rq);
133 mlx5e_poll_ico_cq(&c->xskicosq.cq);
134 busy |= mlx5e_poll_xdpsq_cq(&xsksq->cq);
135 busy_xsk |= mlx5e_napi_xsk_post(xsksq, xskrq);
141 if (likely(mlx5e_channel_no_affinity_change(c)))
143 ch_stats->aff_change++;
145 if (budget && work_done == budget)
149 if (unlikely(!napi_complete_done(napi, work_done)))
154 for (i = 0; i < c->num_tc; i++) {
155 mlx5e_handle_tx_dim(&c->sq[i]);
156 mlx5e_cq_arm(&c->sq[i].cq);
159 mlx5e_handle_rx_dim(rq);
161 mlx5e_cq_arm(&rq->cq);
162 mlx5e_cq_arm(&c->icosq.cq);
163 mlx5e_cq_arm(&c->xdpsq.cq);
166 mlx5e_handle_rx_dim(xskrq);
167 mlx5e_cq_arm(&c->xskicosq.cq);
168 mlx5e_cq_arm(&xsksq->cq);
169 mlx5e_cq_arm(&xskrq->cq);
172 if (unlikely(aff_change && busy_xsk)) {
173 mlx5e_trigger_irq(&c->icosq);
174 ch_stats->force_irq++;
180 void mlx5e_completion_event(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe)
182 struct mlx5e_cq *cq = container_of(mcq, struct mlx5e_cq, mcq);
184 napi_schedule(cq->napi);
186 cq->channel->stats->events++;
189 void mlx5e_cq_error_event(struct mlx5_core_cq *mcq, enum mlx5_event event)
191 struct mlx5e_cq *cq = container_of(mcq, struct mlx5e_cq, mcq);
192 struct mlx5e_channel *c = cq->channel;
193 struct net_device *netdev = c->netdev;
195 netdev_err(netdev, "%s: cqn=0x%.6x event=0x%.2x\n",
196 __func__, mcq->cqn, event);