2 * Copyright (c) 2018, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/bpf_trace.h>
34 #include <net/xdp_sock_drv.h>
36 #include "en/params.h"
38 int mlx5e_xdp_max_mtu(struct mlx5e_params *params, struct mlx5e_xsk_param *xsk)
40 int hr = mlx5e_get_linear_rq_headroom(params, xsk);
42 /* Let S := SKB_DATA_ALIGN(sizeof(struct skb_shared_info)).
43 * The condition checked in mlx5e_rx_is_linear_skb is:
44 * SKB_DATA_ALIGN(sw_mtu + hard_mtu + hr) + S <= PAGE_SIZE (1)
45 * (Note that hw_mtu == sw_mtu + hard_mtu.)
46 * What is returned from this function is:
47 * max_mtu = PAGE_SIZE - S - hr - hard_mtu (2)
48 * After assigning sw_mtu := max_mtu, the left side of (1) turns to
49 * SKB_DATA_ALIGN(PAGE_SIZE - S) + S, which is equal to PAGE_SIZE,
50 * because both PAGE_SIZE and S are already aligned. Any number greater
51 * than max_mtu would make the left side of (1) greater than PAGE_SIZE,
52 * so max_mtu is the maximum MTU allowed.
55 return MLX5E_HW2SW_MTU(params, SKB_MAX_HEAD(hr));
59 mlx5e_xmit_xdp_buff(struct mlx5e_xdpsq *sq, struct mlx5e_rq *rq,
60 struct mlx5e_dma_info *di, struct xdp_buff *xdp)
62 struct mlx5e_xdp_xmit_data xdptxd;
63 struct mlx5e_xdp_info xdpi;
64 struct xdp_frame *xdpf;
67 xdpf = xdp_convert_buff_to_frame(xdp);
71 xdptxd.data = xdpf->data;
72 xdptxd.len = xdpf->len;
74 if (xdp->rxq->mem.type == MEM_TYPE_XSK_BUFF_POOL) {
75 /* The xdp_buff was in the UMEM and was copied into a newly
76 * allocated page. The UMEM page was returned via the ZCA, and
77 * this new page has to be mapped at this point and has to be
78 * unmapped and returned via xdp_return_frame on completion.
81 /* Prevent double recycling of the UMEM page. Even in case this
82 * function returns false, the xdp_buff shouldn't be recycled,
83 * as it was already done in xdp_convert_zc_to_xdp_frame.
85 __set_bit(MLX5E_RQ_FLAG_XDP_XMIT, rq->flags); /* non-atomic */
87 xdpi.mode = MLX5E_XDP_XMIT_MODE_FRAME;
89 dma_addr = dma_map_single(sq->pdev, xdptxd.data, xdptxd.len,
91 if (dma_mapping_error(sq->pdev, dma_addr)) {
92 xdp_return_frame(xdpf);
96 xdptxd.dma_addr = dma_addr;
97 xdpi.frame.xdpf = xdpf;
98 xdpi.frame.dma_addr = dma_addr;
100 /* Driver assumes that xdp_convert_buff_to_frame returns
101 * an xdp_frame that points to the same memory region as
102 * the original xdp_buff. It allows to map the memory only
103 * once and to use the DMA_BIDIRECTIONAL mode.
106 xdpi.mode = MLX5E_XDP_XMIT_MODE_PAGE;
108 dma_addr = di->addr + (xdpf->data - (void *)xdpf);
109 dma_sync_single_for_device(sq->pdev, dma_addr, xdptxd.len,
112 xdptxd.dma_addr = dma_addr;
117 return INDIRECT_CALL_2(sq->xmit_xdp_frame, mlx5e_xmit_xdp_frame_mpwqe,
118 mlx5e_xmit_xdp_frame, sq, &xdptxd, &xdpi, 0);
121 /* returns true if packet was consumed by xdp */
122 bool mlx5e_xdp_handle(struct mlx5e_rq *rq, struct mlx5e_dma_info *di,
123 u32 *len, struct xdp_buff *xdp)
125 struct bpf_prog *prog = READ_ONCE(rq->xdp_prog);
132 act = bpf_prog_run_xdp(prog, xdp);
135 *len = xdp->data_end - xdp->data;
138 if (unlikely(!mlx5e_xmit_xdp_buff(rq->xdpsq, rq, di, xdp)))
140 __set_bit(MLX5E_RQ_FLAG_XDP_XMIT, rq->flags); /* non-atomic */
143 /* When XDP enabled then page-refcnt==1 here */
144 err = xdp_do_redirect(rq->netdev, xdp, prog);
147 __set_bit(MLX5E_RQ_FLAG_XDP_XMIT, rq->flags);
148 __set_bit(MLX5E_RQ_FLAG_XDP_REDIRECT, rq->flags);
149 if (xdp->rxq->mem.type != MEM_TYPE_XSK_BUFF_POOL)
150 mlx5e_page_dma_unmap(rq, di);
151 rq->stats->xdp_redirect++;
154 bpf_warn_invalid_xdp_action(act);
158 trace_xdp_exception(rq->netdev, prog, act);
161 rq->stats->xdp_drop++;
166 static u16 mlx5e_xdpsq_get_next_pi(struct mlx5e_xdpsq *sq, u16 size)
168 struct mlx5_wq_cyc *wq = &sq->wq;
169 u16 pi, contig_wqebbs;
171 pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc);
172 contig_wqebbs = mlx5_wq_cyc_get_contig_wqebbs(wq, pi);
173 if (unlikely(contig_wqebbs < size)) {
174 struct mlx5e_xdp_wqe_info *wi, *edge_wi;
176 wi = &sq->db.wqe_info[pi];
177 edge_wi = wi + contig_wqebbs;
179 /* Fill SQ frag edge with NOPs to avoid WQE wrapping two pages. */
180 for (; wi < edge_wi; wi++) {
181 *wi = (struct mlx5e_xdp_wqe_info) {
185 mlx5e_post_nop(wq, sq->sqn, &sq->pc);
187 sq->stats->nops += contig_wqebbs;
189 pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc);
195 static void mlx5e_xdp_mpwqe_session_start(struct mlx5e_xdpsq *sq)
197 struct mlx5e_xdp_mpwqe *session = &sq->mpwqe;
198 struct mlx5e_xdpsq_stats *stats = sq->stats;
199 struct mlx5e_tx_wqe *wqe;
202 pi = mlx5e_xdpsq_get_next_pi(sq, MLX5E_TX_MPW_MAX_WQEBBS);
203 wqe = MLX5E_TX_FETCH_WQE(sq, pi);
204 net_prefetchw(wqe->data);
206 *session = (struct mlx5e_xdp_mpwqe) {
208 .ds_count = MLX5E_TX_WQE_EMPTY_DS_COUNT,
210 .inline_on = mlx5e_xdp_get_inline_state(sq, session->inline_on),
216 void mlx5e_xdp_mpwqe_complete(struct mlx5e_xdpsq *sq)
218 struct mlx5_wq_cyc *wq = &sq->wq;
219 struct mlx5e_xdp_mpwqe *session = &sq->mpwqe;
220 struct mlx5_wqe_ctrl_seg *cseg = &session->wqe->ctrl;
221 u16 ds_count = session->ds_count;
222 u16 pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc);
223 struct mlx5e_xdp_wqe_info *wi = &sq->db.wqe_info[pi];
225 cseg->opmod_idx_opcode =
226 cpu_to_be32((sq->pc << 8) | MLX5_OPCODE_ENHANCED_MPSW);
227 cseg->qpn_ds = cpu_to_be32((sq->sqn << 8) | ds_count);
229 wi->num_wqebbs = DIV_ROUND_UP(ds_count, MLX5_SEND_WQEBB_NUM_DS);
230 wi->num_pkts = session->pkt_count;
232 sq->pc += wi->num_wqebbs;
234 sq->doorbell_cseg = cseg;
236 session->wqe = NULL; /* Close session */
240 MLX5E_XDP_CHECK_OK = 1,
241 MLX5E_XDP_CHECK_START_MPWQE = 2,
244 INDIRECT_CALLABLE_SCOPE int mlx5e_xmit_xdp_frame_check_mpwqe(struct mlx5e_xdpsq *sq)
246 if (unlikely(!sq->mpwqe.wqe)) {
247 const u16 stop_room = mlx5e_stop_room_for_wqe(MLX5_SEND_WQE_MAX_WQEBBS);
249 if (unlikely(!mlx5e_wqc_has_room_for(&sq->wq, sq->cc, sq->pc,
251 /* SQ is full, ring doorbell */
252 mlx5e_xmit_xdp_doorbell(sq);
257 return MLX5E_XDP_CHECK_START_MPWQE;
260 return MLX5E_XDP_CHECK_OK;
263 INDIRECT_CALLABLE_SCOPE bool
264 mlx5e_xmit_xdp_frame_mpwqe(struct mlx5e_xdpsq *sq, struct mlx5e_xdp_xmit_data *xdptxd,
265 struct mlx5e_xdp_info *xdpi, int check_result)
267 struct mlx5e_xdp_mpwqe *session = &sq->mpwqe;
268 struct mlx5e_xdpsq_stats *stats = sq->stats;
270 if (unlikely(xdptxd->len > sq->hw_mtu)) {
276 check_result = mlx5e_xmit_xdp_frame_check_mpwqe(sq);
277 if (unlikely(check_result < 0))
280 if (check_result == MLX5E_XDP_CHECK_START_MPWQE) {
281 /* Start the session when nothing can fail, so it's guaranteed
282 * that if there is an active session, it has at least one dseg,
283 * and it's safe to complete it at any time.
285 mlx5e_xdp_mpwqe_session_start(sq);
288 mlx5e_xdp_mpwqe_add_dseg(sq, xdptxd, stats);
290 if (unlikely(mlx5e_xdp_mpqwe_is_full(session)))
291 mlx5e_xdp_mpwqe_complete(sq);
293 mlx5e_xdpi_fifo_push(&sq->db.xdpi_fifo, xdpi);
298 INDIRECT_CALLABLE_SCOPE int mlx5e_xmit_xdp_frame_check(struct mlx5e_xdpsq *sq)
300 if (unlikely(!mlx5e_wqc_has_room_for(&sq->wq, sq->cc, sq->pc, 1))) {
301 /* SQ is full, ring doorbell */
302 mlx5e_xmit_xdp_doorbell(sq);
307 return MLX5E_XDP_CHECK_OK;
310 INDIRECT_CALLABLE_SCOPE bool
311 mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq, struct mlx5e_xdp_xmit_data *xdptxd,
312 struct mlx5e_xdp_info *xdpi, int check_result)
314 struct mlx5_wq_cyc *wq = &sq->wq;
315 u16 pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc);
316 struct mlx5e_tx_wqe *wqe = mlx5_wq_cyc_get_wqe(wq, pi);
318 struct mlx5_wqe_ctrl_seg *cseg = &wqe->ctrl;
319 struct mlx5_wqe_eth_seg *eseg = &wqe->eth;
320 struct mlx5_wqe_data_seg *dseg = wqe->data;
322 dma_addr_t dma_addr = xdptxd->dma_addr;
323 u32 dma_len = xdptxd->len;
325 struct mlx5e_xdpsq_stats *stats = sq->stats;
329 if (unlikely(dma_len < MLX5E_XDP_MIN_INLINE || sq->hw_mtu < dma_len)) {
335 check_result = mlx5e_xmit_xdp_frame_check(sq);
336 if (unlikely(check_result < 0))
341 /* copy the inline part if required */
342 if (sq->min_inline_mode != MLX5_INLINE_MODE_NONE) {
343 memcpy(eseg->inline_hdr.start, xdptxd->data, MLX5E_XDP_MIN_INLINE);
344 eseg->inline_hdr.sz = cpu_to_be16(MLX5E_XDP_MIN_INLINE);
345 dma_len -= MLX5E_XDP_MIN_INLINE;
346 dma_addr += MLX5E_XDP_MIN_INLINE;
350 /* write the dma part */
351 dseg->addr = cpu_to_be64(dma_addr);
352 dseg->byte_count = cpu_to_be32(dma_len);
354 cseg->opmod_idx_opcode = cpu_to_be32((sq->pc << 8) | MLX5_OPCODE_SEND);
358 sq->doorbell_cseg = cseg;
360 mlx5e_xdpi_fifo_push(&sq->db.xdpi_fifo, xdpi);
365 static void mlx5e_free_xdpsq_desc(struct mlx5e_xdpsq *sq,
366 struct mlx5e_xdp_wqe_info *wi,
370 struct mlx5e_xdp_info_fifo *xdpi_fifo = &sq->db.xdpi_fifo;
373 for (i = 0; i < wi->num_pkts; i++) {
374 struct mlx5e_xdp_info xdpi = mlx5e_xdpi_fifo_pop(xdpi_fifo);
377 case MLX5E_XDP_XMIT_MODE_FRAME:
378 /* XDP_TX from the XSK RQ and XDP_REDIRECT */
379 dma_unmap_single(sq->pdev, xdpi.frame.dma_addr,
380 xdpi.frame.xdpf->len, DMA_TO_DEVICE);
381 xdp_return_frame(xdpi.frame.xdpf);
383 case MLX5E_XDP_XMIT_MODE_PAGE:
384 /* XDP_TX from the regular RQ */
385 mlx5e_page_release_dynamic(xdpi.page.rq, &xdpi.page.di, recycle);
387 case MLX5E_XDP_XMIT_MODE_XSK:
397 bool mlx5e_poll_xdpsq_cq(struct mlx5e_cq *cq)
399 struct mlx5e_xdpsq *sq;
400 struct mlx5_cqe64 *cqe;
405 sq = container_of(cq, struct mlx5e_xdpsq, cq);
407 if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state)))
410 cqe = mlx5_cqwq_get_cqe(&cq->wq);
414 /* sq->cc must be updated only after mlx5_cqwq_update_db_record(),
415 * otherwise a cq overrun may occur
421 struct mlx5e_xdp_wqe_info *wi;
425 mlx5_cqwq_pop(&cq->wq);
427 wqe_counter = be16_to_cpu(cqe->wqe_counter);
430 last_wqe = (sqcc == wqe_counter);
431 ci = mlx5_wq_cyc_ctr2ix(&sq->wq, sqcc);
432 wi = &sq->db.wqe_info[ci];
434 sqcc += wi->num_wqebbs;
436 mlx5e_free_xdpsq_desc(sq, wi, &xsk_frames, true);
439 if (unlikely(get_cqe_opcode(cqe) != MLX5_CQE_REQ)) {
440 netdev_WARN_ONCE(sq->channel->netdev,
441 "Bad OP in XDPSQ CQE: 0x%x\n",
442 get_cqe_opcode(cqe));
443 mlx5e_dump_error_cqe(&sq->cq, sq->sqn,
444 (struct mlx5_err_cqe *)cqe);
445 mlx5_wq_cyc_wqe_dump(&sq->wq, ci, wi->num_wqebbs);
447 } while ((++i < MLX5E_TX_CQ_POLL_BUDGET) && (cqe = mlx5_cqwq_get_cqe(&cq->wq)));
450 xsk_tx_completed(sq->xsk_pool, xsk_frames);
452 sq->stats->cqes += i;
454 mlx5_cqwq_update_db_record(&cq->wq);
456 /* ensure cq space is freed before enabling more cqes */
460 return (i == MLX5E_TX_CQ_POLL_BUDGET);
463 void mlx5e_free_xdpsq_descs(struct mlx5e_xdpsq *sq)
467 while (sq->cc != sq->pc) {
468 struct mlx5e_xdp_wqe_info *wi;
471 ci = mlx5_wq_cyc_ctr2ix(&sq->wq, sq->cc);
472 wi = &sq->db.wqe_info[ci];
474 sq->cc += wi->num_wqebbs;
476 mlx5e_free_xdpsq_desc(sq, wi, &xsk_frames, false);
480 xsk_tx_completed(sq->xsk_pool, xsk_frames);
483 int mlx5e_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
486 struct mlx5e_priv *priv = netdev_priv(dev);
487 struct mlx5e_xdpsq *sq;
492 /* this flag is sufficient, no need to test internal sq state */
493 if (unlikely(!mlx5e_xdp_tx_is_enabled(priv)))
496 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
499 sq_num = smp_processor_id();
501 if (unlikely(sq_num >= priv->channels.num))
504 sq = &priv->channels.c[sq_num]->xdpsq;
506 for (i = 0; i < n; i++) {
507 struct xdp_frame *xdpf = frames[i];
508 struct mlx5e_xdp_xmit_data xdptxd;
509 struct mlx5e_xdp_info xdpi;
512 xdptxd.data = xdpf->data;
513 xdptxd.len = xdpf->len;
514 xdptxd.dma_addr = dma_map_single(sq->pdev, xdptxd.data,
515 xdptxd.len, DMA_TO_DEVICE);
517 if (unlikely(dma_mapping_error(sq->pdev, xdptxd.dma_addr))) {
518 xdp_return_frame_rx_napi(xdpf);
523 xdpi.mode = MLX5E_XDP_XMIT_MODE_FRAME;
524 xdpi.frame.xdpf = xdpf;
525 xdpi.frame.dma_addr = xdptxd.dma_addr;
527 ret = INDIRECT_CALL_2(sq->xmit_xdp_frame, mlx5e_xmit_xdp_frame_mpwqe,
528 mlx5e_xmit_xdp_frame, sq, &xdptxd, &xdpi, 0);
529 if (unlikely(!ret)) {
530 dma_unmap_single(sq->pdev, xdptxd.dma_addr,
531 xdptxd.len, DMA_TO_DEVICE);
532 xdp_return_frame_rx_napi(xdpf);
537 if (flags & XDP_XMIT_FLUSH) {
539 mlx5e_xdp_mpwqe_complete(sq);
540 mlx5e_xmit_xdp_doorbell(sq);
546 void mlx5e_xdp_rx_poll_complete(struct mlx5e_rq *rq)
548 struct mlx5e_xdpsq *xdpsq = rq->xdpsq;
550 if (xdpsq->mpwqe.wqe)
551 mlx5e_xdp_mpwqe_complete(xdpsq);
553 mlx5e_xmit_xdp_doorbell(xdpsq);
555 if (test_bit(MLX5E_RQ_FLAG_XDP_REDIRECT, rq->flags)) {
557 __clear_bit(MLX5E_RQ_FLAG_XDP_REDIRECT, rq->flags);
561 void mlx5e_set_xmit_fp(struct mlx5e_xdpsq *sq, bool is_mpw)
563 sq->xmit_xdp_frame_check = is_mpw ?
564 mlx5e_xmit_xdp_frame_check_mpwqe : mlx5e_xmit_xdp_frame_check;
565 sq->xmit_xdp_frame = is_mpw ?
566 mlx5e_xmit_xdp_frame_mpwqe : mlx5e_xmit_xdp_frame;