drivers/gpu/drm/nouveau/nvkm/subdev/fault/tu102.c

   1 /*
   2  * Copyright 2018 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  */
  22 #include "priv.h"
  23
  24 #include <core/memory.h>
  25 #include <subdev/mc.h>
  26 #include <subdev/mmu.h>
  27 #include <subdev/vfn.h>
  28 #include <engine/fifo.h>
  29
  30 #include <nvif/class.h>
  31
  32 static irqreturn_t
  33 tu102_fault_buffer_notify(struct nvkm_inth *inth)
  34 {
  35         struct nvkm_fault_buffer *buffer = container_of(inth, typeof(*buffer), inth);
  36
  37         nvkm_event_ntfy(&buffer->fault->event, buffer->id, NVKM_FAULT_BUFFER_EVENT_PENDING);
  38         return IRQ_HANDLED;
  39 }
  40
  41 static void
  42 tu102_fault_buffer_intr(struct nvkm_fault_buffer *buffer, bool enable)
  43 {
  44         if (enable)
  45                 nvkm_inth_allow(&buffer->inth);
  46         else
  47                 nvkm_inth_block(&buffer->inth);
  48 }
  49
  50 static void
  51 tu102_fault_buffer_fini(struct nvkm_fault_buffer *buffer)
  52 {
  53         struct nvkm_device *device = buffer->fault->subdev.device;
  54         const u32 foff = buffer->id * 0x20;
  55
  56         nvkm_mask(device, 0xb83010 + foff, 0x80000000, 0x00000000);
  57 }
  58
  59 static void
  60 tu102_fault_buffer_init(struct nvkm_fault_buffer *buffer)
  61 {
  62         struct nvkm_device *device = buffer->fault->subdev.device;
  63         const u32 foff = buffer->id * 0x20;
  64
  65         nvkm_mask(device, 0xb83010 + foff, 0xc0000000, 0x40000000);
  66         nvkm_wr32(device, 0xb83004 + foff, upper_32_bits(buffer->addr));
  67         nvkm_wr32(device, 0xb83000 + foff, lower_32_bits(buffer->addr));
  68         nvkm_mask(device, 0xb83010 + foff, 0x80000000, 0x80000000);
  69 }
  70
  71 static void
  72 tu102_fault_buffer_info(struct nvkm_fault_buffer *buffer)
  73 {
  74         struct nvkm_device *device = buffer->fault->subdev.device;
  75         const u32 foff = buffer->id * 0x20;
  76
  77         nvkm_mask(device, 0xb83010 + foff, 0x40000000, 0x40000000);
  78
  79         buffer->entries = nvkm_rd32(device, 0xb83010 + foff) & 0x000fffff;
  80         buffer->get = 0xb83008 + foff;
  81         buffer->put = 0xb8300c + foff;
  82 }
  83
  84 static irqreturn_t
  85 tu102_fault_info_fault(struct nvkm_inth *inth)
  86 {
  87         struct nvkm_fault *fault = container_of(inth, typeof(*fault), info_fault);
  88         struct nvkm_subdev *subdev = &fault->subdev;
  89         struct nvkm_device *device = subdev->device;
  90         struct nvkm_fault_data info;
  91         const u32 addrlo = nvkm_rd32(device, 0xb83080);
  92         const u32 addrhi = nvkm_rd32(device, 0xb83084);
  93         const u32  info0 = nvkm_rd32(device, 0xb83088);
  94         const u32 insthi = nvkm_rd32(device, 0xb8308c);
  95         const u32  info1 = nvkm_rd32(device, 0xb83090);
  96
  97         info.addr = ((u64)addrhi << 32) | addrlo;
  98         info.inst = ((u64)insthi << 32) | (info0 & 0xfffff000);
  99         info.time = 0;
 100         info.engine = (info0 & 0x000000ff);
 101         info.valid  = (info1 & 0x80000000) >> 31;
 102         info.gpc    = (info1 & 0x1f000000) >> 24;
 103         info.hub    = (info1 & 0x00100000) >> 20;
 104         info.access = (info1 & 0x000f0000) >> 16;
 105         info.client = (info1 & 0x00007f00) >> 8;
 106         info.reason = (info1 & 0x0000001f);
 107
 108         nvkm_fifo_fault(device->fifo, &info);
 109
 110         nvkm_wr32(device, 0xb83094, 0x80000000);
 111         return IRQ_HANDLED;
 112 }
 113
 114 static void
 115 tu102_fault_fini(struct nvkm_fault *fault)
 116 {
 117         nvkm_event_ntfy_block(&fault->nrpfb);
 118         flush_work(&fault->nrpfb_work);
 119
 120         if (fault->buffer[0])
 121                 fault->func->buffer.fini(fault->buffer[0]);
 122
 123         nvkm_inth_block(&fault->info_fault);
 124 }
 125
 126 static void
 127 tu102_fault_init(struct nvkm_fault *fault)
 128 {
 129         nvkm_inth_allow(&fault->info_fault);
 130
 131         fault->func->buffer.init(fault->buffer[0]);
 132         nvkm_event_ntfy_allow(&fault->nrpfb);
 133 }
 134
 135 static int
 136 tu102_fault_oneinit(struct nvkm_fault *fault)
 137 {
 138         struct nvkm_device *device = fault->subdev.device;
 139         struct nvkm_intr *intr = &device->vfn->intr;
 140         int ret, i;
 141
 142         ret = nvkm_inth_add(intr, nvkm_rd32(device, 0x100ee0) & 0x0000ffff,
 143                             NVKM_INTR_PRIO_NORMAL, &fault->subdev, tu102_fault_info_fault,
 144                             &fault->info_fault);
 145         if (ret)
 146                 return ret;
 147
 148         for (i = 0; i < fault->buffer_nr; i++) {
 149                 ret = nvkm_inth_add(intr, nvkm_rd32(device, 0x100ee4 + (i * 4)) >> 16,
 150                                     NVKM_INTR_PRIO_NORMAL, &fault->subdev,
 151                                     tu102_fault_buffer_notify, &fault->buffer[i]->inth);
 152                 if (ret)
 153                         return ret;
 154         }
 155
 156         return gv100_fault_oneinit(fault);
 157 }
 158
 159 static const struct nvkm_fault_func
 160 tu102_fault = {
 161         .oneinit = tu102_fault_oneinit,
 162         .init = tu102_fault_init,
 163         .fini = tu102_fault_fini,
 164         .buffer.nr = 2,
 165         .buffer.entry_size = 32,
 166         .buffer.info = tu102_fault_buffer_info,
 167         .buffer.pin = gp100_fault_buffer_pin,
 168         .buffer.init = tu102_fault_buffer_init,
 169         .buffer.fini = tu102_fault_buffer_fini,
 170         .buffer.intr = tu102_fault_buffer_intr,
 171         .user = { { 0, 0, VOLTA_FAULT_BUFFER_A }, 1 },
 172 };
 173
 174 int
 175 tu102_fault_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
 176                 struct nvkm_fault **pfault)
 177 {
 178         int ret = nvkm_fault_new_(&tu102_fault, device, type, inst, pfault);
 179         if (ret)
 180                 return ret;
 181
 182         INIT_WORK(&(*pfault)->nrpfb_work, gv100_fault_buffer_process);
 183         return 0;
 184 }