2 * Copyright 2012 Red Hat Inc.
3 * Parts based on xf86-video-ast
4 * Copyright (c) 2005 ASPEED Technology Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
28 * Authors: Dave Airlie <airlied@redhat.com>
30 #include <linux/export.h>
32 #include <drm/drm_crtc.h>
33 #include <drm/drm_crtc_helper.h>
34 #include <drm/drm_plane_helper.h>
35 #include <drm/drm_probe_helper.h>
38 #include "ast_tables.h"
40 static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev);
41 static void ast_i2c_destroy(struct ast_i2c_chan *i2c);
42 static int ast_cursor_set(struct drm_crtc *crtc,
43 struct drm_file *file_priv,
47 static int ast_cursor_move(struct drm_crtc *crtc,
50 static inline void ast_load_palette_index(struct ast_private *ast,
51 u8 index, u8 red, u8 green,
54 ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index);
55 ast_io_read8(ast, AST_IO_SEQ_PORT);
56 ast_io_write8(ast, AST_IO_DAC_DATA, red);
57 ast_io_read8(ast, AST_IO_SEQ_PORT);
58 ast_io_write8(ast, AST_IO_DAC_DATA, green);
59 ast_io_read8(ast, AST_IO_SEQ_PORT);
60 ast_io_write8(ast, AST_IO_DAC_DATA, blue);
61 ast_io_read8(ast, AST_IO_SEQ_PORT);
64 static void ast_crtc_load_lut(struct drm_crtc *crtc)
66 struct ast_private *ast = crtc->dev->dev_private;
73 r = crtc->gamma_store;
74 g = r + crtc->gamma_size;
75 b = g + crtc->gamma_size;
77 for (i = 0; i < 256; i++)
78 ast_load_palette_index(ast, i, *r++ >> 8, *g++ >> 8, *b++ >> 8);
81 static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct drm_display_mode *mode,
82 struct drm_display_mode *adjusted_mode,
83 struct ast_vbios_mode_info *vbios_mode)
85 struct ast_private *ast = crtc->dev->dev_private;
86 const struct drm_framebuffer *fb = crtc->primary->fb;
87 u32 refresh_rate_index = 0, mode_id, color_index, refresh_rate;
88 const struct ast_vbios_enhtable *best = NULL;
92 switch (fb->format->cpp[0] * 8) {
94 vbios_mode->std_table = &vbios_stdtable[VGAModeIndex];
95 color_index = VGAModeIndex - 1;
98 vbios_mode->std_table = &vbios_stdtable[HiCModeIndex];
99 color_index = HiCModeIndex;
103 vbios_mode->std_table = &vbios_stdtable[TrueCModeIndex];
104 color_index = TrueCModeIndex;
110 switch (crtc->mode.crtc_hdisplay) {
112 vbios_mode->enh_table = &res_640x480[refresh_rate_index];
115 vbios_mode->enh_table = &res_800x600[refresh_rate_index];
118 vbios_mode->enh_table = &res_1024x768[refresh_rate_index];
121 if (crtc->mode.crtc_vdisplay == 800)
122 vbios_mode->enh_table = &res_1280x800[refresh_rate_index];
124 vbios_mode->enh_table = &res_1280x1024[refresh_rate_index];
127 vbios_mode->enh_table = &res_1360x768[refresh_rate_index];
130 vbios_mode->enh_table = &res_1440x900[refresh_rate_index];
133 if (crtc->mode.crtc_vdisplay == 900)
134 vbios_mode->enh_table = &res_1600x900[refresh_rate_index];
136 vbios_mode->enh_table = &res_1600x1200[refresh_rate_index];
139 vbios_mode->enh_table = &res_1680x1050[refresh_rate_index];
142 if (crtc->mode.crtc_vdisplay == 1080)
143 vbios_mode->enh_table = &res_1920x1080[refresh_rate_index];
145 vbios_mode->enh_table = &res_1920x1200[refresh_rate_index];
151 refresh_rate = drm_mode_vrefresh(mode);
152 check_sync = vbios_mode->enh_table->flags & WideScreenMode;
154 const struct ast_vbios_enhtable *loop = vbios_mode->enh_table;
156 while (loop->refresh_rate != 0xff) {
158 (((mode->flags & DRM_MODE_FLAG_NVSYNC) &&
159 (loop->flags & PVSync)) ||
160 ((mode->flags & DRM_MODE_FLAG_PVSYNC) &&
161 (loop->flags & NVSync)) ||
162 ((mode->flags & DRM_MODE_FLAG_NHSYNC) &&
163 (loop->flags & PHSync)) ||
164 ((mode->flags & DRM_MODE_FLAG_PHSYNC) &&
165 (loop->flags & NHSync)))) {
169 if (loop->refresh_rate <= refresh_rate
170 && (!best || loop->refresh_rate > best->refresh_rate))
174 if (best || !check_sync)
179 vbios_mode->enh_table = best;
181 hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0;
182 vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0;
184 adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht;
185 adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder;
186 adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder;
187 adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder +
188 vbios_mode->enh_table->hfp;
189 adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder +
190 vbios_mode->enh_table->hfp +
191 vbios_mode->enh_table->hsync);
193 adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt;
194 adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder;
195 adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder;
196 adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder +
197 vbios_mode->enh_table->vfp;
198 adjusted_mode->crtc_vsync_end = (vbios_mode->enh_table->vde + vborder +
199 vbios_mode->enh_table->vfp +
200 vbios_mode->enh_table->vsync);
202 refresh_rate_index = vbios_mode->enh_table->refresh_rate_index;
203 mode_id = vbios_mode->enh_table->mode_id;
205 if (ast->chip == AST1180) {
208 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0xf) << 4));
209 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff);
210 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff);
212 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);
213 if (vbios_mode->enh_table->flags & NewModeInfo) {
214 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);
215 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92,
216 fb->format->cpp[0] * 8);
217 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000);
218 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay);
219 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8);
221 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay);
222 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8);
230 static void ast_set_std_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
231 struct ast_vbios_mode_info *vbios_mode)
233 struct ast_private *ast = crtc->dev->dev_private;
234 const struct ast_vbios_stdtable *stdtable;
238 stdtable = vbios_mode->std_table;
240 jreg = stdtable->misc;
241 ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
244 ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03);
245 for (i = 0; i < 4; i++) {
246 jreg = stdtable->seq[i];
249 ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1) , jreg);
253 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
254 for (i = 0; i < 25; i++)
255 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
258 jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
259 for (i = 0; i < 20; i++) {
260 jreg = stdtable->ar[i];
261 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i);
262 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg);
264 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14);
265 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00);
267 jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
268 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20);
271 for (i = 0; i < 9; i++)
272 ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]);
275 static void ast_set_crtc_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
276 struct ast_vbios_mode_info *vbios_mode)
278 struct ast_private *ast = crtc->dev->dev_private;
279 u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0;
280 u16 temp, precache = 0;
282 if ((ast->chip == AST2500) &&
283 (vbios_mode->enh_table->flags & AST2500PreCatchCRT))
286 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
288 temp = (mode->crtc_htotal >> 3) - 5;
290 jregAC |= 0x01; /* HT D[8] */
291 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp);
293 temp = (mode->crtc_hdisplay >> 3) - 1;
295 jregAC |= 0x04; /* HDE D[8] */
296 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp);
298 temp = (mode->crtc_hblank_start >> 3) - 1;
300 jregAC |= 0x10; /* HBS D[8] */
301 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp);
303 temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f;
305 jreg05 |= 0x80; /* HBE D[5] */
307 jregAD |= 0x01; /* HBE D[5] */
308 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f));
310 temp = ((mode->crtc_hsync_start-precache) >> 3) - 1;
312 jregAC |= 0x40; /* HRS D[5] */
313 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp);
315 temp = (((mode->crtc_hsync_end-precache) >> 3) - 1) & 0x3f;
317 jregAD |= 0x04; /* HRE D[5] */
318 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05));
320 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC);
321 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD);
324 temp = (mode->crtc_vtotal) - 2;
331 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp);
333 temp = (mode->crtc_vsync_start) - 1;
340 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp);
342 temp = (mode->crtc_vsync_end - 1) & 0x3f;
347 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf);
349 temp = mode->crtc_vdisplay - 1;
356 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp);
358 temp = mode->crtc_vblank_start - 1;
365 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp);
367 temp = mode->crtc_vblank_end - 1;
370 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp);
372 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07);
373 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09);
374 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80));
377 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x80);
379 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x00);
381 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80);
384 static void ast_set_offset_reg(struct drm_crtc *crtc)
386 struct ast_private *ast = crtc->dev->dev_private;
387 const struct drm_framebuffer *fb = crtc->primary->fb;
391 offset = fb->pitches[0] >> 3;
392 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff));
393 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f);
396 static void ast_set_dclk_reg(struct drm_device *dev, struct drm_display_mode *mode,
397 struct ast_vbios_mode_info *vbios_mode)
399 struct ast_private *ast = dev->dev_private;
400 const struct ast_vbios_dclk_info *clk_info;
402 if (ast->chip == AST2500)
403 clk_info = &dclk_table_ast2500[vbios_mode->enh_table->dclk_index];
405 clk_info = &dclk_table[vbios_mode->enh_table->dclk_index];
407 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1);
408 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2);
409 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f,
410 (clk_info->param3 & 0xc0) |
411 ((clk_info->param3 & 0x3) << 4));
414 static void ast_set_ext_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
415 struct ast_vbios_mode_info *vbios_mode)
417 struct ast_private *ast = crtc->dev->dev_private;
418 const struct drm_framebuffer *fb = crtc->primary->fb;
419 u8 jregA0 = 0, jregA3 = 0, jregA8 = 0;
421 switch (fb->format->cpp[0] * 8) {
440 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0);
441 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3);
442 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8);
445 if (ast->chip == AST2300 || ast->chip == AST2400 ||
446 ast->chip == AST2500) {
447 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78);
448 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60);
449 } else if (ast->chip == AST2100 ||
450 ast->chip == AST1100 ||
451 ast->chip == AST2200 ||
452 ast->chip == AST2150) {
453 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f);
454 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f);
456 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f);
457 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f);
461 static void ast_set_sync_reg(struct drm_device *dev, struct drm_display_mode *mode,
462 struct ast_vbios_mode_info *vbios_mode)
464 struct ast_private *ast = dev->dev_private;
467 jreg = ast_io_read8(ast, AST_IO_MISC_PORT_READ);
469 if (vbios_mode->enh_table->flags & NVSync) jreg |= 0x80;
470 if (vbios_mode->enh_table->flags & NHSync) jreg |= 0x40;
471 ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
474 static bool ast_set_dac_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
475 struct ast_vbios_mode_info *vbios_mode)
477 const struct drm_framebuffer *fb = crtc->primary->fb;
479 switch (fb->format->cpp[0] * 8) {
488 static void ast_set_start_address_crt1(struct drm_crtc *crtc, unsigned offset)
490 struct ast_private *ast = crtc->dev->dev_private;
494 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff));
495 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff));
496 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff));
500 static void ast_crtc_dpms(struct drm_crtc *crtc, int mode)
502 struct ast_private *ast = crtc->dev->dev_private;
504 if (ast->chip == AST1180)
508 case DRM_MODE_DPMS_ON:
509 case DRM_MODE_DPMS_STANDBY:
510 case DRM_MODE_DPMS_SUSPEND:
511 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);
512 if (ast->tx_chip_type == AST_TX_DP501)
513 ast_set_dp501_video_output(crtc->dev, 1);
514 ast_crtc_load_lut(crtc);
516 case DRM_MODE_DPMS_OFF:
517 if (ast->tx_chip_type == AST_TX_DP501)
518 ast_set_dp501_video_output(crtc->dev, 0);
519 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x20);
524 /* ast is different - we will force move buffers out of VRAM */
525 static int ast_crtc_do_set_base(struct drm_crtc *crtc,
526 struct drm_framebuffer *fb,
527 int x, int y, int atomic)
529 struct ast_private *ast = crtc->dev->dev_private;
530 struct drm_gem_object *obj;
531 struct ast_framebuffer *ast_fb;
532 struct drm_gem_vram_object *gbo;
537 /* push the previous fb to system ram */
539 ast_fb = to_ast_framebuffer(fb);
541 gbo = drm_gem_vram_of_gem(obj);
542 drm_gem_vram_push_to_system(gbo);
545 ast_fb = to_ast_framebuffer(crtc->primary->fb);
547 gbo = drm_gem_vram_of_gem(obj);
549 ret = drm_gem_vram_pin(gbo, DRM_GEM_VRAM_PL_FLAG_VRAM);
552 gpu_addr = drm_gem_vram_offset(gbo);
555 goto err_drm_gem_vram_unpin;
558 if (&ast->fbdev->afb == ast_fb) {
559 /* if pushing console in kmap it */
560 base = drm_gem_vram_kmap(gbo, true, NULL);
563 DRM_ERROR("failed to kmap fbcon\n");
565 ast_fbdev_set_base(ast, gpu_addr);
569 ast_set_offset_reg(crtc);
570 ast_set_start_address_crt1(crtc, (u32)gpu_addr);
574 err_drm_gem_vram_unpin:
575 drm_gem_vram_unpin(gbo);
579 static int ast_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
580 struct drm_framebuffer *old_fb)
582 return ast_crtc_do_set_base(crtc, old_fb, x, y, 0);
585 static int ast_crtc_mode_set(struct drm_crtc *crtc,
586 struct drm_display_mode *mode,
587 struct drm_display_mode *adjusted_mode,
589 struct drm_framebuffer *old_fb)
591 struct drm_device *dev = crtc->dev;
592 struct ast_private *ast = crtc->dev->dev_private;
593 struct ast_vbios_mode_info vbios_mode;
595 if (ast->chip == AST1180) {
596 DRM_ERROR("AST 1180 modesetting not supported\n");
600 ret = ast_get_vbios_mode_info(crtc, mode, adjusted_mode, &vbios_mode);
605 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x04);
607 ast_set_std_reg(crtc, adjusted_mode, &vbios_mode);
608 ast_set_crtc_reg(crtc, adjusted_mode, &vbios_mode);
609 ast_set_offset_reg(crtc);
610 ast_set_dclk_reg(dev, adjusted_mode, &vbios_mode);
611 ast_set_ext_reg(crtc, adjusted_mode, &vbios_mode);
612 ast_set_sync_reg(dev, adjusted_mode, &vbios_mode);
613 ast_set_dac_reg(crtc, adjusted_mode, &vbios_mode);
615 ast_crtc_mode_set_base(crtc, x, y, old_fb);
620 static void ast_crtc_disable(struct drm_crtc *crtc)
623 ast_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
624 if (crtc->primary->fb) {
625 struct ast_framebuffer *ast_fb = to_ast_framebuffer(crtc->primary->fb);
626 struct drm_gem_object *obj = ast_fb->obj;
627 struct drm_gem_vram_object *gbo = drm_gem_vram_of_gem(obj);
629 drm_gem_vram_push_to_system(gbo);
631 crtc->primary->fb = NULL;
634 static void ast_crtc_prepare(struct drm_crtc *crtc)
639 static void ast_crtc_commit(struct drm_crtc *crtc)
641 struct ast_private *ast = crtc->dev->dev_private;
642 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);
643 ast_crtc_load_lut(crtc);
647 static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = {
648 .dpms = ast_crtc_dpms,
649 .mode_set = ast_crtc_mode_set,
650 .mode_set_base = ast_crtc_mode_set_base,
651 .disable = ast_crtc_disable,
652 .prepare = ast_crtc_prepare,
653 .commit = ast_crtc_commit,
657 static void ast_crtc_reset(struct drm_crtc *crtc)
662 static int ast_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
663 u16 *blue, uint32_t size,
664 struct drm_modeset_acquire_ctx *ctx)
666 ast_crtc_load_lut(crtc);
672 static void ast_crtc_destroy(struct drm_crtc *crtc)
674 drm_crtc_cleanup(crtc);
678 static const struct drm_crtc_funcs ast_crtc_funcs = {
679 .cursor_set = ast_cursor_set,
680 .cursor_move = ast_cursor_move,
681 .reset = ast_crtc_reset,
682 .set_config = drm_crtc_helper_set_config,
683 .gamma_set = ast_crtc_gamma_set,
684 .destroy = ast_crtc_destroy,
687 static int ast_crtc_init(struct drm_device *dev)
689 struct ast_crtc *crtc;
691 crtc = kzalloc(sizeof(struct ast_crtc), GFP_KERNEL);
695 drm_crtc_init(dev, &crtc->base, &ast_crtc_funcs);
696 drm_mode_crtc_set_gamma_size(&crtc->base, 256);
697 drm_crtc_helper_add(&crtc->base, &ast_crtc_helper_funcs);
701 static void ast_encoder_destroy(struct drm_encoder *encoder)
703 drm_encoder_cleanup(encoder);
708 static struct drm_encoder *ast_best_single_encoder(struct drm_connector *connector)
710 int enc_id = connector->encoder_ids[0];
711 /* pick the encoder ids */
713 return drm_encoder_find(connector->dev, NULL, enc_id);
718 static const struct drm_encoder_funcs ast_enc_funcs = {
719 .destroy = ast_encoder_destroy,
722 static void ast_encoder_dpms(struct drm_encoder *encoder, int mode)
727 static void ast_encoder_mode_set(struct drm_encoder *encoder,
728 struct drm_display_mode *mode,
729 struct drm_display_mode *adjusted_mode)
733 static void ast_encoder_prepare(struct drm_encoder *encoder)
738 static void ast_encoder_commit(struct drm_encoder *encoder)
744 static const struct drm_encoder_helper_funcs ast_enc_helper_funcs = {
745 .dpms = ast_encoder_dpms,
746 .prepare = ast_encoder_prepare,
747 .commit = ast_encoder_commit,
748 .mode_set = ast_encoder_mode_set,
751 static int ast_encoder_init(struct drm_device *dev)
753 struct ast_encoder *ast_encoder;
755 ast_encoder = kzalloc(sizeof(struct ast_encoder), GFP_KERNEL);
759 drm_encoder_init(dev, &ast_encoder->base, &ast_enc_funcs,
760 DRM_MODE_ENCODER_DAC, NULL);
761 drm_encoder_helper_add(&ast_encoder->base, &ast_enc_helper_funcs);
763 ast_encoder->base.possible_crtcs = 1;
767 static int ast_get_modes(struct drm_connector *connector)
769 struct ast_connector *ast_connector = to_ast_connector(connector);
770 struct ast_private *ast = connector->dev->dev_private;
774 if (ast->tx_chip_type == AST_TX_DP501) {
775 ast->dp501_maxclk = 0xff;
776 edid = kmalloc(128, GFP_KERNEL);
780 flags = ast_dp501_read_edid(connector->dev, (u8 *)edid);
782 ast->dp501_maxclk = ast_get_dp501_max_clk(connector->dev);
787 edid = drm_get_edid(connector, &ast_connector->i2c->adapter);
789 drm_connector_update_edid_property(&ast_connector->base, edid);
790 ret = drm_add_edid_modes(connector, edid);
794 drm_connector_update_edid_property(&ast_connector->base, NULL);
798 static enum drm_mode_status ast_mode_valid(struct drm_connector *connector,
799 struct drm_display_mode *mode)
801 struct ast_private *ast = connector->dev->dev_private;
802 int flags = MODE_NOMODE;
805 if (ast->support_wide_screen) {
806 if ((mode->hdisplay == 1680) && (mode->vdisplay == 1050))
808 if ((mode->hdisplay == 1280) && (mode->vdisplay == 800))
810 if ((mode->hdisplay == 1440) && (mode->vdisplay == 900))
812 if ((mode->hdisplay == 1360) && (mode->vdisplay == 768))
814 if ((mode->hdisplay == 1600) && (mode->vdisplay == 900))
817 if ((ast->chip == AST2100) || (ast->chip == AST2200) ||
818 (ast->chip == AST2300) || (ast->chip == AST2400) ||
819 (ast->chip == AST2500) || (ast->chip == AST1180)) {
820 if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080))
823 if ((mode->hdisplay == 1920) && (mode->vdisplay == 1200)) {
824 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
832 switch (mode->hdisplay) {
834 if (mode->vdisplay == 480) flags = MODE_OK;
837 if (mode->vdisplay == 600) flags = MODE_OK;
840 if (mode->vdisplay == 768) flags = MODE_OK;
843 if (mode->vdisplay == 1024) flags = MODE_OK;
846 if (mode->vdisplay == 1200) flags = MODE_OK;
855 static void ast_connector_destroy(struct drm_connector *connector)
857 struct ast_connector *ast_connector = to_ast_connector(connector);
858 ast_i2c_destroy(ast_connector->i2c);
859 drm_connector_unregister(connector);
860 drm_connector_cleanup(connector);
864 static const struct drm_connector_helper_funcs ast_connector_helper_funcs = {
865 .mode_valid = ast_mode_valid,
866 .get_modes = ast_get_modes,
867 .best_encoder = ast_best_single_encoder,
870 static const struct drm_connector_funcs ast_connector_funcs = {
871 .dpms = drm_helper_connector_dpms,
872 .fill_modes = drm_helper_probe_single_connector_modes,
873 .destroy = ast_connector_destroy,
876 static int ast_connector_init(struct drm_device *dev)
878 struct ast_connector *ast_connector;
879 struct drm_connector *connector;
880 struct drm_encoder *encoder;
882 ast_connector = kzalloc(sizeof(struct ast_connector), GFP_KERNEL);
886 connector = &ast_connector->base;
887 drm_connector_init(dev, connector, &ast_connector_funcs, DRM_MODE_CONNECTOR_VGA);
889 drm_connector_helper_add(connector, &ast_connector_helper_funcs);
891 connector->interlace_allowed = 0;
892 connector->doublescan_allowed = 0;
894 drm_connector_register(connector);
896 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
898 encoder = list_first_entry(&dev->mode_config.encoder_list, struct drm_encoder, head);
899 drm_connector_attach_encoder(connector, encoder);
901 ast_connector->i2c = ast_i2c_create(dev);
902 if (!ast_connector->i2c)
903 DRM_ERROR("failed to add ddc bus for connector\n");
908 /* allocate cursor cache and pin at start of VRAM */
909 static int ast_cursor_init(struct drm_device *dev)
911 struct ast_private *ast = dev->dev_private;
914 struct drm_gem_object *obj;
915 struct drm_gem_vram_object *gbo;
919 size = (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE) * AST_DEFAULT_HWC_NUM;
921 ret = ast_gem_create(dev, size, true, &obj);
924 gbo = drm_gem_vram_of_gem(obj);
925 ret = drm_gem_vram_pin(gbo, DRM_GEM_VRAM_PL_FLAG_VRAM);
928 gpu_addr = drm_gem_vram_offset(gbo);
930 drm_gem_vram_unpin(gbo);
935 /* kmap the object */
936 base = drm_gem_vram_kmap_at(gbo, true, NULL, &ast->cache_kmap);
942 ast->cursor_cache = obj;
943 ast->cursor_cache_gpu_addr = gpu_addr;
944 DRM_DEBUG_KMS("pinned cursor cache at %llx\n", ast->cursor_cache_gpu_addr);
950 static void ast_cursor_fini(struct drm_device *dev)
952 struct ast_private *ast = dev->dev_private;
953 struct drm_gem_vram_object *gbo =
954 drm_gem_vram_of_gem(ast->cursor_cache);
955 drm_gem_vram_kunmap_at(gbo, &ast->cache_kmap);
956 drm_gem_object_put_unlocked(ast->cursor_cache);
959 int ast_mode_init(struct drm_device *dev)
961 ast_cursor_init(dev);
963 ast_encoder_init(dev);
964 ast_connector_init(dev);
968 void ast_mode_fini(struct drm_device *dev)
970 ast_cursor_fini(dev);
973 static int get_clock(void *i2c_priv)
975 struct ast_i2c_chan *i2c = i2c_priv;
976 struct ast_private *ast = i2c->dev->dev_private;
977 uint32_t val, val2, count, pass;
981 val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01;
983 val2 = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01;
988 val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01;
990 } while ((pass < 5) && (count++ < 0x10000));
992 return val & 1 ? 1 : 0;
995 static int get_data(void *i2c_priv)
997 struct ast_i2c_chan *i2c = i2c_priv;
998 struct ast_private *ast = i2c->dev->dev_private;
999 uint32_t val, val2, count, pass;
1003 val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01;
1005 val2 = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01;
1010 val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01;
1012 } while ((pass < 5) && (count++ < 0x10000));
1014 return val & 1 ? 1 : 0;
1017 static void set_clock(void *i2c_priv, int clock)
1019 struct ast_i2c_chan *i2c = i2c_priv;
1020 struct ast_private *ast = i2c->dev->dev_private;
1024 for (i = 0; i < 0x10000; i++) {
1025 ujcrb7 = ((clock & 0x01) ? 0 : 1);
1026 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf4, ujcrb7);
1027 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x01);
1028 if (ujcrb7 == jtemp)
1033 static void set_data(void *i2c_priv, int data)
1035 struct ast_i2c_chan *i2c = i2c_priv;
1036 struct ast_private *ast = i2c->dev->dev_private;
1040 for (i = 0; i < 0x10000; i++) {
1041 ujcrb7 = ((data & 0x01) ? 0 : 1) << 2;
1042 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf1, ujcrb7);
1043 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x04);
1044 if (ujcrb7 == jtemp)
1049 static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev)
1051 struct ast_i2c_chan *i2c;
1054 i2c = kzalloc(sizeof(struct ast_i2c_chan), GFP_KERNEL);
1058 i2c->adapter.owner = THIS_MODULE;
1059 i2c->adapter.class = I2C_CLASS_DDC;
1060 i2c->adapter.dev.parent = &dev->pdev->dev;
1062 i2c_set_adapdata(&i2c->adapter, i2c);
1063 snprintf(i2c->adapter.name, sizeof(i2c->adapter.name),
1065 i2c->adapter.algo_data = &i2c->bit;
1067 i2c->bit.udelay = 20;
1068 i2c->bit.timeout = 2;
1069 i2c->bit.data = i2c;
1070 i2c->bit.setsda = set_data;
1071 i2c->bit.setscl = set_clock;
1072 i2c->bit.getsda = get_data;
1073 i2c->bit.getscl = get_clock;
1074 ret = i2c_bit_add_bus(&i2c->adapter);
1076 DRM_ERROR("Failed to register bit i2c\n");
1086 static void ast_i2c_destroy(struct ast_i2c_chan *i2c)
1090 i2c_del_adapter(&i2c->adapter);
1094 static void ast_show_cursor(struct drm_crtc *crtc)
1096 struct ast_private *ast = crtc->dev->dev_private;
1100 /* enable ARGB cursor */
1102 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, jreg);
1105 static void ast_hide_cursor(struct drm_crtc *crtc)
1107 struct ast_private *ast = crtc->dev->dev_private;
1108 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, 0x00);
1111 static u32 copy_cursor_image(u8 *src, u8 *dst, int width, int height)
1116 } srcdata32[2], data32;
1122 s32 alpha_dst_delta, last_alpha_dst_delta;
1123 u8 *srcxor, *dstxor;
1125 u32 per_pixel_copy, two_pixel_copy;
1127 alpha_dst_delta = AST_MAX_HWC_WIDTH << 1;
1128 last_alpha_dst_delta = alpha_dst_delta - (width << 1);
1131 dstxor = (u8 *)dst + last_alpha_dst_delta + (AST_MAX_HWC_HEIGHT - height) * alpha_dst_delta;
1132 per_pixel_copy = width & 1;
1133 two_pixel_copy = width >> 1;
1135 for (j = 0; j < height; j++) {
1136 for (i = 0; i < two_pixel_copy; i++) {
1137 srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
1138 srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0;
1139 data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
1140 data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
1141 data32.b[2] = srcdata32[1].b[1] | (srcdata32[1].b[0] >> 4);
1142 data32.b[3] = srcdata32[1].b[3] | (srcdata32[1].b[2] >> 4);
1144 writel(data32.ul, dstxor);
1152 for (i = 0; i < per_pixel_copy; i++) {
1153 srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
1154 data16.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
1155 data16.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
1156 writew(data16.us, dstxor);
1157 csum += (u32)data16.us;
1162 dstxor += last_alpha_dst_delta;
1167 static int ast_cursor_set(struct drm_crtc *crtc,
1168 struct drm_file *file_priv,
1173 struct ast_private *ast = crtc->dev->dev_private;
1174 struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
1175 struct drm_gem_object *obj;
1176 struct drm_gem_vram_object *gbo;
1180 struct ttm_bo_kmap_obj uobj_map;
1182 bool src_isiomem, dst_isiomem;
1184 ast_hide_cursor(crtc);
1188 if (width > AST_MAX_HWC_WIDTH || height > AST_MAX_HWC_HEIGHT)
1191 obj = drm_gem_object_lookup(file_priv, handle);
1193 DRM_ERROR("Cannot find cursor object %x for crtc\n", handle);
1196 gbo = drm_gem_vram_of_gem(obj);
1198 ret = drm_gem_vram_reserve(gbo, false);
1202 memset(&uobj_map, 0, sizeof(uobj_map));
1203 src = drm_gem_vram_kmap_at(gbo, true, &src_isiomem, &uobj_map);
1206 goto fail_unreserve;
1208 if (src_isiomem == true)
1209 DRM_ERROR("src cursor bo should be in main memory\n");
1211 dst = drm_gem_vram_kmap_at(drm_gem_vram_of_gem(ast->cursor_cache),
1212 false, &dst_isiomem, &ast->cache_kmap);
1215 goto fail_unreserve;
1217 if (dst_isiomem == false)
1218 DRM_ERROR("dst bo should be in VRAM\n");
1220 dst += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor;
1222 /* do data transfer to cursor cache */
1223 csum = copy_cursor_image(src, dst, width, height);
1225 drm_gem_vram_kunmap_at(gbo, &uobj_map);
1226 drm_gem_vram_unreserve(gbo);
1228 /* write checksum + signature */
1230 u8 *dst = drm_gem_vram_kmap_at(drm_gem_vram_of_gem(ast->cursor_cache),
1231 false, NULL, &ast->cache_kmap);
1232 dst += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor + AST_HWC_SIZE;
1234 writel(width, dst + AST_HWC_SIGNATURE_SizeX);
1235 writel(height, dst + AST_HWC_SIGNATURE_SizeY);
1236 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX);
1237 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY);
1239 /* set pattern offset */
1240 gpu_addr = ast->cursor_cache_gpu_addr;
1241 gpu_addr += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor;
1243 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, gpu_addr & 0xff);
1244 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, (gpu_addr >> 8) & 0xff);
1245 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, (gpu_addr >> 16) & 0xff);
1247 ast_crtc->cursor_width = width;
1248 ast_crtc->cursor_height = height;
1249 ast_crtc->offset_x = AST_MAX_HWC_WIDTH - width;
1250 ast_crtc->offset_y = AST_MAX_HWC_WIDTH - height;
1252 ast->next_cursor = (ast->next_cursor + 1) % AST_DEFAULT_HWC_NUM;
1254 ast_show_cursor(crtc);
1256 drm_gem_object_put_unlocked(obj);
1260 drm_gem_vram_unreserve(gbo);
1262 drm_gem_object_put_unlocked(obj);
1266 static int ast_cursor_move(struct drm_crtc *crtc,
1269 struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
1270 struct ast_private *ast = crtc->dev->dev_private;
1271 int x_offset, y_offset;
1274 sig = drm_gem_vram_kmap_at(drm_gem_vram_of_gem(ast->cursor_cache),
1275 false, NULL, &ast->cache_kmap);
1276 sig += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor + AST_HWC_SIZE;
1277 writel(x, sig + AST_HWC_SIGNATURE_X);
1278 writel(y, sig + AST_HWC_SIGNATURE_Y);
1280 x_offset = ast_crtc->offset_x;
1281 y_offset = ast_crtc->offset_y;
1283 x_offset = (-x) + ast_crtc->offset_x;
1288 y_offset = (-y) + ast_crtc->offset_y;
1291 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset);
1292 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset);
1293 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, (x & 0xff));
1294 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, ((x >> 8) & 0x0f));
1295 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, (y & 0xff));
1296 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, ((y >> 8) & 0x07));
1298 /* dummy write to fire HWC */
1299 ast_show_cursor(crtc);