2 * Copyright 2021 Advanced Micro Devices, Inc.
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23 #ifndef SMU_V13_0_7_PPSMC_H
24 #define SMU_V13_0_7_PPSMC_H
26 #define PPSMC_VERSION 0x1
28 // SMU Response Codes:
29 #define PPSMC_Result_OK 0x1
30 #define PPSMC_Result_Failed 0xFF
31 #define PPSMC_Result_UnknownCmd 0xFE
32 #define PPSMC_Result_CmdRejectedPrereq 0xFD
33 #define PPSMC_Result_CmdRejectedBusy 0xFC
35 // Message Definitions:
37 #define PPSMC_MSG_TestMessage 0x1
38 #define PPSMC_MSG_GetSmuVersion 0x2
39 #define PPSMC_MSG_GetDriverIfVersion 0x3
40 #define PPSMC_MSG_SetAllowedFeaturesMaskLow 0x4
41 #define PPSMC_MSG_SetAllowedFeaturesMaskHigh 0x5
42 #define PPSMC_MSG_EnableAllSmuFeatures 0x6
43 #define PPSMC_MSG_DisableAllSmuFeatures 0x7
44 #define PPSMC_MSG_EnableSmuFeaturesLow 0x8
45 #define PPSMC_MSG_EnableSmuFeaturesHigh 0x9
46 #define PPSMC_MSG_DisableSmuFeaturesLow 0xA
47 #define PPSMC_MSG_DisableSmuFeaturesHigh 0xB
48 #define PPSMC_MSG_GetRunningSmuFeaturesLow 0xC
49 #define PPSMC_MSG_GetRunningSmuFeaturesHigh 0xD
50 #define PPSMC_MSG_SetDriverDramAddrHigh 0xE
51 #define PPSMC_MSG_SetDriverDramAddrLow 0xF
52 #define PPSMC_MSG_SetToolsDramAddrHigh 0x10
53 #define PPSMC_MSG_SetToolsDramAddrLow 0x11
54 #define PPSMC_MSG_TransferTableSmu2Dram 0x12
55 #define PPSMC_MSG_TransferTableDram2Smu 0x13
56 #define PPSMC_MSG_UseDefaultPPTable 0x14
59 #define PPSMC_MSG_EnterBaco 0x15
60 #define PPSMC_MSG_ExitBaco 0x16
61 #define PPSMC_MSG_ArmD3 0x17
62 #define PPSMC_MSG_BacoAudioD3PME 0x18
65 #define PPSMC_MSG_SetSoftMinByFreq 0x19
66 #define PPSMC_MSG_SetSoftMaxByFreq 0x1A
67 #define PPSMC_MSG_SetHardMinByFreq 0x1B
68 #define PPSMC_MSG_SetHardMaxByFreq 0x1C
69 #define PPSMC_MSG_GetMinDpmFreq 0x1D
70 #define PPSMC_MSG_GetMaxDpmFreq 0x1E
71 #define PPSMC_MSG_GetDpmFreqByIndex 0x1F
72 #define PPSMC_MSG_OverridePcieParameters 0x20
74 //DramLog Set DramAddr
75 #define PPSMC_MSG_DramLogSetDramAddrHigh 0x21
76 #define PPSMC_MSG_DramLogSetDramAddrLow 0x22
77 #define PPSMC_MSG_DramLogSetDramSize 0x23
78 #define PPSMC_MSG_SetWorkloadMask 0x24
80 #define PPSMC_MSG_GetVoltageByDpm 0x25
81 #define PPSMC_MSG_SetVideoFps 0x26
82 #define PPSMC_MSG_GetDcModeMaxDpmFreq 0x27
85 #define PPSMC_MSG_AllowGfxOff 0x28
86 #define PPSMC_MSG_DisallowGfxOff 0x29
87 #define PPSMC_MSG_PowerUpVcn 0x2A
88 #define PPSMC_MSG_PowerDownVcn 0x2B
89 #define PPSMC_MSG_PowerUpJpeg 0x2C
90 #define PPSMC_MSG_PowerDownJpeg 0x2D
93 #define PPSMC_MSG_PrepareMp1ForUnload 0x2E
94 #define PPSMC_MSG_Mode1Reset 0x2F
96 //Set SystemVirtual DramAddrHigh
97 #define PPSMC_MSG_SetSystemVirtualDramAddrHigh 0x30
98 #define PPSMC_MSG_SetSystemVirtualDramAddrLow 0x31
100 #define PPSMC_MSG_SetPptLimit 0x32
101 #define PPSMC_MSG_GetPptLimit 0x33
102 #define PPSMC_MSG_ReenableAcDcInterrupt 0x34
103 #define PPSMC_MSG_NotifyPowerSource 0x35
106 #define PPSMC_MSG_RunDcBtc 0x36
111 #define PPSMC_MSG_SetTemperatureInputSelect 0x38
112 #define PPSMC_MSG_SetFwDstatesMask 0x39
113 #define PPSMC_MSG_SetThrottlerMask 0x3A
115 #define PPSMC_MSG_SetExternalClientDfCstateAllow 0x3B
117 #define PPSMC_MSG_SetMGpuFanBoostLimitRpm 0x3C
120 #define PPSMC_MSG_DumpSTBtoDram 0x3D
121 #define PPSMC_MSG_STBtoDramLogSetDramAddrHigh 0x3E
122 #define PPSMC_MSG_STBtoDramLogSetDramAddrLow 0x3F
123 #define PPSMC_MSG_STBtoDramLogSetDramSize 0x40
125 #define PPSMC_MSG_SetGpoAllow 0x41
126 #define PPSMC_MSG_AllowGfxDcs 0x42
127 #define PPSMC_MSG_DisallowGfxDcs 0x43
128 #define PPSMC_MSG_EnableAudioStutterWA 0x44
129 #define PPSMC_MSG_PowerUpUmsch 0x45
130 #define PPSMC_MSG_PowerDownUmsch 0x46
131 #define PPSMC_MSG_SetDcsArch 0x47
132 #define PPSMC_MSG_TriggerVFFLR 0x48
133 #define PPSMC_MSG_SetNumBadMemoryPagesRetired 0x49
134 #define PPSMC_MSG_SetBadMemoryPagesRetiredFlagsPerChannel 0x4A
135 #define PPSMC_MSG_SetPriorityDeltaGain 0x4B
136 #define PPSMC_MSG_AllowIHHostInterrupt 0x4C
137 #define PPSMC_MSG_EnableUCLKShadow 0x51
138 #define PPSMC_Message_Count 0x52