drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #include <linux/version.h>
  27 #include <drm/drm_atomic_helper.h>
  28 #include "dm_services.h"
  29 #include "amdgpu.h"
  30 #include "amdgpu_dm.h"
  31 #include "amdgpu_dm_mst_types.h"
  32
  33 #include "dc.h"
  34 #include "dm_helpers.h"
  35
  36 #include "dc_link_ddc.h"
  37
  38 #include "i2caux_interface.h"
  39
  40 /* #define TRACE_DPCD */
  41
  42 #ifdef TRACE_DPCD
  43 #define SIDE_BAND_MSG(address) (address >= DP_SIDEBAND_MSG_DOWN_REQ_BASE && address < DP_SINK_COUNT_ESI)
  44
  45 static inline char *side_band_msg_type_to_str(uint32_t address)
  46 {
  47         static char str[10] = {0};
  48
  49         if (address < DP_SIDEBAND_MSG_UP_REP_BASE)
  50                 strcpy(str, "DOWN_REQ");
  51         else if (address < DP_SIDEBAND_MSG_DOWN_REP_BASE)
  52                 strcpy(str, "UP_REP");
  53         else if (address < DP_SIDEBAND_MSG_UP_REQ_BASE)
  54                 strcpy(str, "DOWN_REP");
  55         else
  56                 strcpy(str, "UP_REQ");
  57
  58         return str;
  59 }
  60
  61 static void log_dpcd(uint8_t type,
  62                      uint32_t address,
  63                      uint8_t *data,
  64                      uint32_t size,
  65                      bool res)
  66 {
  67         DRM_DEBUG_KMS("Op: %s, addr: %04x, SideBand Msg: %s, Op res: %s\n",
  68                         (type == DP_AUX_NATIVE_READ) ||
  69                         (type == DP_AUX_I2C_READ) ?
  70                                         "Read" : "Write",
  71                         address,
  72                         SIDE_BAND_MSG(address) ?
  73                                         side_band_msg_type_to_str(address) : "Nop",
  74                         res ? "OK" : "Fail");
  75
  76         if (res) {
  77                 print_hex_dump(KERN_INFO, "Body: ", DUMP_PREFIX_NONE, 16, 1, data, size, false);
  78         }
  79 }
  80 #endif
  81
  82 static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux,
  83                                   struct drm_dp_aux_msg *msg)
  84 {
  85         ssize_t result = 0;
  86         struct aux_payload payload;
  87         enum aux_channel_operation_result operation_result;
  88
  89         if (WARN_ON(msg->size > 16))
  90                 return -E2BIG;
  91
  92         payload.address = msg->address;
  93         payload.data = msg->buffer;
  94         payload.length = msg->size;
  95         payload.reply = &msg->reply;
  96         payload.i2c_over_aux = (msg->request & DP_AUX_NATIVE_WRITE) == 0;
  97         payload.write = (msg->request & DP_AUX_I2C_READ) == 0;
  98         payload.mot = (msg->request & DP_AUX_I2C_MOT) != 0;
  99         payload.defer_delay = 0;
 100
 101         result = dc_link_aux_transfer_raw(TO_DM_AUX(aux)->ddc_service, &payload,
 102                                       &operation_result);
 103
 104         if (payload.write)
 105                 result = msg->size;
 106
 107         if (result < 0)
 108                 switch (operation_result) {
 109                 case AUX_CHANNEL_OPERATION_SUCCEEDED:
 110                         break;
 111                 case AUX_CHANNEL_OPERATION_FAILED_HPD_DISCON:
 112                 case AUX_CHANNEL_OPERATION_FAILED_REASON_UNKNOWN:
 113                         result = -EIO;
 114                         break;
 115                 case AUX_CHANNEL_OPERATION_FAILED_INVALID_REPLY:
 116                         result = -EBUSY;
 117                         break;
 118                 case AUX_CHANNEL_OPERATION_FAILED_TIMEOUT:
 119                         result = -ETIMEDOUT;
 120                         break;
 121                 }
 122
 123         return result;
 124 }
 125
 126 static enum drm_connector_status
 127 dm_dp_mst_detect(struct drm_connector *connector, bool force)
 128 {
 129         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 130         struct amdgpu_dm_connector *master = aconnector->mst_port;
 131
 132         enum drm_connector_status status =
 133                 drm_dp_mst_detect_port(
 134                         connector,
 135                         &master->mst_mgr,
 136                         aconnector->port);
 137
 138         return status;
 139 }
 140
 141 static void
 142 dm_dp_mst_connector_destroy(struct drm_connector *connector)
 143 {
 144         struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector);
 145         struct amdgpu_encoder *amdgpu_encoder = amdgpu_dm_connector->mst_encoder;
 146
 147         kfree(amdgpu_dm_connector->edid);
 148         amdgpu_dm_connector->edid = NULL;
 149
 150         drm_encoder_cleanup(&amdgpu_encoder->base);
 151         kfree(amdgpu_encoder);
 152         drm_connector_cleanup(connector);
 153         drm_dp_mst_put_port_malloc(amdgpu_dm_connector->port);
 154         kfree(amdgpu_dm_connector);
 155 }
 156
 157 static int
 158 amdgpu_dm_mst_connector_late_register(struct drm_connector *connector)
 159 {
 160         struct amdgpu_dm_connector *amdgpu_dm_connector =
 161                 to_amdgpu_dm_connector(connector);
 162         struct drm_dp_mst_port *port = amdgpu_dm_connector->port;
 163
 164         return drm_dp_mst_connector_late_register(connector, port);
 165 }
 166
 167 static void
 168 amdgpu_dm_mst_connector_early_unregister(struct drm_connector *connector)
 169 {
 170         struct amdgpu_dm_connector *amdgpu_dm_connector =
 171                 to_amdgpu_dm_connector(connector);
 172         struct drm_dp_mst_port *port = amdgpu_dm_connector->port;
 173
 174         drm_dp_mst_connector_early_unregister(connector, port);
 175 }
 176
 177 static const struct drm_connector_funcs dm_dp_mst_connector_funcs = {
 178         .detect = dm_dp_mst_detect,
 179         .fill_modes = drm_helper_probe_single_connector_modes,
 180         .destroy = dm_dp_mst_connector_destroy,
 181         .reset = amdgpu_dm_connector_funcs_reset,
 182         .atomic_duplicate_state = amdgpu_dm_connector_atomic_duplicate_state,
 183         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 184         .atomic_set_property = amdgpu_dm_connector_atomic_set_property,
 185         .atomic_get_property = amdgpu_dm_connector_atomic_get_property,
 186         .late_register = amdgpu_dm_mst_connector_late_register,
 187         .early_unregister = amdgpu_dm_mst_connector_early_unregister,
 188 };
 189
 190 static int dm_dp_mst_get_modes(struct drm_connector *connector)
 191 {
 192         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 193         int ret = 0;
 194
 195         if (!aconnector)
 196                 return drm_add_edid_modes(connector, NULL);
 197
 198         if (!aconnector->edid) {
 199                 struct edid *edid;
 200                 edid = drm_dp_mst_get_edid(connector, &aconnector->mst_port->mst_mgr, aconnector->port);
 201
 202                 if (!edid) {
 203                         drm_connector_update_edid_property(
 204                                 &aconnector->base,
 205                                 NULL);
 206                         return ret;
 207                 }
 208
 209                 aconnector->edid = edid;
 210         }
 211
 212         if (aconnector->dc_sink && aconnector->dc_sink->sink_signal == SIGNAL_TYPE_VIRTUAL) {
 213                 dc_sink_release(aconnector->dc_sink);
 214                 aconnector->dc_sink = NULL;
 215         }
 216
 217         if (!aconnector->dc_sink) {
 218                 struct dc_sink *dc_sink;
 219                 struct dc_sink_init_data init_params = {
 220                                 .link = aconnector->dc_link,
 221                                 .sink_signal = SIGNAL_TYPE_DISPLAY_PORT_MST };
 222                 dc_sink = dc_link_add_remote_sink(
 223                         aconnector->dc_link,
 224                         (uint8_t *)aconnector->edid,
 225                         (aconnector->edid->extensions + 1) * EDID_LENGTH,
 226                         &init_params);
 227
 228                 dc_sink->priv = aconnector;
 229                 /* dc_link_add_remote_sink returns a new reference */
 230                 aconnector->dc_sink = dc_sink;
 231
 232                 if (aconnector->dc_sink)
 233                         amdgpu_dm_update_freesync_caps(
 234                                         connector, aconnector->edid);
 235
 236         }
 237
 238         drm_connector_update_edid_property(
 239                                         &aconnector->base, aconnector->edid);
 240
 241         ret = drm_add_edid_modes(connector, aconnector->edid);
 242
 243         return ret;
 244 }
 245
 246 static struct drm_encoder *
 247 dm_mst_atomic_best_encoder(struct drm_connector *connector,
 248                            struct drm_connector_state *connector_state)
 249 {
 250         return &to_amdgpu_dm_connector(connector)->mst_encoder->base;
 251 }
 252
 253 static const struct drm_connector_helper_funcs dm_dp_mst_connector_helper_funcs = {
 254         .get_modes = dm_dp_mst_get_modes,
 255         .mode_valid = amdgpu_dm_connector_mode_valid,
 256         .atomic_best_encoder = dm_mst_atomic_best_encoder,
 257 };
 258
 259 static void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder)
 260 {
 261         drm_encoder_cleanup(encoder);
 262         kfree(encoder);
 263 }
 264
 265 static const struct drm_encoder_funcs amdgpu_dm_encoder_funcs = {
 266         .destroy = amdgpu_dm_encoder_destroy,
 267 };
 268
 269 static struct amdgpu_encoder *
 270 dm_dp_create_fake_mst_encoder(struct amdgpu_dm_connector *connector)
 271 {
 272         struct drm_device *dev = connector->base.dev;
 273         struct amdgpu_device *adev = dev->dev_private;
 274         struct amdgpu_encoder *amdgpu_encoder;
 275         struct drm_encoder *encoder;
 276
 277         amdgpu_encoder = kzalloc(sizeof(*amdgpu_encoder), GFP_KERNEL);
 278         if (!amdgpu_encoder)
 279                 return NULL;
 280
 281         encoder = &amdgpu_encoder->base;
 282         encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev);
 283
 284         drm_encoder_init(
 285                 dev,
 286                 &amdgpu_encoder->base,
 287                 &amdgpu_dm_encoder_funcs,
 288                 DRM_MODE_ENCODER_DPMST,
 289                 NULL);
 290
 291         drm_encoder_helper_add(encoder, &amdgpu_dm_encoder_helper_funcs);
 292
 293         return amdgpu_encoder;
 294 }
 295
 296 static struct drm_connector *
 297 dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 298                         struct drm_dp_mst_port *port,
 299                         const char *pathprop)
 300 {
 301         struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr);
 302         struct drm_device *dev = master->base.dev;
 303         struct amdgpu_device *adev = dev->dev_private;
 304         struct amdgpu_dm_connector *aconnector;
 305         struct drm_connector *connector;
 306
 307         aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL);
 308         if (!aconnector)
 309                 return NULL;
 310
 311         connector = &aconnector->base;
 312         aconnector->port = port;
 313         aconnector->mst_port = master;
 314
 315         if (drm_connector_init(
 316                 dev,
 317                 connector,
 318                 &dm_dp_mst_connector_funcs,
 319                 DRM_MODE_CONNECTOR_DisplayPort)) {
 320                 kfree(aconnector);
 321                 return NULL;
 322         }
 323         drm_connector_helper_add(connector, &dm_dp_mst_connector_helper_funcs);
 324
 325         amdgpu_dm_connector_init_helper(
 326                 &adev->dm,
 327                 aconnector,
 328                 DRM_MODE_CONNECTOR_DisplayPort,
 329                 master->dc_link,
 330                 master->connector_id);
 331
 332         aconnector->mst_encoder = dm_dp_create_fake_mst_encoder(master);
 333         drm_connector_attach_encoder(&aconnector->base,
 334                                      &aconnector->mst_encoder->base);
 335
 336         drm_object_attach_property(
 337                 &connector->base,
 338                 dev->mode_config.path_property,
 339                 0);
 340         drm_object_attach_property(
 341                 &connector->base,
 342                 dev->mode_config.tile_property,
 343                 0);
 344
 345         drm_connector_set_path_property(connector, pathprop);
 346
 347         /*
 348          * Initialize connector state before adding the connectror to drm and
 349          * framebuffer lists
 350          */
 351         amdgpu_dm_connector_funcs_reset(connector);
 352
 353         DRM_INFO("DM_MST: added connector: %p [id: %d] [master: %p]\n",
 354                  aconnector, connector->base.id, aconnector->mst_port);
 355
 356         drm_dp_mst_get_port_malloc(port);
 357
 358         DRM_DEBUG_KMS(":%d\n", connector->base.id);
 359
 360         return connector;
 361 }
 362
 363 static void dm_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 364                                         struct drm_connector *connector)
 365 {
 366         struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr);
 367         struct drm_device *dev = master->base.dev;
 368         struct amdgpu_device *adev = dev->dev_private;
 369         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 370
 371         DRM_INFO("DM_MST: Disabling connector: %p [id: %d] [master: %p]\n",
 372                  aconnector, connector->base.id, aconnector->mst_port);
 373
 374         if (aconnector->dc_sink) {
 375                 amdgpu_dm_update_freesync_caps(connector, NULL);
 376                 dc_link_remove_remote_sink(aconnector->dc_link,
 377                                            aconnector->dc_sink);
 378                 dc_sink_release(aconnector->dc_sink);
 379                 aconnector->dc_sink = NULL;
 380         }
 381
 382         drm_connector_unregister(connector);
 383         if (adev->mode_info.rfbdev)
 384                 drm_fb_helper_remove_one_connector(&adev->mode_info.rfbdev->helper, connector);
 385         drm_connector_put(connector);
 386 }
 387
 388 static void dm_dp_mst_register_connector(struct drm_connector *connector)
 389 {
 390         struct drm_device *dev = connector->dev;
 391         struct amdgpu_device *adev = dev->dev_private;
 392
 393         if (adev->mode_info.rfbdev)
 394                 drm_fb_helper_add_one_connector(&adev->mode_info.rfbdev->helper, connector);
 395         else
 396                 DRM_ERROR("adev->mode_info.rfbdev is NULL\n");
 397
 398         drm_connector_register(connector);
 399 }
 400
 401 static const struct drm_dp_mst_topology_cbs dm_mst_cbs = {
 402         .add_connector = dm_dp_add_mst_connector,
 403         .destroy_connector = dm_dp_destroy_mst_connector,
 404         .register_connector = dm_dp_mst_register_connector
 405 };
 406
 407 void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
 408                                        struct amdgpu_dm_connector *aconnector)
 409 {
 410         aconnector->dm_dp_aux.aux.name = "dmdc";
 411         aconnector->dm_dp_aux.aux.dev = aconnector->base.kdev;
 412         aconnector->dm_dp_aux.aux.transfer = dm_dp_aux_transfer;
 413         aconnector->dm_dp_aux.ddc_service = aconnector->dc_link->ddc;
 414
 415         drm_dp_aux_register(&aconnector->dm_dp_aux.aux);
 416         drm_dp_cec_register_connector(&aconnector->dm_dp_aux.aux,
 417                                       aconnector->base.name, dm->adev->dev);
 418
 419         if (aconnector->base.connector_type == DRM_MODE_CONNECTOR_eDP)
 420                 return;
 421
 422         aconnector->mst_mgr.cbs = &dm_mst_cbs;
 423         drm_dp_mst_topology_mgr_init(
 424                 &aconnector->mst_mgr,
 425                 dm->adev->ddev,
 426                 &aconnector->dm_dp_aux.aux,
 427                 16,
 428                 4,
 429                 aconnector->connector_id);
 430 }
 431