2 * Copyright 2016 Broadcom
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License, version 2, as
6 * published by the Free Software Foundation (the "GPL").
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License version 2 (GPLv2) for more details.
13 * You should have received a copy of the GNU General Public License
14 * version 2 (GPLv2) along with this source code.
17 #include <linux/err.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/errno.h>
21 #include <linux/kernel.h>
22 #include <linux/interrupt.h>
23 #include <linux/platform_device.h>
24 #include <linux/scatterlist.h>
25 #include <linux/crypto.h>
26 #include <linux/kthread.h>
27 #include <linux/rtnetlink.h>
28 #include <linux/sched.h>
29 #include <linux/of_address.h>
30 #include <linux/of_device.h>
32 #include <linux/bitops.h>
34 #include <crypto/algapi.h>
35 #include <crypto/aead.h>
36 #include <crypto/internal/aead.h>
37 #include <crypto/aes.h>
38 #include <crypto/des.h>
39 #include <crypto/hmac.h>
40 #include <crypto/sha.h>
41 #include <crypto/md5.h>
42 #include <crypto/authenc.h>
43 #include <crypto/skcipher.h>
44 #include <crypto/hash.h>
45 #include <crypto/sha3.h>
53 /* ================= Device Structure ================== */
55 struct device_private iproc_priv;
57 /* ==================== Parameters ===================== */
59 int flow_debug_logging;
60 module_param(flow_debug_logging, int, 0644);
61 MODULE_PARM_DESC(flow_debug_logging, "Enable Flow Debug Logging");
63 int packet_debug_logging;
64 module_param(packet_debug_logging, int, 0644);
65 MODULE_PARM_DESC(packet_debug_logging, "Enable Packet Debug Logging");
67 int debug_logging_sleep;
68 module_param(debug_logging_sleep, int, 0644);
69 MODULE_PARM_DESC(debug_logging_sleep, "Packet Debug Logging Sleep");
72 * The value of these module parameters is used to set the priority for each
73 * algo type when this driver registers algos with the kernel crypto API.
74 * To use a priority other than the default, set the priority in the insmod or
75 * modprobe. Changing the module priority after init time has no effect.
77 * The default priorities are chosen to be lower (less preferred) than ARMv8 CE
78 * algos, but more preferred than generic software algos.
80 static int cipher_pri = 150;
81 module_param(cipher_pri, int, 0644);
82 MODULE_PARM_DESC(cipher_pri, "Priority for cipher algos");
84 static int hash_pri = 100;
85 module_param(hash_pri, int, 0644);
86 MODULE_PARM_DESC(hash_pri, "Priority for hash algos");
88 static int aead_pri = 150;
89 module_param(aead_pri, int, 0644);
90 MODULE_PARM_DESC(aead_pri, "Priority for AEAD algos");
92 /* A type 3 BCM header, expected to precede the SPU header for SPU-M.
93 * Bits 3 and 4 in the first byte encode the channel number (the dma ringset).
99 char BCMHEADER[] = { 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28 };
101 * Some SPU hw does not use BCM header on SPU messages. So BCM_HDR_LEN
102 * is set dynamically after reading SPU type from device tree.
104 #define BCM_HDR_LEN iproc_priv.bcm_hdr_len
106 /* min and max time to sleep before retrying when mbox queue is full. usec */
107 #define MBOX_SLEEP_MIN 800
108 #define MBOX_SLEEP_MAX 1000
111 * select_channel() - Select a SPU channel to handle a crypto request. Selects
112 * channel in round robin order.
114 * Return: channel index
116 static u8 select_channel(void)
118 u8 chan_idx = atomic_inc_return(&iproc_priv.next_chan);
120 return chan_idx % iproc_priv.spu.num_chan;
124 * spu_ablkcipher_rx_sg_create() - Build up the scatterlist of buffers used to
125 * receive a SPU response message for an ablkcipher request. Includes buffers to
126 * catch SPU message headers and the response data.
127 * @mssg: mailbox message containing the receive sg
128 * @rctx: crypto request context
129 * @rx_frag_num: number of scatterlist elements required to hold the
130 * SPU response message
131 * @chunksize: Number of bytes of response data expected
132 * @stat_pad_len: Number of bytes required to pad the STAT field to
135 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
136 * when the request completes, whether the request is handled successfully or
144 spu_ablkcipher_rx_sg_create(struct brcm_message *mssg,
145 struct iproc_reqctx_s *rctx,
147 unsigned int chunksize, u32 stat_pad_len)
149 struct spu_hw *spu = &iproc_priv.spu;
150 struct scatterlist *sg; /* used to build sgs in mbox message */
151 struct iproc_ctx_s *ctx = rctx->ctx;
152 u32 datalen; /* Number of bytes of response data expected */
154 mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
160 sg_init_table(sg, rx_frag_num);
161 /* Space for SPU message header */
162 sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
164 /* If XTS tweak in payload, add buffer to receive encrypted tweak */
165 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
166 spu->spu_xts_tweak_in_payload())
167 sg_set_buf(sg++, rctx->msg_buf.c.supdt_tweak,
170 /* Copy in each dst sg entry from request, up to chunksize */
171 datalen = spu_msg_sg_add(&sg, &rctx->dst_sg, &rctx->dst_skip,
172 rctx->dst_nents, chunksize);
173 if (datalen < chunksize) {
174 pr_err("%s(): failed to copy dst sg to mbox msg. chunksize %u, datalen %u",
175 __func__, chunksize, datalen);
179 if (ctx->cipher.alg == CIPHER_ALG_RC4)
180 /* Add buffer to catch 260-byte SUPDT field for RC4 */
181 sg_set_buf(sg++, rctx->msg_buf.c.supdt_tweak, SPU_SUPDT_LEN);
184 sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
186 memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
187 sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
193 * spu_ablkcipher_tx_sg_create() - Build up the scatterlist of buffers used to
194 * send a SPU request message for an ablkcipher request. Includes SPU message
195 * headers and the request data.
196 * @mssg: mailbox message containing the transmit sg
197 * @rctx: crypto request context
198 * @tx_frag_num: number of scatterlist elements required to construct the
199 * SPU request message
200 * @chunksize: Number of bytes of request data
201 * @pad_len: Number of pad bytes
203 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
204 * when the request completes, whether the request is handled successfully or
212 spu_ablkcipher_tx_sg_create(struct brcm_message *mssg,
213 struct iproc_reqctx_s *rctx,
214 u8 tx_frag_num, unsigned int chunksize, u32 pad_len)
216 struct spu_hw *spu = &iproc_priv.spu;
217 struct scatterlist *sg; /* used to build sgs in mbox message */
218 struct iproc_ctx_s *ctx = rctx->ctx;
219 u32 datalen; /* Number of bytes of response data expected */
222 mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
224 if (unlikely(!mssg->spu.src))
228 sg_init_table(sg, tx_frag_num);
230 sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
231 BCM_HDR_LEN + ctx->spu_req_hdr_len);
233 /* if XTS tweak in payload, copy from IV (where crypto API puts it) */
234 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
235 spu->spu_xts_tweak_in_payload())
236 sg_set_buf(sg++, rctx->msg_buf.iv_ctr, SPU_XTS_TWEAK_SIZE);
238 /* Copy in each src sg entry from request, up to chunksize */
239 datalen = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
240 rctx->src_nents, chunksize);
241 if (unlikely(datalen < chunksize)) {
242 pr_err("%s(): failed to copy src sg to mbox msg",
248 sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
250 stat_len = spu->spu_tx_status_len();
252 memset(rctx->msg_buf.tx_stat, 0, stat_len);
253 sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
258 static int mailbox_send_message(struct brcm_message *mssg, u32 flags,
263 struct device *dev = &(iproc_priv.pdev->dev);
265 err = mbox_send_message(iproc_priv.mbox[chan_idx], mssg);
266 if (flags & CRYPTO_TFM_REQ_MAY_SLEEP) {
267 while ((err == -ENOBUFS) && (retry_cnt < SPU_MB_RETRY_MAX)) {
269 * Mailbox queue is full. Since MAY_SLEEP is set, assume
270 * not in atomic context and we can wait and try again.
273 usleep_range(MBOX_SLEEP_MIN, MBOX_SLEEP_MAX);
274 err = mbox_send_message(iproc_priv.mbox[chan_idx],
276 atomic_inc(&iproc_priv.mb_no_spc);
280 atomic_inc(&iproc_priv.mb_send_fail);
284 /* Check error returned by mailbox controller */
286 if (unlikely(err < 0)) {
287 dev_err(dev, "message error %d", err);
288 /* Signal txdone for mailbox channel */
291 /* Signal txdone for mailbox channel */
292 mbox_client_txdone(iproc_priv.mbox[chan_idx], err);
297 * handle_ablkcipher_req() - Submit as much of a block cipher request as fits in
298 * a single SPU request message, starting at the current position in the request
300 * @rctx: Crypto request context
302 * This may be called on the crypto API thread, or, when a request is so large
303 * it must be broken into multiple SPU messages, on the thread used to invoke
304 * the response callback. When requests are broken into multiple SPU
305 * messages, we assume subsequent messages depend on previous results, and
306 * thus always wait for previous results before submitting the next message.
307 * Because requests are submitted in lock step like this, there is no need
308 * to synchronize access to request data structures.
310 * Return: -EINPROGRESS: request has been accepted and result will be returned
312 * Any other value indicates an error
314 static int handle_ablkcipher_req(struct iproc_reqctx_s *rctx)
316 struct spu_hw *spu = &iproc_priv.spu;
317 struct crypto_async_request *areq = rctx->parent;
318 struct ablkcipher_request *req =
319 container_of(areq, struct ablkcipher_request, base);
320 struct iproc_ctx_s *ctx = rctx->ctx;
321 struct spu_cipher_parms cipher_parms;
323 unsigned int chunksize = 0; /* Num bytes of request to submit */
324 int remaining = 0; /* Bytes of request still to process */
325 int chunk_start; /* Beginning of data for current SPU msg */
327 /* IV or ctr value to use in this SPU msg */
328 u8 local_iv_ctr[MAX_IV_SIZE];
329 u32 stat_pad_len; /* num bytes to align status field */
330 u32 pad_len; /* total length of all padding */
331 bool update_key = false;
332 struct brcm_message *mssg; /* mailbox message */
334 /* number of entries in src and dst sg in mailbox message. */
335 u8 rx_frag_num = 2; /* response header and STATUS */
336 u8 tx_frag_num = 1; /* request header */
338 flow_log("%s\n", __func__);
340 cipher_parms.alg = ctx->cipher.alg;
341 cipher_parms.mode = ctx->cipher.mode;
342 cipher_parms.type = ctx->cipher_type;
343 cipher_parms.key_len = ctx->enckeylen;
344 cipher_parms.key_buf = ctx->enckey;
345 cipher_parms.iv_buf = local_iv_ctr;
346 cipher_parms.iv_len = rctx->iv_ctr_len;
348 mssg = &rctx->mb_mssg;
349 chunk_start = rctx->src_sent;
350 remaining = rctx->total_todo - chunk_start;
352 /* determine the chunk we are breaking off and update the indexes */
353 if ((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
354 (remaining > ctx->max_payload))
355 chunksize = ctx->max_payload;
357 chunksize = remaining;
359 rctx->src_sent += chunksize;
360 rctx->total_sent = rctx->src_sent;
362 /* Count number of sg entries to be included in this request */
363 rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip, chunksize);
364 rctx->dst_nents = spu_sg_count(rctx->dst_sg, rctx->dst_skip, chunksize);
366 if ((ctx->cipher.mode == CIPHER_MODE_CBC) &&
367 rctx->is_encrypt && chunk_start)
369 * Encrypting non-first first chunk. Copy last block of
370 * previous result to IV for this chunk.
372 sg_copy_part_to_buf(req->dst, rctx->msg_buf.iv_ctr,
374 chunk_start - rctx->iv_ctr_len);
376 if (rctx->iv_ctr_len) {
377 /* get our local copy of the iv */
378 __builtin_memcpy(local_iv_ctr, rctx->msg_buf.iv_ctr,
381 /* generate the next IV if possible */
382 if ((ctx->cipher.mode == CIPHER_MODE_CBC) &&
385 * CBC Decrypt: next IV is the last ciphertext block in
388 sg_copy_part_to_buf(req->src, rctx->msg_buf.iv_ctr,
390 rctx->src_sent - rctx->iv_ctr_len);
391 } else if (ctx->cipher.mode == CIPHER_MODE_CTR) {
393 * The SPU hardware increments the counter once for
394 * each AES block of 16 bytes. So update the counter
395 * for the next chunk, if there is one. Note that for
396 * this chunk, the counter has already been copied to
397 * local_iv_ctr. We can assume a block size of 16,
398 * because we only support CTR mode for AES, not for
399 * any other cipher alg.
401 add_to_ctr(rctx->msg_buf.iv_ctr, chunksize >> 4);
405 if (ctx->cipher.alg == CIPHER_ALG_RC4) {
409 * for non-first RC4 chunks, use SUPDT from previous
410 * response as key for this chunk.
412 cipher_parms.key_buf = rctx->msg_buf.c.supdt_tweak;
414 cipher_parms.type = CIPHER_TYPE_UPDT;
415 } else if (!rctx->is_encrypt) {
417 * First RC4 chunk. For decrypt, key in pre-built msg
418 * header may have been changed if encrypt required
419 * multiple chunks. So revert the key to the
423 cipher_parms.type = CIPHER_TYPE_INIT;
427 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
428 flow_log("max_payload infinite\n");
430 flow_log("max_payload %u\n", ctx->max_payload);
432 flow_log("sent:%u start:%u remains:%u size:%u\n",
433 rctx->src_sent, chunk_start, remaining, chunksize);
435 /* Copy SPU header template created at setkey time */
436 memcpy(rctx->msg_buf.bcm_spu_req_hdr, ctx->bcm_spu_req_hdr,
437 sizeof(rctx->msg_buf.bcm_spu_req_hdr));
440 * Pass SUPDT field as key. Key field in finish() call is only used
441 * when update_key has been set above for RC4. Will be ignored in
444 spu->spu_cipher_req_finish(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
445 ctx->spu_req_hdr_len, !(rctx->is_encrypt),
446 &cipher_parms, update_key, chunksize);
448 atomic64_add(chunksize, &iproc_priv.bytes_out);
450 stat_pad_len = spu->spu_wordalign_padlen(chunksize);
453 pad_len = stat_pad_len;
456 spu->spu_request_pad(rctx->msg_buf.spu_req_pad, 0,
457 0, ctx->auth.alg, ctx->auth.mode,
458 rctx->total_sent, stat_pad_len);
461 spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
462 ctx->spu_req_hdr_len);
463 packet_log("payload:\n");
464 dump_sg(rctx->src_sg, rctx->src_skip, chunksize);
465 packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
468 * Build mailbox message containing SPU request msg and rx buffers
469 * to catch response message
471 memset(mssg, 0, sizeof(*mssg));
472 mssg->type = BRCM_MESSAGE_SPU;
473 mssg->ctx = rctx; /* Will be returned in response */
475 /* Create rx scatterlist to catch result */
476 rx_frag_num += rctx->dst_nents;
478 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
479 spu->spu_xts_tweak_in_payload())
480 rx_frag_num++; /* extra sg to insert tweak */
482 err = spu_ablkcipher_rx_sg_create(mssg, rctx, rx_frag_num, chunksize,
487 /* Create tx scatterlist containing SPU request message */
488 tx_frag_num += rctx->src_nents;
489 if (spu->spu_tx_status_len())
492 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
493 spu->spu_xts_tweak_in_payload())
494 tx_frag_num++; /* extra sg to insert tweak */
496 err = spu_ablkcipher_tx_sg_create(mssg, rctx, tx_frag_num, chunksize,
501 err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx);
502 if (unlikely(err < 0))
509 * handle_ablkcipher_resp() - Process a block cipher SPU response. Updates the
510 * total received count for the request and updates global stats.
511 * @rctx: Crypto request context
513 static void handle_ablkcipher_resp(struct iproc_reqctx_s *rctx)
515 struct spu_hw *spu = &iproc_priv.spu;
517 struct crypto_async_request *areq = rctx->parent;
518 struct ablkcipher_request *req = ablkcipher_request_cast(areq);
520 struct iproc_ctx_s *ctx = rctx->ctx;
523 /* See how much data was returned */
524 payload_len = spu->spu_payload_length(rctx->msg_buf.spu_resp_hdr);
527 * In XTS mode, the first SPU_XTS_TWEAK_SIZE bytes may be the
528 * encrypted tweak ("i") value; we don't count those.
530 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
531 spu->spu_xts_tweak_in_payload() &&
532 (payload_len >= SPU_XTS_TWEAK_SIZE))
533 payload_len -= SPU_XTS_TWEAK_SIZE;
535 atomic64_add(payload_len, &iproc_priv.bytes_in);
537 flow_log("%s() offset: %u, bd_len: %u BD:\n",
538 __func__, rctx->total_received, payload_len);
540 dump_sg(req->dst, rctx->total_received, payload_len);
541 if (ctx->cipher.alg == CIPHER_ALG_RC4)
542 packet_dump(" supdt ", rctx->msg_buf.c.supdt_tweak,
545 rctx->total_received += payload_len;
546 if (rctx->total_received == rctx->total_todo) {
547 atomic_inc(&iproc_priv.op_counts[SPU_OP_CIPHER]);
549 &iproc_priv.cipher_cnt[ctx->cipher.alg][ctx->cipher.mode]);
554 * spu_ahash_rx_sg_create() - Build up the scatterlist of buffers used to
555 * receive a SPU response message for an ahash request.
556 * @mssg: mailbox message containing the receive sg
557 * @rctx: crypto request context
558 * @rx_frag_num: number of scatterlist elements required to hold the
559 * SPU response message
560 * @digestsize: length of hash digest, in bytes
561 * @stat_pad_len: Number of bytes required to pad the STAT field to
564 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
565 * when the request completes, whether the request is handled successfully or
573 spu_ahash_rx_sg_create(struct brcm_message *mssg,
574 struct iproc_reqctx_s *rctx,
575 u8 rx_frag_num, unsigned int digestsize,
578 struct spu_hw *spu = &iproc_priv.spu;
579 struct scatterlist *sg; /* used to build sgs in mbox message */
580 struct iproc_ctx_s *ctx = rctx->ctx;
582 mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
588 sg_init_table(sg, rx_frag_num);
589 /* Space for SPU message header */
590 sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
592 /* Space for digest */
593 sg_set_buf(sg++, rctx->msg_buf.digest, digestsize);
596 sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
598 memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
599 sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
604 * spu_ahash_tx_sg_create() - Build up the scatterlist of buffers used to send
605 * a SPU request message for an ahash request. Includes SPU message headers and
607 * @mssg: mailbox message containing the transmit sg
608 * @rctx: crypto request context
609 * @tx_frag_num: number of scatterlist elements required to construct the
610 * SPU request message
611 * @spu_hdr_len: length in bytes of SPU message header
612 * @hash_carry_len: Number of bytes of data carried over from previous req
613 * @new_data_len: Number of bytes of new request data
614 * @pad_len: Number of pad bytes
616 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
617 * when the request completes, whether the request is handled successfully or
625 spu_ahash_tx_sg_create(struct brcm_message *mssg,
626 struct iproc_reqctx_s *rctx,
629 unsigned int hash_carry_len,
630 unsigned int new_data_len, u32 pad_len)
632 struct spu_hw *spu = &iproc_priv.spu;
633 struct scatterlist *sg; /* used to build sgs in mbox message */
634 u32 datalen; /* Number of bytes of response data expected */
637 mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
643 sg_init_table(sg, tx_frag_num);
645 sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
646 BCM_HDR_LEN + spu_hdr_len);
649 sg_set_buf(sg++, rctx->hash_carry, hash_carry_len);
652 /* Copy in each src sg entry from request, up to chunksize */
653 datalen = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
654 rctx->src_nents, new_data_len);
655 if (datalen < new_data_len) {
656 pr_err("%s(): failed to copy src sg to mbox msg",
663 sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
665 stat_len = spu->spu_tx_status_len();
667 memset(rctx->msg_buf.tx_stat, 0, stat_len);
668 sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
675 * handle_ahash_req() - Process an asynchronous hash request from the crypto
677 * @rctx: Crypto request context
679 * Builds a SPU request message embedded in a mailbox message and submits the
680 * mailbox message on a selected mailbox channel. The SPU request message is
681 * constructed as a scatterlist, including entries from the crypto API's
682 * src scatterlist to avoid copying the data to be hashed. This function is
683 * called either on the thread from the crypto API, or, in the case that the
684 * crypto API request is too large to fit in a single SPU request message,
685 * on the thread that invokes the receive callback with a response message.
686 * Because some operations require the response from one chunk before the next
687 * chunk can be submitted, we always wait for the response for the previous
688 * chunk before submitting the next chunk. Because requests are submitted in
689 * lock step like this, there is no need to synchronize access to request data
693 * -EINPROGRESS: request has been submitted to SPU and response will be
694 * returned asynchronously
695 * -EAGAIN: non-final request included a small amount of data, which for
696 * efficiency we did not submit to the SPU, but instead stored
697 * to be submitted to the SPU with the next part of the request
698 * other: an error code
700 static int handle_ahash_req(struct iproc_reqctx_s *rctx)
702 struct spu_hw *spu = &iproc_priv.spu;
703 struct crypto_async_request *areq = rctx->parent;
704 struct ahash_request *req = ahash_request_cast(areq);
705 struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
706 struct crypto_tfm *tfm = crypto_ahash_tfm(ahash);
707 unsigned int blocksize = crypto_tfm_alg_blocksize(tfm);
708 struct iproc_ctx_s *ctx = rctx->ctx;
710 /* number of bytes still to be hashed in this req */
711 unsigned int nbytes_to_hash = 0;
713 unsigned int chunksize = 0; /* length of hash carry + new data */
715 * length of new data, not from hash carry, to be submitted in
718 unsigned int new_data_len;
720 unsigned int __maybe_unused chunk_start = 0;
721 u32 db_size; /* Length of data field, incl gcm and hash padding */
722 int pad_len = 0; /* total pad len, including gcm, hash, stat padding */
723 u32 data_pad_len = 0; /* length of GCM/CCM padding */
724 u32 stat_pad_len = 0; /* length of padding to align STATUS word */
725 struct brcm_message *mssg; /* mailbox message */
726 struct spu_request_opts req_opts;
727 struct spu_cipher_parms cipher_parms;
728 struct spu_hash_parms hash_parms;
729 struct spu_aead_parms aead_parms;
730 unsigned int local_nbuf;
732 unsigned int digestsize;
736 * number of entries in src and dst sg. Always includes SPU msg header.
737 * rx always includes a buffer to catch digest and STATUS.
742 flow_log("total_todo %u, total_sent %u\n",
743 rctx->total_todo, rctx->total_sent);
745 memset(&req_opts, 0, sizeof(req_opts));
746 memset(&cipher_parms, 0, sizeof(cipher_parms));
747 memset(&hash_parms, 0, sizeof(hash_parms));
748 memset(&aead_parms, 0, sizeof(aead_parms));
750 req_opts.bd_suppress = true;
751 hash_parms.alg = ctx->auth.alg;
752 hash_parms.mode = ctx->auth.mode;
753 hash_parms.type = HASH_TYPE_NONE;
754 hash_parms.key_buf = (u8 *)ctx->authkey;
755 hash_parms.key_len = ctx->authkeylen;
758 * For hash algorithms below assignment looks bit odd but
759 * it's needed for AES-XCBC and AES-CMAC hash algorithms
760 * to differentiate between 128, 192, 256 bit key values.
761 * Based on the key values, hash algorithm is selected.
762 * For example for 128 bit key, hash algorithm is AES-128.
764 cipher_parms.type = ctx->cipher_type;
766 mssg = &rctx->mb_mssg;
767 chunk_start = rctx->src_sent;
770 * Compute the amount remaining to hash. This may include data
771 * carried over from previous requests.
773 nbytes_to_hash = rctx->total_todo - rctx->total_sent;
774 chunksize = nbytes_to_hash;
775 if ((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
776 (chunksize > ctx->max_payload))
777 chunksize = ctx->max_payload;
780 * If this is not a final request and the request data is not a multiple
781 * of a full block, then simply park the extra data and prefix it to the
782 * data for the next request.
784 if (!rctx->is_final) {
785 u8 *dest = rctx->hash_carry + rctx->hash_carry_len;
786 u16 new_len; /* len of data to add to hash carry */
788 rem = chunksize % blocksize; /* remainder */
790 /* chunksize not a multiple of blocksize */
792 if (chunksize == 0) {
793 /* Don't have a full block to submit to hw */
794 new_len = rem - rctx->hash_carry_len;
795 sg_copy_part_to_buf(req->src, dest, new_len,
797 rctx->hash_carry_len = rem;
798 flow_log("Exiting with hash carry len: %u\n",
799 rctx->hash_carry_len);
800 packet_dump(" buf: ",
802 rctx->hash_carry_len);
808 /* if we have hash carry, then prefix it to the data in this request */
809 local_nbuf = rctx->hash_carry_len;
810 rctx->hash_carry_len = 0;
813 new_data_len = chunksize - local_nbuf;
815 /* Count number of sg entries to be used in this request */
816 rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip,
819 /* AES hashing keeps key size in type field, so need to copy it here */
820 if (hash_parms.alg == HASH_ALG_AES)
821 hash_parms.type = (enum hash_type)cipher_parms.type;
823 hash_parms.type = spu->spu_hash_type(rctx->total_sent);
825 digestsize = spu->spu_digest_size(ctx->digestsize, ctx->auth.alg,
827 hash_parms.digestsize = digestsize;
829 /* update the indexes */
830 rctx->total_sent += chunksize;
831 /* if you sent a prebuf then that wasn't from this req->src */
832 rctx->src_sent += new_data_len;
834 if ((rctx->total_sent == rctx->total_todo) && rctx->is_final)
835 hash_parms.pad_len = spu->spu_hash_pad_len(hash_parms.alg,
841 * If a non-first chunk, then include the digest returned from the
842 * previous chunk so that hw can add to it (except for AES types).
844 if ((hash_parms.type == HASH_TYPE_UPDT) &&
845 (hash_parms.alg != HASH_ALG_AES)) {
846 hash_parms.key_buf = rctx->incr_hash;
847 hash_parms.key_len = digestsize;
850 atomic64_add(chunksize, &iproc_priv.bytes_out);
852 flow_log("%s() final: %u nbuf: %u ",
853 __func__, rctx->is_final, local_nbuf);
855 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
856 flow_log("max_payload infinite\n");
858 flow_log("max_payload %u\n", ctx->max_payload);
860 flow_log("chunk_start: %u chunk_size: %u\n", chunk_start, chunksize);
862 /* Prepend SPU header with type 3 BCM header */
863 memcpy(rctx->msg_buf.bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
865 hash_parms.prebuf_len = local_nbuf;
866 spu_hdr_len = spu->spu_create_request(rctx->msg_buf.bcm_spu_req_hdr +
868 &req_opts, &cipher_parms,
869 &hash_parms, &aead_parms,
872 if (spu_hdr_len == 0) {
873 pr_err("Failed to create SPU request header\n");
878 * Determine total length of padding required. Put all padding in one
881 data_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode, chunksize);
882 db_size = spu_real_db_size(0, 0, local_nbuf, new_data_len,
883 0, 0, hash_parms.pad_len);
884 if (spu->spu_tx_status_len())
885 stat_pad_len = spu->spu_wordalign_padlen(db_size);
888 pad_len = hash_parms.pad_len + data_pad_len + stat_pad_len;
891 spu->spu_request_pad(rctx->msg_buf.spu_req_pad, data_pad_len,
892 hash_parms.pad_len, ctx->auth.alg,
893 ctx->auth.mode, rctx->total_sent,
897 spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
899 packet_dump(" prebuf: ", rctx->hash_carry, local_nbuf);
901 dump_sg(rctx->src_sg, rctx->src_skip, new_data_len);
902 packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
905 * Build mailbox message containing SPU request msg and rx buffers
906 * to catch response message
908 memset(mssg, 0, sizeof(*mssg));
909 mssg->type = BRCM_MESSAGE_SPU;
910 mssg->ctx = rctx; /* Will be returned in response */
912 /* Create rx scatterlist to catch result */
913 err = spu_ahash_rx_sg_create(mssg, rctx, rx_frag_num, digestsize,
918 /* Create tx scatterlist containing SPU request message */
919 tx_frag_num += rctx->src_nents;
920 if (spu->spu_tx_status_len())
922 err = spu_ahash_tx_sg_create(mssg, rctx, tx_frag_num, spu_hdr_len,
923 local_nbuf, new_data_len, pad_len);
927 err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx);
928 if (unlikely(err < 0))
935 * spu_hmac_outer_hash() - Request synchonous software compute of the outer hash
936 * for an HMAC request.
937 * @req: The HMAC request from the crypto API
938 * @ctx: The session context
940 * Return: 0 if synchronous hash operation successful
941 * -EINVAL if the hash algo is unrecognized
942 * any other value indicates an error
944 static int spu_hmac_outer_hash(struct ahash_request *req,
945 struct iproc_ctx_s *ctx)
947 struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
948 unsigned int blocksize =
949 crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
952 switch (ctx->auth.alg) {
954 rc = do_shash("md5", req->result, ctx->opad, blocksize,
955 req->result, ctx->digestsize, NULL, 0);
958 rc = do_shash("sha1", req->result, ctx->opad, blocksize,
959 req->result, ctx->digestsize, NULL, 0);
961 case HASH_ALG_SHA224:
962 rc = do_shash("sha224", req->result, ctx->opad, blocksize,
963 req->result, ctx->digestsize, NULL, 0);
965 case HASH_ALG_SHA256:
966 rc = do_shash("sha256", req->result, ctx->opad, blocksize,
967 req->result, ctx->digestsize, NULL, 0);
969 case HASH_ALG_SHA384:
970 rc = do_shash("sha384", req->result, ctx->opad, blocksize,
971 req->result, ctx->digestsize, NULL, 0);
973 case HASH_ALG_SHA512:
974 rc = do_shash("sha512", req->result, ctx->opad, blocksize,
975 req->result, ctx->digestsize, NULL, 0);
978 pr_err("%s() Error : unknown hmac type\n", __func__);
985 * ahash_req_done() - Process a hash result from the SPU hardware.
986 * @rctx: Crypto request context
988 * Return: 0 if successful
991 static int ahash_req_done(struct iproc_reqctx_s *rctx)
993 struct spu_hw *spu = &iproc_priv.spu;
994 struct crypto_async_request *areq = rctx->parent;
995 struct ahash_request *req = ahash_request_cast(areq);
996 struct iproc_ctx_s *ctx = rctx->ctx;
999 memcpy(req->result, rctx->msg_buf.digest, ctx->digestsize);
1001 if (spu->spu_type == SPU_TYPE_SPUM) {
1002 /* byte swap the output from the UPDT function to network byte
1005 if (ctx->auth.alg == HASH_ALG_MD5) {
1006 __swab32s((u32 *)req->result);
1007 __swab32s(((u32 *)req->result) + 1);
1008 __swab32s(((u32 *)req->result) + 2);
1009 __swab32s(((u32 *)req->result) + 3);
1010 __swab32s(((u32 *)req->result) + 4);
1014 flow_dump(" digest ", req->result, ctx->digestsize);
1016 /* if this an HMAC then do the outer hash */
1017 if (rctx->is_sw_hmac) {
1018 err = spu_hmac_outer_hash(req, ctx);
1021 flow_dump(" hmac: ", req->result, ctx->digestsize);
1024 if (rctx->is_sw_hmac || ctx->auth.mode == HASH_MODE_HMAC) {
1025 atomic_inc(&iproc_priv.op_counts[SPU_OP_HMAC]);
1026 atomic_inc(&iproc_priv.hmac_cnt[ctx->auth.alg]);
1028 atomic_inc(&iproc_priv.op_counts[SPU_OP_HASH]);
1029 atomic_inc(&iproc_priv.hash_cnt[ctx->auth.alg]);
1036 * handle_ahash_resp() - Process a SPU response message for a hash request.
1037 * Checks if the entire crypto API request has been processed, and if so,
1038 * invokes post processing on the result.
1039 * @rctx: Crypto request context
1041 static void handle_ahash_resp(struct iproc_reqctx_s *rctx)
1043 struct iproc_ctx_s *ctx = rctx->ctx;
1045 struct crypto_async_request *areq = rctx->parent;
1046 struct ahash_request *req = ahash_request_cast(areq);
1047 struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
1048 unsigned int blocksize =
1049 crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
1052 * Save hash to use as input to next op if incremental. Might be copying
1053 * too much, but that's easier than figuring out actual digest size here
1055 memcpy(rctx->incr_hash, rctx->msg_buf.digest, MAX_DIGEST_SIZE);
1057 flow_log("%s() blocksize:%u digestsize:%u\n",
1058 __func__, blocksize, ctx->digestsize);
1060 atomic64_add(ctx->digestsize, &iproc_priv.bytes_in);
1062 if (rctx->is_final && (rctx->total_sent == rctx->total_todo))
1063 ahash_req_done(rctx);
1067 * spu_aead_rx_sg_create() - Build up the scatterlist of buffers used to receive
1068 * a SPU response message for an AEAD request. Includes buffers to catch SPU
1069 * message headers and the response data.
1070 * @mssg: mailbox message containing the receive sg
1071 * @rctx: crypto request context
1072 * @rx_frag_num: number of scatterlist elements required to hold the
1073 * SPU response message
1074 * @assoc_len: Length of associated data included in the crypto request
1075 * @ret_iv_len: Length of IV returned in response
1076 * @resp_len: Number of bytes of response data expected to be written to
1077 * dst buffer from crypto API
1078 * @digestsize: Length of hash digest, in bytes
1079 * @stat_pad_len: Number of bytes required to pad the STAT field to
1082 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
1083 * when the request completes, whether the request is handled successfully or
1084 * there is an error.
1090 static int spu_aead_rx_sg_create(struct brcm_message *mssg,
1091 struct aead_request *req,
1092 struct iproc_reqctx_s *rctx,
1094 unsigned int assoc_len,
1095 u32 ret_iv_len, unsigned int resp_len,
1096 unsigned int digestsize, u32 stat_pad_len)
1098 struct spu_hw *spu = &iproc_priv.spu;
1099 struct scatterlist *sg; /* used to build sgs in mbox message */
1100 struct iproc_ctx_s *ctx = rctx->ctx;
1101 u32 datalen; /* Number of bytes of response data expected */
1105 if (ctx->is_rfc4543) {
1106 /* RFC4543: only pad after data, not after AAD */
1107 data_padlen = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1108 assoc_len + resp_len);
1109 assoc_buf_len = assoc_len;
1111 data_padlen = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1113 assoc_buf_len = spu->spu_assoc_resp_len(ctx->cipher.mode,
1114 assoc_len, ret_iv_len,
1118 if (ctx->cipher.mode == CIPHER_MODE_CCM)
1119 /* ICV (after data) must be in the next 32-bit word for CCM */
1120 data_padlen += spu->spu_wordalign_padlen(assoc_buf_len +
1125 /* have to catch gcm pad in separate buffer */
1128 mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
1134 sg_init_table(sg, rx_frag_num);
1136 /* Space for SPU message header */
1137 sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
1139 if (assoc_buf_len) {
1141 * Don't write directly to req->dst, because SPU may pad the
1142 * assoc data in the response
1144 memset(rctx->msg_buf.a.resp_aad, 0, assoc_buf_len);
1145 sg_set_buf(sg++, rctx->msg_buf.a.resp_aad, assoc_buf_len);
1150 * Copy in each dst sg entry from request, up to chunksize.
1151 * dst sg catches just the data. digest caught in separate buf.
1153 datalen = spu_msg_sg_add(&sg, &rctx->dst_sg, &rctx->dst_skip,
1154 rctx->dst_nents, resp_len);
1155 if (datalen < (resp_len)) {
1156 pr_err("%s(): failed to copy dst sg to mbox msg. expected len %u, datalen %u",
1157 __func__, resp_len, datalen);
1162 /* If GCM/CCM data is padded, catch padding in separate buffer */
1164 memset(rctx->msg_buf.a.gcmpad, 0, data_padlen);
1165 sg_set_buf(sg++, rctx->msg_buf.a.gcmpad, data_padlen);
1168 /* Always catch ICV in separate buffer */
1169 sg_set_buf(sg++, rctx->msg_buf.digest, digestsize);
1171 flow_log("stat_pad_len %u\n", stat_pad_len);
1173 memset(rctx->msg_buf.rx_stat_pad, 0, stat_pad_len);
1174 sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
1177 memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
1178 sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
1184 * spu_aead_tx_sg_create() - Build up the scatterlist of buffers used to send a
1185 * SPU request message for an AEAD request. Includes SPU message headers and the
1187 * @mssg: mailbox message containing the transmit sg
1188 * @rctx: crypto request context
1189 * @tx_frag_num: number of scatterlist elements required to construct the
1190 * SPU request message
1191 * @spu_hdr_len: length of SPU message header in bytes
1192 * @assoc: crypto API associated data scatterlist
1193 * @assoc_len: length of associated data
1194 * @assoc_nents: number of scatterlist entries containing assoc data
1195 * @aead_iv_len: length of AEAD IV, if included
1196 * @chunksize: Number of bytes of request data
1197 * @aad_pad_len: Number of bytes of padding at end of AAD. For GCM/CCM.
1198 * @pad_len: Number of pad bytes
1199 * @incl_icv: If true, write separate ICV buffer after data and
1202 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
1203 * when the request completes, whether the request is handled successfully or
1204 * there is an error.
1210 static int spu_aead_tx_sg_create(struct brcm_message *mssg,
1211 struct iproc_reqctx_s *rctx,
1214 struct scatterlist *assoc,
1215 unsigned int assoc_len,
1217 unsigned int aead_iv_len,
1218 unsigned int chunksize,
1219 u32 aad_pad_len, u32 pad_len, bool incl_icv)
1221 struct spu_hw *spu = &iproc_priv.spu;
1222 struct scatterlist *sg; /* used to build sgs in mbox message */
1223 struct scatterlist *assoc_sg = assoc;
1224 struct iproc_ctx_s *ctx = rctx->ctx;
1225 u32 datalen; /* Number of bytes of data to write */
1226 u32 written; /* Number of bytes of data written */
1227 u32 assoc_offset = 0;
1230 mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
1236 sg_init_table(sg, tx_frag_num);
1238 sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
1239 BCM_HDR_LEN + spu_hdr_len);
1242 /* Copy in each associated data sg entry from request */
1243 written = spu_msg_sg_add(&sg, &assoc_sg, &assoc_offset,
1244 assoc_nents, assoc_len);
1245 if (written < assoc_len) {
1246 pr_err("%s(): failed to copy assoc sg to mbox msg",
1253 sg_set_buf(sg++, rctx->msg_buf.iv_ctr, aead_iv_len);
1256 memset(rctx->msg_buf.a.req_aad_pad, 0, aad_pad_len);
1257 sg_set_buf(sg++, rctx->msg_buf.a.req_aad_pad, aad_pad_len);
1260 datalen = chunksize;
1261 if ((chunksize > ctx->digestsize) && incl_icv)
1262 datalen -= ctx->digestsize;
1264 /* For aead, a single msg should consume the entire src sg */
1265 written = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
1266 rctx->src_nents, datalen);
1267 if (written < datalen) {
1268 pr_err("%s(): failed to copy src sg to mbox msg",
1275 memset(rctx->msg_buf.spu_req_pad, 0, pad_len);
1276 sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
1280 sg_set_buf(sg++, rctx->msg_buf.digest, ctx->digestsize);
1282 stat_len = spu->spu_tx_status_len();
1284 memset(rctx->msg_buf.tx_stat, 0, stat_len);
1285 sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
1291 * handle_aead_req() - Submit a SPU request message for the next chunk of the
1292 * current AEAD request.
1293 * @rctx: Crypto request context
1295 * Unlike other operation types, we assume the length of the request fits in
1296 * a single SPU request message. aead_enqueue() makes sure this is true.
1297 * Comments for other op types regarding threads applies here as well.
1299 * Unlike incremental hash ops, where the spu returns the entire hash for
1300 * truncated algs like sha-224, the SPU returns just the truncated hash in
1301 * response to aead requests. So digestsize is always ctx->digestsize here.
1303 * Return: -EINPROGRESS: crypto request has been accepted and result will be
1304 * returned asynchronously
1305 * Any other value indicates an error
1307 static int handle_aead_req(struct iproc_reqctx_s *rctx)
1309 struct spu_hw *spu = &iproc_priv.spu;
1310 struct crypto_async_request *areq = rctx->parent;
1311 struct aead_request *req = container_of(areq,
1312 struct aead_request, base);
1313 struct iproc_ctx_s *ctx = rctx->ctx;
1315 unsigned int chunksize;
1316 unsigned int resp_len;
1321 struct brcm_message *mssg; /* mailbox message */
1322 struct spu_request_opts req_opts;
1323 struct spu_cipher_parms cipher_parms;
1324 struct spu_hash_parms hash_parms;
1325 struct spu_aead_parms aead_parms;
1326 int assoc_nents = 0;
1327 bool incl_icv = false;
1328 unsigned int digestsize = ctx->digestsize;
1330 /* number of entries in src and dst sg. Always includes SPU msg header.
1332 u8 rx_frag_num = 2; /* and STATUS */
1335 /* doing the whole thing at once */
1336 chunksize = rctx->total_todo;
1338 flow_log("%s: chunksize %u\n", __func__, chunksize);
1340 memset(&req_opts, 0, sizeof(req_opts));
1341 memset(&hash_parms, 0, sizeof(hash_parms));
1342 memset(&aead_parms, 0, sizeof(aead_parms));
1344 req_opts.is_inbound = !(rctx->is_encrypt);
1345 req_opts.auth_first = ctx->auth_first;
1346 req_opts.is_aead = true;
1347 req_opts.is_esp = ctx->is_esp;
1349 cipher_parms.alg = ctx->cipher.alg;
1350 cipher_parms.mode = ctx->cipher.mode;
1351 cipher_parms.type = ctx->cipher_type;
1352 cipher_parms.key_buf = ctx->enckey;
1353 cipher_parms.key_len = ctx->enckeylen;
1354 cipher_parms.iv_buf = rctx->msg_buf.iv_ctr;
1355 cipher_parms.iv_len = rctx->iv_ctr_len;
1357 hash_parms.alg = ctx->auth.alg;
1358 hash_parms.mode = ctx->auth.mode;
1359 hash_parms.type = HASH_TYPE_NONE;
1360 hash_parms.key_buf = (u8 *)ctx->authkey;
1361 hash_parms.key_len = ctx->authkeylen;
1362 hash_parms.digestsize = digestsize;
1364 if ((ctx->auth.alg == HASH_ALG_SHA224) &&
1365 (ctx->authkeylen < SHA224_DIGEST_SIZE))
1366 hash_parms.key_len = SHA224_DIGEST_SIZE;
1368 aead_parms.assoc_size = req->assoclen;
1369 if (ctx->is_esp && !ctx->is_rfc4543) {
1371 * 8-byte IV is included assoc data in request. SPU2
1372 * expects AAD to include just SPI and seqno. So
1373 * subtract off the IV len.
1375 aead_parms.assoc_size -= GCM_RFC4106_IV_SIZE;
1377 if (rctx->is_encrypt) {
1378 aead_parms.return_iv = true;
1379 aead_parms.ret_iv_len = GCM_RFC4106_IV_SIZE;
1380 aead_parms.ret_iv_off = GCM_ESP_SALT_SIZE;
1383 aead_parms.ret_iv_len = 0;
1387 * Count number of sg entries from the crypto API request that are to
1388 * be included in this mailbox message. For dst sg, don't count space
1389 * for digest. Digest gets caught in a separate buffer and copied back
1390 * to dst sg when processing response.
1392 rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip, chunksize);
1393 rctx->dst_nents = spu_sg_count(rctx->dst_sg, rctx->dst_skip, chunksize);
1394 if (aead_parms.assoc_size)
1395 assoc_nents = spu_sg_count(rctx->assoc, 0,
1396 aead_parms.assoc_size);
1398 mssg = &rctx->mb_mssg;
1400 rctx->total_sent = chunksize;
1401 rctx->src_sent = chunksize;
1402 if (spu->spu_assoc_resp_len(ctx->cipher.mode,
1403 aead_parms.assoc_size,
1404 aead_parms.ret_iv_len,
1408 aead_parms.iv_len = spu->spu_aead_ivlen(ctx->cipher.mode,
1411 if (ctx->auth.alg == HASH_ALG_AES)
1412 hash_parms.type = (enum hash_type)ctx->cipher_type;
1414 /* General case AAD padding (CCM and RFC4543 special cases below) */
1415 aead_parms.aad_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1416 aead_parms.assoc_size);
1418 /* General case data padding (CCM decrypt special case below) */
1419 aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1422 if (ctx->cipher.mode == CIPHER_MODE_CCM) {
1424 * for CCM, AAD len + 2 (rather than AAD len) needs to be
1427 aead_parms.aad_pad_len = spu->spu_gcm_ccm_pad_len(
1429 aead_parms.assoc_size + 2);
1432 * And when decrypting CCM, need to pad without including
1433 * size of ICV which is tacked on to end of chunk
1435 if (!rctx->is_encrypt)
1436 aead_parms.data_pad_len =
1437 spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1438 chunksize - digestsize);
1440 /* CCM also requires software to rewrite portions of IV: */
1441 spu->spu_ccm_update_iv(digestsize, &cipher_parms, req->assoclen,
1442 chunksize, rctx->is_encrypt,
1446 if (ctx->is_rfc4543) {
1448 * RFC4543: data is included in AAD, so don't pad after AAD
1449 * and pad data based on both AAD + data size
1451 aead_parms.aad_pad_len = 0;
1452 if (!rctx->is_encrypt)
1453 aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(
1455 aead_parms.assoc_size + chunksize -
1458 aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(
1460 aead_parms.assoc_size + chunksize);
1462 req_opts.is_rfc4543 = true;
1465 if (spu_req_incl_icv(ctx->cipher.mode, rctx->is_encrypt)) {
1468 /* Copy ICV from end of src scatterlist to digest buf */
1469 sg_copy_part_to_buf(req->src, rctx->msg_buf.digest, digestsize,
1470 req->assoclen + rctx->total_sent -
1474 atomic64_add(chunksize, &iproc_priv.bytes_out);
1476 flow_log("%s()-sent chunksize:%u\n", __func__, chunksize);
1478 /* Prepend SPU header with type 3 BCM header */
1479 memcpy(rctx->msg_buf.bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
1481 spu_hdr_len = spu->spu_create_request(rctx->msg_buf.bcm_spu_req_hdr +
1482 BCM_HDR_LEN, &req_opts,
1483 &cipher_parms, &hash_parms,
1484 &aead_parms, chunksize);
1486 /* Determine total length of padding. Put all padding in one buffer. */
1487 db_size = spu_real_db_size(aead_parms.assoc_size, aead_parms.iv_len, 0,
1488 chunksize, aead_parms.aad_pad_len,
1489 aead_parms.data_pad_len, 0);
1491 stat_pad_len = spu->spu_wordalign_padlen(db_size);
1495 pad_len = aead_parms.data_pad_len + stat_pad_len;
1498 spu->spu_request_pad(rctx->msg_buf.spu_req_pad,
1499 aead_parms.data_pad_len, 0,
1500 ctx->auth.alg, ctx->auth.mode,
1501 rctx->total_sent, stat_pad_len);
1504 spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
1506 dump_sg(rctx->assoc, 0, aead_parms.assoc_size);
1507 packet_dump(" aead iv: ", rctx->msg_buf.iv_ctr, aead_parms.iv_len);
1508 packet_log("BD:\n");
1509 dump_sg(rctx->src_sg, rctx->src_skip, chunksize);
1510 packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
1513 * Build mailbox message containing SPU request msg and rx buffers
1514 * to catch response message
1516 memset(mssg, 0, sizeof(*mssg));
1517 mssg->type = BRCM_MESSAGE_SPU;
1518 mssg->ctx = rctx; /* Will be returned in response */
1520 /* Create rx scatterlist to catch result */
1521 rx_frag_num += rctx->dst_nents;
1522 resp_len = chunksize;
1525 * Always catch ICV in separate buffer. Have to for GCM/CCM because of
1526 * padding. Have to for SHA-224 and other truncated SHAs because SPU
1527 * sends entire digest back.
1531 if (((ctx->cipher.mode == CIPHER_MODE_GCM) ||
1532 (ctx->cipher.mode == CIPHER_MODE_CCM)) && !rctx->is_encrypt) {
1534 * Input is ciphertxt plus ICV, but ICV not incl
1537 resp_len -= ctx->digestsize;
1539 /* no rx frags to catch output data */
1540 rx_frag_num -= rctx->dst_nents;
1543 err = spu_aead_rx_sg_create(mssg, req, rctx, rx_frag_num,
1544 aead_parms.assoc_size,
1545 aead_parms.ret_iv_len, resp_len, digestsize,
1550 /* Create tx scatterlist containing SPU request message */
1551 tx_frag_num += rctx->src_nents;
1552 tx_frag_num += assoc_nents;
1553 if (aead_parms.aad_pad_len)
1555 if (aead_parms.iv_len)
1557 if (spu->spu_tx_status_len())
1559 err = spu_aead_tx_sg_create(mssg, rctx, tx_frag_num, spu_hdr_len,
1560 rctx->assoc, aead_parms.assoc_size,
1561 assoc_nents, aead_parms.iv_len, chunksize,
1562 aead_parms.aad_pad_len, pad_len, incl_icv);
1566 err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx);
1567 if (unlikely(err < 0))
1570 return -EINPROGRESS;
1574 * handle_aead_resp() - Process a SPU response message for an AEAD request.
1575 * @rctx: Crypto request context
1577 static void handle_aead_resp(struct iproc_reqctx_s *rctx)
1579 struct spu_hw *spu = &iproc_priv.spu;
1580 struct crypto_async_request *areq = rctx->parent;
1581 struct aead_request *req = container_of(areq,
1582 struct aead_request, base);
1583 struct iproc_ctx_s *ctx = rctx->ctx;
1585 unsigned int icv_offset;
1588 /* See how much data was returned */
1589 payload_len = spu->spu_payload_length(rctx->msg_buf.spu_resp_hdr);
1590 flow_log("payload_len %u\n", payload_len);
1592 /* only count payload */
1593 atomic64_add(payload_len, &iproc_priv.bytes_in);
1596 packet_dump(" assoc_data ", rctx->msg_buf.a.resp_aad,
1600 * Copy the ICV back to the destination
1601 * buffer. In decrypt case, SPU gives us back the digest, but crypto
1602 * API doesn't expect ICV in dst buffer.
1604 result_len = req->cryptlen;
1605 if (rctx->is_encrypt) {
1606 icv_offset = req->assoclen + rctx->total_sent;
1607 packet_dump(" ICV: ", rctx->msg_buf.digest, ctx->digestsize);
1608 flow_log("copying ICV to dst sg at offset %u\n", icv_offset);
1609 sg_copy_part_from_buf(req->dst, rctx->msg_buf.digest,
1610 ctx->digestsize, icv_offset);
1611 result_len += ctx->digestsize;
1614 packet_log("response data: ");
1615 dump_sg(req->dst, req->assoclen, result_len);
1617 atomic_inc(&iproc_priv.op_counts[SPU_OP_AEAD]);
1618 if (ctx->cipher.alg == CIPHER_ALG_AES) {
1619 if (ctx->cipher.mode == CIPHER_MODE_CCM)
1620 atomic_inc(&iproc_priv.aead_cnt[AES_CCM]);
1621 else if (ctx->cipher.mode == CIPHER_MODE_GCM)
1622 atomic_inc(&iproc_priv.aead_cnt[AES_GCM]);
1624 atomic_inc(&iproc_priv.aead_cnt[AUTHENC]);
1626 atomic_inc(&iproc_priv.aead_cnt[AUTHENC]);
1631 * spu_chunk_cleanup() - Do cleanup after processing one chunk of a request
1632 * @rctx: request context
1634 * Mailbox scatterlists are allocated for each chunk. So free them after
1635 * processing each chunk.
1637 static void spu_chunk_cleanup(struct iproc_reqctx_s *rctx)
1639 /* mailbox message used to tx request */
1640 struct brcm_message *mssg = &rctx->mb_mssg;
1642 kfree(mssg->spu.src);
1643 kfree(mssg->spu.dst);
1644 memset(mssg, 0, sizeof(struct brcm_message));
1648 * finish_req() - Used to invoke the complete callback from the requester when
1649 * a request has been handled asynchronously.
1650 * @rctx: Request context
1651 * @err: Indicates whether the request was successful or not
1653 * Ensures that cleanup has been done for request
1655 static void finish_req(struct iproc_reqctx_s *rctx, int err)
1657 struct crypto_async_request *areq = rctx->parent;
1659 flow_log("%s() err:%d\n\n", __func__, err);
1661 /* No harm done if already called */
1662 spu_chunk_cleanup(rctx);
1665 areq->complete(areq, err);
1669 * spu_rx_callback() - Callback from mailbox framework with a SPU response.
1670 * @cl: mailbox client structure for SPU driver
1671 * @msg: mailbox message containing SPU response
1673 static void spu_rx_callback(struct mbox_client *cl, void *msg)
1675 struct spu_hw *spu = &iproc_priv.spu;
1676 struct brcm_message *mssg = msg;
1677 struct iproc_reqctx_s *rctx;
1681 if (unlikely(!rctx)) {
1683 pr_err("%s(): no request context", __func__);
1688 /* process the SPU status */
1689 err = spu->spu_status_process(rctx->msg_buf.rx_stat);
1691 if (err == SPU_INVALID_ICV)
1692 atomic_inc(&iproc_priv.bad_icv);
1697 /* Process the SPU response message */
1698 switch (rctx->ctx->alg->type) {
1699 case CRYPTO_ALG_TYPE_ABLKCIPHER:
1700 handle_ablkcipher_resp(rctx);
1702 case CRYPTO_ALG_TYPE_AHASH:
1703 handle_ahash_resp(rctx);
1705 case CRYPTO_ALG_TYPE_AEAD:
1706 handle_aead_resp(rctx);
1714 * If this response does not complete the request, then send the next
1717 if (rctx->total_sent < rctx->total_todo) {
1718 /* Deallocate anything specific to previous chunk */
1719 spu_chunk_cleanup(rctx);
1721 switch (rctx->ctx->alg->type) {
1722 case CRYPTO_ALG_TYPE_ABLKCIPHER:
1723 err = handle_ablkcipher_req(rctx);
1725 case CRYPTO_ALG_TYPE_AHASH:
1726 err = handle_ahash_req(rctx);
1729 * we saved data in hash carry, but tell crypto
1730 * API we successfully completed request.
1734 case CRYPTO_ALG_TYPE_AEAD:
1735 err = handle_aead_req(rctx);
1741 if (err == -EINPROGRESS)
1742 /* Successfully submitted request for next chunk */
1747 finish_req(rctx, err);
1750 /* ==================== Kernel Cryptographic API ==================== */
1753 * ablkcipher_enqueue() - Handle ablkcipher encrypt or decrypt request.
1754 * @req: Crypto API request
1755 * @encrypt: true if encrypting; false if decrypting
1757 * Return: -EINPROGRESS if request accepted and result will be returned
1761 static int ablkcipher_enqueue(struct ablkcipher_request *req, bool encrypt)
1763 struct iproc_reqctx_s *rctx = ablkcipher_request_ctx(req);
1764 struct iproc_ctx_s *ctx =
1765 crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req));
1768 flow_log("%s() enc:%u\n", __func__, encrypt);
1770 rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
1771 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
1772 rctx->parent = &req->base;
1773 rctx->is_encrypt = encrypt;
1774 rctx->bd_suppress = false;
1775 rctx->total_todo = req->nbytes;
1777 rctx->total_sent = 0;
1778 rctx->total_received = 0;
1781 /* Initialize current position in src and dst scatterlists */
1782 rctx->src_sg = req->src;
1783 rctx->src_nents = 0;
1785 rctx->dst_sg = req->dst;
1786 rctx->dst_nents = 0;
1789 if (ctx->cipher.mode == CIPHER_MODE_CBC ||
1790 ctx->cipher.mode == CIPHER_MODE_CTR ||
1791 ctx->cipher.mode == CIPHER_MODE_OFB ||
1792 ctx->cipher.mode == CIPHER_MODE_XTS ||
1793 ctx->cipher.mode == CIPHER_MODE_GCM ||
1794 ctx->cipher.mode == CIPHER_MODE_CCM) {
1796 crypto_ablkcipher_ivsize(crypto_ablkcipher_reqtfm(req));
1797 memcpy(rctx->msg_buf.iv_ctr, req->info, rctx->iv_ctr_len);
1799 rctx->iv_ctr_len = 0;
1802 /* Choose a SPU to process this request */
1803 rctx->chan_idx = select_channel();
1804 err = handle_ablkcipher_req(rctx);
1805 if (err != -EINPROGRESS)
1806 /* synchronous result */
1807 spu_chunk_cleanup(rctx);
1812 static int des_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
1813 unsigned int keylen)
1815 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
1816 u32 tmp[DES_EXPKEY_WORDS];
1818 if (keylen == DES_KEY_SIZE) {
1819 if (des_ekey(tmp, key) == 0) {
1820 if (crypto_ablkcipher_get_flags(cipher) &
1821 CRYPTO_TFM_REQ_FORBID_WEAK_KEYS) {
1822 u32 flags = CRYPTO_TFM_RES_WEAK_KEY;
1824 crypto_ablkcipher_set_flags(cipher, flags);
1829 ctx->cipher_type = CIPHER_TYPE_DES;
1831 crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
1837 static int threedes_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
1838 unsigned int keylen)
1840 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
1842 if (keylen == (DES_KEY_SIZE * 3)) {
1846 flags = crypto_ablkcipher_get_flags(cipher);
1847 ret = __des3_verify_key(&flags, key);
1848 if (unlikely(ret)) {
1849 crypto_ablkcipher_set_flags(cipher, flags);
1853 ctx->cipher_type = CIPHER_TYPE_3DES;
1855 crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
1861 static int aes_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
1862 unsigned int keylen)
1864 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
1866 if (ctx->cipher.mode == CIPHER_MODE_XTS)
1867 /* XTS includes two keys of equal length */
1868 keylen = keylen / 2;
1871 case AES_KEYSIZE_128:
1872 ctx->cipher_type = CIPHER_TYPE_AES128;
1874 case AES_KEYSIZE_192:
1875 ctx->cipher_type = CIPHER_TYPE_AES192;
1877 case AES_KEYSIZE_256:
1878 ctx->cipher_type = CIPHER_TYPE_AES256;
1881 crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
1884 WARN_ON((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
1885 ((ctx->max_payload % AES_BLOCK_SIZE) != 0));
1889 static int rc4_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
1890 unsigned int keylen)
1892 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
1895 ctx->enckeylen = ARC4_MAX_KEY_SIZE + ARC4_STATE_SIZE;
1897 ctx->enckey[0] = 0x00; /* 0x00 */
1898 ctx->enckey[1] = 0x00; /* i */
1899 ctx->enckey[2] = 0x00; /* 0x00 */
1900 ctx->enckey[3] = 0x00; /* j */
1901 for (i = 0; i < ARC4_MAX_KEY_SIZE; i++)
1902 ctx->enckey[i + ARC4_STATE_SIZE] = key[i % keylen];
1904 ctx->cipher_type = CIPHER_TYPE_INIT;
1909 static int ablkcipher_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
1910 unsigned int keylen)
1912 struct spu_hw *spu = &iproc_priv.spu;
1913 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
1914 struct spu_cipher_parms cipher_parms;
1918 flow_log("ablkcipher_setkey() keylen: %d\n", keylen);
1919 flow_dump(" key: ", key, keylen);
1921 switch (ctx->cipher.alg) {
1922 case CIPHER_ALG_DES:
1923 err = des_setkey(cipher, key, keylen);
1925 case CIPHER_ALG_3DES:
1926 err = threedes_setkey(cipher, key, keylen);
1928 case CIPHER_ALG_AES:
1929 err = aes_setkey(cipher, key, keylen);
1931 case CIPHER_ALG_RC4:
1932 err = rc4_setkey(cipher, key, keylen);
1935 pr_err("%s() Error: unknown cipher alg\n", __func__);
1941 /* RC4 already populated ctx->enkey */
1942 if (ctx->cipher.alg != CIPHER_ALG_RC4) {
1943 memcpy(ctx->enckey, key, keylen);
1944 ctx->enckeylen = keylen;
1946 /* SPU needs XTS keys in the reverse order the crypto API presents */
1947 if ((ctx->cipher.alg == CIPHER_ALG_AES) &&
1948 (ctx->cipher.mode == CIPHER_MODE_XTS)) {
1949 unsigned int xts_keylen = keylen / 2;
1951 memcpy(ctx->enckey, key + xts_keylen, xts_keylen);
1952 memcpy(ctx->enckey + xts_keylen, key, xts_keylen);
1955 if (spu->spu_type == SPU_TYPE_SPUM)
1956 alloc_len = BCM_HDR_LEN + SPU_HEADER_ALLOC_LEN;
1957 else if (spu->spu_type == SPU_TYPE_SPU2)
1958 alloc_len = BCM_HDR_LEN + SPU2_HEADER_ALLOC_LEN;
1959 memset(ctx->bcm_spu_req_hdr, 0, alloc_len);
1960 cipher_parms.iv_buf = NULL;
1961 cipher_parms.iv_len = crypto_ablkcipher_ivsize(cipher);
1962 flow_log("%s: iv_len %u\n", __func__, cipher_parms.iv_len);
1964 cipher_parms.alg = ctx->cipher.alg;
1965 cipher_parms.mode = ctx->cipher.mode;
1966 cipher_parms.type = ctx->cipher_type;
1967 cipher_parms.key_buf = ctx->enckey;
1968 cipher_parms.key_len = ctx->enckeylen;
1970 /* Prepend SPU request message with BCM header */
1971 memcpy(ctx->bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
1972 ctx->spu_req_hdr_len =
1973 spu->spu_cipher_req_init(ctx->bcm_spu_req_hdr + BCM_HDR_LEN,
1976 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
1980 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_CIPHER]);
1985 static int ablkcipher_encrypt(struct ablkcipher_request *req)
1987 flow_log("ablkcipher_encrypt() nbytes:%u\n", req->nbytes);
1989 return ablkcipher_enqueue(req, true);
1992 static int ablkcipher_decrypt(struct ablkcipher_request *req)
1994 flow_log("ablkcipher_decrypt() nbytes:%u\n", req->nbytes);
1995 return ablkcipher_enqueue(req, false);
1998 static int ahash_enqueue(struct ahash_request *req)
2000 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2001 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2002 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2004 const char *alg_name;
2006 flow_log("ahash_enqueue() nbytes:%u\n", req->nbytes);
2008 rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2009 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2010 rctx->parent = &req->base;
2012 rctx->bd_suppress = true;
2013 memset(&rctx->mb_mssg, 0, sizeof(struct brcm_message));
2015 /* Initialize position in src scatterlist */
2016 rctx->src_sg = req->src;
2018 rctx->src_nents = 0;
2019 rctx->dst_sg = NULL;
2021 rctx->dst_nents = 0;
2023 /* SPU2 hardware does not compute hash of zero length data */
2024 if ((rctx->is_final == 1) && (rctx->total_todo == 0) &&
2025 (iproc_priv.spu.spu_type == SPU_TYPE_SPU2)) {
2026 alg_name = crypto_tfm_alg_name(crypto_ahash_tfm(tfm));
2027 flow_log("Doing %sfinal %s zero-len hash request in software\n",
2028 rctx->is_final ? "" : "non-", alg_name);
2029 err = do_shash((unsigned char *)alg_name, req->result,
2030 NULL, 0, NULL, 0, ctx->authkey,
2033 flow_log("Hash request failed with error %d\n", err);
2036 /* Choose a SPU to process this request */
2037 rctx->chan_idx = select_channel();
2039 err = handle_ahash_req(rctx);
2040 if (err != -EINPROGRESS)
2041 /* synchronous result */
2042 spu_chunk_cleanup(rctx);
2046 * we saved data in hash carry, but tell crypto API
2047 * we successfully completed request.
2054 static int __ahash_init(struct ahash_request *req)
2056 struct spu_hw *spu = &iproc_priv.spu;
2057 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2058 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2059 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2061 flow_log("%s()\n", __func__);
2063 /* Initialize the context */
2064 rctx->hash_carry_len = 0;
2067 rctx->total_todo = 0;
2069 rctx->total_sent = 0;
2070 rctx->total_received = 0;
2072 ctx->digestsize = crypto_ahash_digestsize(tfm);
2073 /* If we add a hash whose digest is larger, catch it here. */
2074 WARN_ON(ctx->digestsize > MAX_DIGEST_SIZE);
2076 rctx->is_sw_hmac = false;
2078 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen, 0,
2085 * spu_no_incr_hash() - Determine whether incremental hashing is supported.
2086 * @ctx: Crypto session context
2088 * SPU-2 does not support incremental hashing (we'll have to revisit and
2089 * condition based on chip revision or device tree entry if future versions do
2090 * support incremental hash)
2092 * SPU-M also doesn't support incremental hashing of AES-XCBC
2094 * Return: true if incremental hashing is not supported
2097 bool spu_no_incr_hash(struct iproc_ctx_s *ctx)
2099 struct spu_hw *spu = &iproc_priv.spu;
2101 if (spu->spu_type == SPU_TYPE_SPU2)
2104 if ((ctx->auth.alg == HASH_ALG_AES) &&
2105 (ctx->auth.mode == HASH_MODE_XCBC))
2108 /* Otherwise, incremental hashing is supported */
2112 static int ahash_init(struct ahash_request *req)
2114 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2115 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2116 const char *alg_name;
2117 struct crypto_shash *hash;
2121 if (spu_no_incr_hash(ctx)) {
2123 * If we get an incremental hashing request and it's not
2124 * supported by the hardware, we need to handle it in software
2125 * by calling synchronous hash functions.
2127 alg_name = crypto_tfm_alg_name(crypto_ahash_tfm(tfm));
2128 hash = crypto_alloc_shash(alg_name, 0, 0);
2130 ret = PTR_ERR(hash);
2134 gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2135 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2136 ctx->shash = kmalloc(sizeof(*ctx->shash) +
2137 crypto_shash_descsize(hash), gfp);
2142 ctx->shash->tfm = hash;
2143 ctx->shash->flags = 0;
2145 /* Set the key using data we already have from setkey */
2146 if (ctx->authkeylen > 0) {
2147 ret = crypto_shash_setkey(hash, ctx->authkey,
2153 /* Initialize hash w/ this key and other params */
2154 ret = crypto_shash_init(ctx->shash);
2158 /* Otherwise call the internal function which uses SPU hw */
2159 ret = __ahash_init(req);
2167 crypto_free_shash(hash);
2172 static int __ahash_update(struct ahash_request *req)
2174 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2176 flow_log("ahash_update() nbytes:%u\n", req->nbytes);
2180 rctx->total_todo += req->nbytes;
2183 return ahash_enqueue(req);
2186 static int ahash_update(struct ahash_request *req)
2188 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2189 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2195 if (spu_no_incr_hash(ctx)) {
2197 * If we get an incremental hashing request and it's not
2198 * supported by the hardware, we need to handle it in software
2199 * by calling synchronous hash functions.
2202 nents = sg_nents(req->src);
2206 /* Copy data from req scatterlist to tmp buffer */
2207 gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2208 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2209 tmpbuf = kmalloc(req->nbytes, gfp);
2213 if (sg_copy_to_buffer(req->src, nents, tmpbuf, req->nbytes) !=
2219 /* Call synchronous update */
2220 ret = crypto_shash_update(ctx->shash, tmpbuf, req->nbytes);
2223 /* Otherwise call the internal function which uses SPU hw */
2224 ret = __ahash_update(req);
2230 static int __ahash_final(struct ahash_request *req)
2232 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2234 flow_log("ahash_final() nbytes:%u\n", req->nbytes);
2238 return ahash_enqueue(req);
2241 static int ahash_final(struct ahash_request *req)
2243 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2244 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2247 if (spu_no_incr_hash(ctx)) {
2249 * If we get an incremental hashing request and it's not
2250 * supported by the hardware, we need to handle it in software
2251 * by calling synchronous hash functions.
2253 ret = crypto_shash_final(ctx->shash, req->result);
2255 /* Done with hash, can deallocate it now */
2256 crypto_free_shash(ctx->shash->tfm);
2260 /* Otherwise call the internal function which uses SPU hw */
2261 ret = __ahash_final(req);
2267 static int __ahash_finup(struct ahash_request *req)
2269 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2271 flow_log("ahash_finup() nbytes:%u\n", req->nbytes);
2273 rctx->total_todo += req->nbytes;
2277 return ahash_enqueue(req);
2280 static int ahash_finup(struct ahash_request *req)
2282 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2283 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2289 if (spu_no_incr_hash(ctx)) {
2291 * If we get an incremental hashing request and it's not
2292 * supported by the hardware, we need to handle it in software
2293 * by calling synchronous hash functions.
2296 nents = sg_nents(req->src);
2299 goto ahash_finup_exit;
2302 /* Copy data from req scatterlist to tmp buffer */
2303 gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2304 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2305 tmpbuf = kmalloc(req->nbytes, gfp);
2308 goto ahash_finup_exit;
2311 if (sg_copy_to_buffer(req->src, nents, tmpbuf, req->nbytes) !=
2314 goto ahash_finup_free;
2317 /* Call synchronous update */
2318 ret = crypto_shash_finup(ctx->shash, tmpbuf, req->nbytes,
2321 /* Otherwise call the internal function which uses SPU hw */
2322 return __ahash_finup(req);
2328 /* Done with hash, can deallocate it now */
2329 crypto_free_shash(ctx->shash->tfm);
2334 static int ahash_digest(struct ahash_request *req)
2338 flow_log("ahash_digest() nbytes:%u\n", req->nbytes);
2340 /* whole thing at once */
2341 err = __ahash_init(req);
2343 err = __ahash_finup(req);
2348 static int ahash_setkey(struct crypto_ahash *ahash, const u8 *key,
2349 unsigned int keylen)
2351 struct iproc_ctx_s *ctx = crypto_ahash_ctx(ahash);
2353 flow_log("%s() ahash:%p key:%p keylen:%u\n",
2354 __func__, ahash, key, keylen);
2355 flow_dump(" key: ", key, keylen);
2357 if (ctx->auth.alg == HASH_ALG_AES) {
2359 case AES_KEYSIZE_128:
2360 ctx->cipher_type = CIPHER_TYPE_AES128;
2362 case AES_KEYSIZE_192:
2363 ctx->cipher_type = CIPHER_TYPE_AES192;
2365 case AES_KEYSIZE_256:
2366 ctx->cipher_type = CIPHER_TYPE_AES256;
2369 pr_err("%s() Error: Invalid key length\n", __func__);
2373 pr_err("%s() Error: unknown hash alg\n", __func__);
2376 memcpy(ctx->authkey, key, keylen);
2377 ctx->authkeylen = keylen;
2382 static int ahash_export(struct ahash_request *req, void *out)
2384 const struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2385 struct spu_hash_export_s *spu_exp = (struct spu_hash_export_s *)out;
2387 spu_exp->total_todo = rctx->total_todo;
2388 spu_exp->total_sent = rctx->total_sent;
2389 spu_exp->is_sw_hmac = rctx->is_sw_hmac;
2390 memcpy(spu_exp->hash_carry, rctx->hash_carry, sizeof(rctx->hash_carry));
2391 spu_exp->hash_carry_len = rctx->hash_carry_len;
2392 memcpy(spu_exp->incr_hash, rctx->incr_hash, sizeof(rctx->incr_hash));
2397 static int ahash_import(struct ahash_request *req, const void *in)
2399 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2400 struct spu_hash_export_s *spu_exp = (struct spu_hash_export_s *)in;
2402 rctx->total_todo = spu_exp->total_todo;
2403 rctx->total_sent = spu_exp->total_sent;
2404 rctx->is_sw_hmac = spu_exp->is_sw_hmac;
2405 memcpy(rctx->hash_carry, spu_exp->hash_carry, sizeof(rctx->hash_carry));
2406 rctx->hash_carry_len = spu_exp->hash_carry_len;
2407 memcpy(rctx->incr_hash, spu_exp->incr_hash, sizeof(rctx->incr_hash));
2412 static int ahash_hmac_setkey(struct crypto_ahash *ahash, const u8 *key,
2413 unsigned int keylen)
2415 struct iproc_ctx_s *ctx = crypto_ahash_ctx(ahash);
2416 unsigned int blocksize =
2417 crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
2418 unsigned int digestsize = crypto_ahash_digestsize(ahash);
2422 flow_log("%s() ahash:%p key:%p keylen:%u blksz:%u digestsz:%u\n",
2423 __func__, ahash, key, keylen, blocksize, digestsize);
2424 flow_dump(" key: ", key, keylen);
2426 if (keylen > blocksize) {
2427 switch (ctx->auth.alg) {
2429 rc = do_shash("md5", ctx->authkey, key, keylen, NULL,
2433 rc = do_shash("sha1", ctx->authkey, key, keylen, NULL,
2436 case HASH_ALG_SHA224:
2437 rc = do_shash("sha224", ctx->authkey, key, keylen, NULL,
2440 case HASH_ALG_SHA256:
2441 rc = do_shash("sha256", ctx->authkey, key, keylen, NULL,
2444 case HASH_ALG_SHA384:
2445 rc = do_shash("sha384", ctx->authkey, key, keylen, NULL,
2448 case HASH_ALG_SHA512:
2449 rc = do_shash("sha512", ctx->authkey, key, keylen, NULL,
2452 case HASH_ALG_SHA3_224:
2453 rc = do_shash("sha3-224", ctx->authkey, key, keylen,
2456 case HASH_ALG_SHA3_256:
2457 rc = do_shash("sha3-256", ctx->authkey, key, keylen,
2460 case HASH_ALG_SHA3_384:
2461 rc = do_shash("sha3-384", ctx->authkey, key, keylen,
2464 case HASH_ALG_SHA3_512:
2465 rc = do_shash("sha3-512", ctx->authkey, key, keylen,
2469 pr_err("%s() Error: unknown hash alg\n", __func__);
2473 pr_err("%s() Error %d computing shash for %s\n",
2474 __func__, rc, hash_alg_name[ctx->auth.alg]);
2477 ctx->authkeylen = digestsize;
2479 flow_log(" keylen > digestsize... hashed\n");
2480 flow_dump(" newkey: ", ctx->authkey, ctx->authkeylen);
2482 memcpy(ctx->authkey, key, keylen);
2483 ctx->authkeylen = keylen;
2487 * Full HMAC operation in SPUM is not verified,
2488 * So keeping the generation of IPAD, OPAD and
2489 * outer hashing in software.
2491 if (iproc_priv.spu.spu_type == SPU_TYPE_SPUM) {
2492 memcpy(ctx->ipad, ctx->authkey, ctx->authkeylen);
2493 memset(ctx->ipad + ctx->authkeylen, 0,
2494 blocksize - ctx->authkeylen);
2495 ctx->authkeylen = 0;
2496 memcpy(ctx->opad, ctx->ipad, blocksize);
2498 for (index = 0; index < blocksize; index++) {
2499 ctx->ipad[index] ^= HMAC_IPAD_VALUE;
2500 ctx->opad[index] ^= HMAC_OPAD_VALUE;
2503 flow_dump(" ipad: ", ctx->ipad, blocksize);
2504 flow_dump(" opad: ", ctx->opad, blocksize);
2506 ctx->digestsize = digestsize;
2507 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_HMAC]);
2512 static int ahash_hmac_init(struct ahash_request *req)
2514 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2515 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2516 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2517 unsigned int blocksize =
2518 crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
2520 flow_log("ahash_hmac_init()\n");
2522 /* init the context as a hash */
2525 if (!spu_no_incr_hash(ctx)) {
2526 /* SPU-M can do incr hashing but needs sw for outer HMAC */
2527 rctx->is_sw_hmac = true;
2528 ctx->auth.mode = HASH_MODE_HASH;
2529 /* start with a prepended ipad */
2530 memcpy(rctx->hash_carry, ctx->ipad, blocksize);
2531 rctx->hash_carry_len = blocksize;
2532 rctx->total_todo += blocksize;
2538 static int ahash_hmac_update(struct ahash_request *req)
2540 flow_log("ahash_hmac_update() nbytes:%u\n", req->nbytes);
2545 return ahash_update(req);
2548 static int ahash_hmac_final(struct ahash_request *req)
2550 flow_log("ahash_hmac_final() nbytes:%u\n", req->nbytes);
2552 return ahash_final(req);
2555 static int ahash_hmac_finup(struct ahash_request *req)
2557 flow_log("ahash_hmac_finupl() nbytes:%u\n", req->nbytes);
2559 return ahash_finup(req);
2562 static int ahash_hmac_digest(struct ahash_request *req)
2564 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2565 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2566 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2567 unsigned int blocksize =
2568 crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
2570 flow_log("ahash_hmac_digest() nbytes:%u\n", req->nbytes);
2572 /* Perform initialization and then call finup */
2575 if (iproc_priv.spu.spu_type == SPU_TYPE_SPU2) {
2577 * SPU2 supports full HMAC implementation in the
2578 * hardware, need not to generate IPAD, OPAD and
2579 * outer hash in software.
2580 * Only for hash key len > hash block size, SPU2
2581 * expects to perform hashing on the key, shorten
2582 * it to digest size and feed it as hash key.
2584 rctx->is_sw_hmac = false;
2585 ctx->auth.mode = HASH_MODE_HMAC;
2587 rctx->is_sw_hmac = true;
2588 ctx->auth.mode = HASH_MODE_HASH;
2589 /* start with a prepended ipad */
2590 memcpy(rctx->hash_carry, ctx->ipad, blocksize);
2591 rctx->hash_carry_len = blocksize;
2592 rctx->total_todo += blocksize;
2595 return __ahash_finup(req);
2600 static int aead_need_fallback(struct aead_request *req)
2602 struct iproc_reqctx_s *rctx = aead_request_ctx(req);
2603 struct spu_hw *spu = &iproc_priv.spu;
2604 struct crypto_aead *aead = crypto_aead_reqtfm(req);
2605 struct iproc_ctx_s *ctx = crypto_aead_ctx(aead);
2609 * SPU hardware cannot handle the AES-GCM/CCM case where plaintext
2610 * and AAD are both 0 bytes long. So use fallback in this case.
2612 if (((ctx->cipher.mode == CIPHER_MODE_GCM) ||
2613 (ctx->cipher.mode == CIPHER_MODE_CCM)) &&
2614 (req->assoclen == 0)) {
2615 if ((rctx->is_encrypt && (req->cryptlen == 0)) ||
2616 (!rctx->is_encrypt && (req->cryptlen == ctx->digestsize))) {
2617 flow_log("AES GCM/CCM needs fallback for 0 len req\n");
2622 /* SPU-M hardware only supports CCM digest size of 8, 12, or 16 bytes */
2623 if ((ctx->cipher.mode == CIPHER_MODE_CCM) &&
2624 (spu->spu_type == SPU_TYPE_SPUM) &&
2625 (ctx->digestsize != 8) && (ctx->digestsize != 12) &&
2626 (ctx->digestsize != 16)) {
2627 flow_log("%s() AES CCM needs fallback for digest size %d\n",
2628 __func__, ctx->digestsize);
2633 * SPU-M on NSP has an issue where AES-CCM hash is not correct
2634 * when AAD size is 0
2636 if ((ctx->cipher.mode == CIPHER_MODE_CCM) &&
2637 (spu->spu_subtype == SPU_SUBTYPE_SPUM_NSP) &&
2638 (req->assoclen == 0)) {
2639 flow_log("%s() AES_CCM needs fallback for 0 len AAD on NSP\n",
2644 payload_len = req->cryptlen;
2645 if (spu->spu_type == SPU_TYPE_SPUM)
2646 payload_len += req->assoclen;
2648 flow_log("%s() payload len: %u\n", __func__, payload_len);
2650 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
2653 return payload_len > ctx->max_payload;
2656 static void aead_complete(struct crypto_async_request *areq, int err)
2658 struct aead_request *req =
2659 container_of(areq, struct aead_request, base);
2660 struct iproc_reqctx_s *rctx = aead_request_ctx(req);
2661 struct crypto_aead *aead = crypto_aead_reqtfm(req);
2663 flow_log("%s() err:%d\n", __func__, err);
2665 areq->tfm = crypto_aead_tfm(aead);
2667 areq->complete = rctx->old_complete;
2668 areq->data = rctx->old_data;
2670 areq->complete(areq, err);
2673 static int aead_do_fallback(struct aead_request *req, bool is_encrypt)
2675 struct crypto_aead *aead = crypto_aead_reqtfm(req);
2676 struct crypto_tfm *tfm = crypto_aead_tfm(aead);
2677 struct iproc_reqctx_s *rctx = aead_request_ctx(req);
2678 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
2682 flow_log("%s() enc:%u\n", __func__, is_encrypt);
2684 if (ctx->fallback_cipher) {
2685 /* Store the cipher tfm and then use the fallback tfm */
2686 rctx->old_tfm = tfm;
2687 aead_request_set_tfm(req, ctx->fallback_cipher);
2689 * Save the callback and chain ourselves in, so we can restore
2692 rctx->old_complete = req->base.complete;
2693 rctx->old_data = req->base.data;
2694 req_flags = aead_request_flags(req);
2695 aead_request_set_callback(req, req_flags, aead_complete, req);
2696 err = is_encrypt ? crypto_aead_encrypt(req) :
2697 crypto_aead_decrypt(req);
2701 * fallback was synchronous (did not return
2702 * -EINPROGRESS). So restore request state here.
2704 aead_request_set_callback(req, req_flags,
2705 rctx->old_complete, req);
2706 req->base.data = rctx->old_data;
2707 aead_request_set_tfm(req, aead);
2708 flow_log("%s() fallback completed successfully\n\n",
2718 static int aead_enqueue(struct aead_request *req, bool is_encrypt)
2720 struct iproc_reqctx_s *rctx = aead_request_ctx(req);
2721 struct crypto_aead *aead = crypto_aead_reqtfm(req);
2722 struct iproc_ctx_s *ctx = crypto_aead_ctx(aead);
2725 flow_log("%s() enc:%u\n", __func__, is_encrypt);
2727 if (req->assoclen > MAX_ASSOC_SIZE) {
2729 ("%s() Error: associated data too long. (%u > %u bytes)\n",
2730 __func__, req->assoclen, MAX_ASSOC_SIZE);
2734 rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2735 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2736 rctx->parent = &req->base;
2737 rctx->is_encrypt = is_encrypt;
2738 rctx->bd_suppress = false;
2739 rctx->total_todo = req->cryptlen;
2741 rctx->total_sent = 0;
2742 rctx->total_received = 0;
2743 rctx->is_sw_hmac = false;
2745 memset(&rctx->mb_mssg, 0, sizeof(struct brcm_message));
2747 /* assoc data is at start of src sg */
2748 rctx->assoc = req->src;
2751 * Init current position in src scatterlist to be after assoc data.
2752 * src_skip set to buffer offset where data begins. (Assoc data could
2753 * end in the middle of a buffer.)
2755 if (spu_sg_at_offset(req->src, req->assoclen, &rctx->src_sg,
2756 &rctx->src_skip) < 0) {
2757 pr_err("%s() Error: Unable to find start of src data\n",
2762 rctx->src_nents = 0;
2763 rctx->dst_nents = 0;
2764 if (req->dst == req->src) {
2765 rctx->dst_sg = rctx->src_sg;
2766 rctx->dst_skip = rctx->src_skip;
2769 * Expect req->dst to have room for assoc data followed by
2770 * output data and ICV, if encrypt. So initialize dst_sg
2771 * to point beyond assoc len offset.
2773 if (spu_sg_at_offset(req->dst, req->assoclen, &rctx->dst_sg,
2774 &rctx->dst_skip) < 0) {
2775 pr_err("%s() Error: Unable to find start of dst data\n",
2781 if (ctx->cipher.mode == CIPHER_MODE_CBC ||
2782 ctx->cipher.mode == CIPHER_MODE_CTR ||
2783 ctx->cipher.mode == CIPHER_MODE_OFB ||
2784 ctx->cipher.mode == CIPHER_MODE_XTS ||
2785 ctx->cipher.mode == CIPHER_MODE_GCM) {
2788 crypto_aead_ivsize(crypto_aead_reqtfm(req));
2789 } else if (ctx->cipher.mode == CIPHER_MODE_CCM) {
2790 rctx->iv_ctr_len = CCM_AES_IV_SIZE;
2792 rctx->iv_ctr_len = 0;
2795 rctx->hash_carry_len = 0;
2797 flow_log(" src sg: %p\n", req->src);
2798 flow_log(" rctx->src_sg: %p, src_skip %u\n",
2799 rctx->src_sg, rctx->src_skip);
2800 flow_log(" assoc: %p, assoclen %u\n", rctx->assoc, req->assoclen);
2801 flow_log(" dst sg: %p\n", req->dst);
2802 flow_log(" rctx->dst_sg: %p, dst_skip %u\n",
2803 rctx->dst_sg, rctx->dst_skip);
2804 flow_log(" iv_ctr_len:%u\n", rctx->iv_ctr_len);
2805 flow_dump(" iv: ", req->iv, rctx->iv_ctr_len);
2806 flow_log(" authkeylen:%u\n", ctx->authkeylen);
2807 flow_log(" is_esp: %s\n", ctx->is_esp ? "yes" : "no");
2809 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
2810 flow_log(" max_payload infinite");
2812 flow_log(" max_payload: %u\n", ctx->max_payload);
2814 if (unlikely(aead_need_fallback(req)))
2815 return aead_do_fallback(req, is_encrypt);
2818 * Do memory allocations for request after fallback check, because if we
2819 * do fallback, we won't call finish_req() to dealloc.
2821 if (rctx->iv_ctr_len) {
2823 memcpy(rctx->msg_buf.iv_ctr + ctx->salt_offset,
2824 ctx->salt, ctx->salt_len);
2825 memcpy(rctx->msg_buf.iv_ctr + ctx->salt_offset + ctx->salt_len,
2827 rctx->iv_ctr_len - ctx->salt_len - ctx->salt_offset);
2830 rctx->chan_idx = select_channel();
2831 err = handle_aead_req(rctx);
2832 if (err != -EINPROGRESS)
2833 /* synchronous result */
2834 spu_chunk_cleanup(rctx);
2839 static int aead_authenc_setkey(struct crypto_aead *cipher,
2840 const u8 *key, unsigned int keylen)
2842 struct spu_hw *spu = &iproc_priv.spu;
2843 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
2844 struct crypto_tfm *tfm = crypto_aead_tfm(cipher);
2845 struct crypto_authenc_keys keys;
2848 flow_log("%s() aead:%p key:%p keylen:%u\n", __func__, cipher, key,
2850 flow_dump(" key: ", key, keylen);
2852 ret = crypto_authenc_extractkeys(&keys, key, keylen);
2856 if (keys.enckeylen > MAX_KEY_SIZE ||
2857 keys.authkeylen > MAX_KEY_SIZE)
2860 ctx->enckeylen = keys.enckeylen;
2861 ctx->authkeylen = keys.authkeylen;
2863 memcpy(ctx->enckey, keys.enckey, keys.enckeylen);
2864 /* May end up padding auth key. So make sure it's zeroed. */
2865 memset(ctx->authkey, 0, sizeof(ctx->authkey));
2866 memcpy(ctx->authkey, keys.authkey, keys.authkeylen);
2868 switch (ctx->alg->cipher_info.alg) {
2869 case CIPHER_ALG_DES:
2870 if (ctx->enckeylen == DES_KEY_SIZE) {
2871 u32 tmp[DES_EXPKEY_WORDS];
2872 u32 flags = CRYPTO_TFM_RES_WEAK_KEY;
2874 if (des_ekey(tmp, keys.enckey) == 0) {
2875 if (crypto_aead_get_flags(cipher) &
2876 CRYPTO_TFM_REQ_FORBID_WEAK_KEYS) {
2877 crypto_aead_set_flags(cipher, flags);
2882 ctx->cipher_type = CIPHER_TYPE_DES;
2887 case CIPHER_ALG_3DES:
2888 if (ctx->enckeylen == (DES_KEY_SIZE * 3)) {
2891 flags = crypto_aead_get_flags(cipher);
2892 ret = __des3_verify_key(&flags, keys.enckey);
2893 if (unlikely(ret)) {
2894 crypto_aead_set_flags(cipher, flags);
2898 ctx->cipher_type = CIPHER_TYPE_3DES;
2900 crypto_aead_set_flags(cipher,
2901 CRYPTO_TFM_RES_BAD_KEY_LEN);
2905 case CIPHER_ALG_AES:
2906 switch (ctx->enckeylen) {
2907 case AES_KEYSIZE_128:
2908 ctx->cipher_type = CIPHER_TYPE_AES128;
2910 case AES_KEYSIZE_192:
2911 ctx->cipher_type = CIPHER_TYPE_AES192;
2913 case AES_KEYSIZE_256:
2914 ctx->cipher_type = CIPHER_TYPE_AES256;
2920 case CIPHER_ALG_RC4:
2921 ctx->cipher_type = CIPHER_TYPE_INIT;
2924 pr_err("%s() Error: Unknown cipher alg\n", __func__);
2928 flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
2930 flow_dump(" enc: ", ctx->enckey, ctx->enckeylen);
2931 flow_dump(" auth: ", ctx->authkey, ctx->authkeylen);
2933 /* setkey the fallback just in case we needto use it */
2934 if (ctx->fallback_cipher) {
2935 flow_log(" running fallback setkey()\n");
2937 ctx->fallback_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
2938 ctx->fallback_cipher->base.crt_flags |=
2939 tfm->crt_flags & CRYPTO_TFM_REQ_MASK;
2940 ret = crypto_aead_setkey(ctx->fallback_cipher, key, keylen);
2942 flow_log(" fallback setkey() returned:%d\n", ret);
2943 tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
2945 (ctx->fallback_cipher->base.crt_flags &
2946 CRYPTO_TFM_RES_MASK);
2950 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
2954 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_AEAD]);
2960 ctx->authkeylen = 0;
2961 ctx->digestsize = 0;
2963 crypto_aead_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
2967 static int aead_gcm_ccm_setkey(struct crypto_aead *cipher,
2968 const u8 *key, unsigned int keylen)
2970 struct spu_hw *spu = &iproc_priv.spu;
2971 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
2972 struct crypto_tfm *tfm = crypto_aead_tfm(cipher);
2976 flow_log("%s() keylen:%u\n", __func__, keylen);
2977 flow_dump(" key: ", key, keylen);
2980 ctx->digestsize = keylen;
2982 ctx->enckeylen = keylen;
2983 ctx->authkeylen = 0;
2984 memcpy(ctx->enckey, key, ctx->enckeylen);
2986 switch (ctx->enckeylen) {
2987 case AES_KEYSIZE_128:
2988 ctx->cipher_type = CIPHER_TYPE_AES128;
2990 case AES_KEYSIZE_192:
2991 ctx->cipher_type = CIPHER_TYPE_AES192;
2993 case AES_KEYSIZE_256:
2994 ctx->cipher_type = CIPHER_TYPE_AES256;
3000 flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
3002 flow_dump(" enc: ", ctx->enckey, ctx->enckeylen);
3003 flow_dump(" auth: ", ctx->authkey, ctx->authkeylen);
3005 /* setkey the fallback just in case we need to use it */
3006 if (ctx->fallback_cipher) {
3007 flow_log(" running fallback setkey()\n");
3009 ctx->fallback_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
3010 ctx->fallback_cipher->base.crt_flags |=
3011 tfm->crt_flags & CRYPTO_TFM_REQ_MASK;
3012 ret = crypto_aead_setkey(ctx->fallback_cipher, key,
3013 keylen + ctx->salt_len);
3015 flow_log(" fallback setkey() returned:%d\n", ret);
3016 tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
3018 (ctx->fallback_cipher->base.crt_flags &
3019 CRYPTO_TFM_RES_MASK);
3023 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
3027 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_AEAD]);
3029 flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
3036 ctx->authkeylen = 0;
3037 ctx->digestsize = 0;
3039 crypto_aead_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
3044 * aead_gcm_esp_setkey() - setkey() operation for ESP variant of GCM AES.
3045 * @cipher: AEAD structure
3046 * @key: Key followed by 4 bytes of salt
3047 * @keylen: Length of key plus salt, in bytes
3049 * Extracts salt from key and stores it to be prepended to IV on each request.
3050 * Digest is always 16 bytes
3052 * Return: Value from generic gcm setkey.
3054 static int aead_gcm_esp_setkey(struct crypto_aead *cipher,
3055 const u8 *key, unsigned int keylen)
3057 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
3059 flow_log("%s\n", __func__);
3060 ctx->salt_len = GCM_ESP_SALT_SIZE;
3061 ctx->salt_offset = GCM_ESP_SALT_OFFSET;
3062 memcpy(ctx->salt, key + keylen - GCM_ESP_SALT_SIZE, GCM_ESP_SALT_SIZE);
3063 keylen -= GCM_ESP_SALT_SIZE;
3064 ctx->digestsize = GCM_ESP_DIGESTSIZE;
3066 flow_dump("salt: ", ctx->salt, GCM_ESP_SALT_SIZE);
3068 return aead_gcm_ccm_setkey(cipher, key, keylen);
3072 * rfc4543_gcm_esp_setkey() - setkey operation for RFC4543 variant of GCM/GMAC.
3073 * cipher: AEAD structure
3074 * key: Key followed by 4 bytes of salt
3075 * keylen: Length of key plus salt, in bytes
3077 * Extracts salt from key and stores it to be prepended to IV on each request.
3078 * Digest is always 16 bytes
3080 * Return: Value from generic gcm setkey.
3082 static int rfc4543_gcm_esp_setkey(struct crypto_aead *cipher,
3083 const u8 *key, unsigned int keylen)
3085 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
3087 flow_log("%s\n", __func__);
3088 ctx->salt_len = GCM_ESP_SALT_SIZE;
3089 ctx->salt_offset = GCM_ESP_SALT_OFFSET;
3090 memcpy(ctx->salt, key + keylen - GCM_ESP_SALT_SIZE, GCM_ESP_SALT_SIZE);
3091 keylen -= GCM_ESP_SALT_SIZE;
3092 ctx->digestsize = GCM_ESP_DIGESTSIZE;
3094 ctx->is_rfc4543 = true;
3095 flow_dump("salt: ", ctx->salt, GCM_ESP_SALT_SIZE);
3097 return aead_gcm_ccm_setkey(cipher, key, keylen);
3101 * aead_ccm_esp_setkey() - setkey() operation for ESP variant of CCM AES.
3102 * @cipher: AEAD structure
3103 * @key: Key followed by 4 bytes of salt
3104 * @keylen: Length of key plus salt, in bytes
3106 * Extracts salt from key and stores it to be prepended to IV on each request.
3107 * Digest is always 16 bytes
3109 * Return: Value from generic ccm setkey.
3111 static int aead_ccm_esp_setkey(struct crypto_aead *cipher,
3112 const u8 *key, unsigned int keylen)
3114 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
3116 flow_log("%s\n", __func__);
3117 ctx->salt_len = CCM_ESP_SALT_SIZE;
3118 ctx->salt_offset = CCM_ESP_SALT_OFFSET;
3119 memcpy(ctx->salt, key + keylen - CCM_ESP_SALT_SIZE, CCM_ESP_SALT_SIZE);
3120 keylen -= CCM_ESP_SALT_SIZE;
3122 flow_dump("salt: ", ctx->salt, CCM_ESP_SALT_SIZE);
3124 return aead_gcm_ccm_setkey(cipher, key, keylen);
3127 static int aead_setauthsize(struct crypto_aead *cipher, unsigned int authsize)
3129 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
3132 flow_log("%s() authkeylen:%u authsize:%u\n",
3133 __func__, ctx->authkeylen, authsize);
3135 ctx->digestsize = authsize;
3137 /* setkey the fallback just in case we needto use it */
3138 if (ctx->fallback_cipher) {
3139 flow_log(" running fallback setauth()\n");
3141 ret = crypto_aead_setauthsize(ctx->fallback_cipher, authsize);
3143 flow_log(" fallback setauth() returned:%d\n", ret);
3149 static int aead_encrypt(struct aead_request *req)
3151 flow_log("%s() cryptlen:%u %08x\n", __func__, req->cryptlen,
3153 dump_sg(req->src, 0, req->cryptlen + req->assoclen);
3154 flow_log(" assoc_len:%u\n", req->assoclen);
3156 return aead_enqueue(req, true);
3159 static int aead_decrypt(struct aead_request *req)
3161 flow_log("%s() cryptlen:%u\n", __func__, req->cryptlen);
3162 dump_sg(req->src, 0, req->cryptlen + req->assoclen);
3163 flow_log(" assoc_len:%u\n", req->assoclen);
3165 return aead_enqueue(req, false);
3168 /* ==================== Supported Cipher Algorithms ==================== */
3170 static struct iproc_alg_s driver_algs[] = {
3172 .type = CRYPTO_ALG_TYPE_AEAD,
3175 .cra_name = "gcm(aes)",
3176 .cra_driver_name = "gcm-aes-iproc",
3177 .cra_blocksize = AES_BLOCK_SIZE,
3178 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3180 .setkey = aead_gcm_ccm_setkey,
3181 .ivsize = GCM_AES_IV_SIZE,
3182 .maxauthsize = AES_BLOCK_SIZE,
3185 .alg = CIPHER_ALG_AES,
3186 .mode = CIPHER_MODE_GCM,
3189 .alg = HASH_ALG_AES,
3190 .mode = HASH_MODE_GCM,
3195 .type = CRYPTO_ALG_TYPE_AEAD,
3198 .cra_name = "ccm(aes)",
3199 .cra_driver_name = "ccm-aes-iproc",
3200 .cra_blocksize = AES_BLOCK_SIZE,
3201 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3203 .setkey = aead_gcm_ccm_setkey,
3204 .ivsize = CCM_AES_IV_SIZE,
3205 .maxauthsize = AES_BLOCK_SIZE,
3208 .alg = CIPHER_ALG_AES,
3209 .mode = CIPHER_MODE_CCM,
3212 .alg = HASH_ALG_AES,
3213 .mode = HASH_MODE_CCM,
3218 .type = CRYPTO_ALG_TYPE_AEAD,
3221 .cra_name = "rfc4106(gcm(aes))",
3222 .cra_driver_name = "gcm-aes-esp-iproc",
3223 .cra_blocksize = AES_BLOCK_SIZE,
3224 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3226 .setkey = aead_gcm_esp_setkey,
3227 .ivsize = GCM_RFC4106_IV_SIZE,
3228 .maxauthsize = AES_BLOCK_SIZE,
3231 .alg = CIPHER_ALG_AES,
3232 .mode = CIPHER_MODE_GCM,
3235 .alg = HASH_ALG_AES,
3236 .mode = HASH_MODE_GCM,
3241 .type = CRYPTO_ALG_TYPE_AEAD,
3244 .cra_name = "rfc4309(ccm(aes))",
3245 .cra_driver_name = "ccm-aes-esp-iproc",
3246 .cra_blocksize = AES_BLOCK_SIZE,
3247 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3249 .setkey = aead_ccm_esp_setkey,
3250 .ivsize = CCM_AES_IV_SIZE,
3251 .maxauthsize = AES_BLOCK_SIZE,
3254 .alg = CIPHER_ALG_AES,
3255 .mode = CIPHER_MODE_CCM,
3258 .alg = HASH_ALG_AES,
3259 .mode = HASH_MODE_CCM,
3264 .type = CRYPTO_ALG_TYPE_AEAD,
3267 .cra_name = "rfc4543(gcm(aes))",
3268 .cra_driver_name = "gmac-aes-esp-iproc",
3269 .cra_blocksize = AES_BLOCK_SIZE,
3270 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3272 .setkey = rfc4543_gcm_esp_setkey,
3273 .ivsize = GCM_RFC4106_IV_SIZE,
3274 .maxauthsize = AES_BLOCK_SIZE,
3277 .alg = CIPHER_ALG_AES,
3278 .mode = CIPHER_MODE_GCM,
3281 .alg = HASH_ALG_AES,
3282 .mode = HASH_MODE_GCM,
3287 .type = CRYPTO_ALG_TYPE_AEAD,
3290 .cra_name = "authenc(hmac(md5),cbc(aes))",
3291 .cra_driver_name = "authenc-hmac-md5-cbc-aes-iproc",
3292 .cra_blocksize = AES_BLOCK_SIZE,
3293 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3295 .setkey = aead_authenc_setkey,
3296 .ivsize = AES_BLOCK_SIZE,
3297 .maxauthsize = MD5_DIGEST_SIZE,
3300 .alg = CIPHER_ALG_AES,
3301 .mode = CIPHER_MODE_CBC,
3304 .alg = HASH_ALG_MD5,
3305 .mode = HASH_MODE_HMAC,
3310 .type = CRYPTO_ALG_TYPE_AEAD,
3313 .cra_name = "authenc(hmac(sha1),cbc(aes))",
3314 .cra_driver_name = "authenc-hmac-sha1-cbc-aes-iproc",
3315 .cra_blocksize = AES_BLOCK_SIZE,
3316 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3318 .setkey = aead_authenc_setkey,
3319 .ivsize = AES_BLOCK_SIZE,
3320 .maxauthsize = SHA1_DIGEST_SIZE,
3323 .alg = CIPHER_ALG_AES,
3324 .mode = CIPHER_MODE_CBC,
3327 .alg = HASH_ALG_SHA1,
3328 .mode = HASH_MODE_HMAC,
3333 .type = CRYPTO_ALG_TYPE_AEAD,
3336 .cra_name = "authenc(hmac(sha256),cbc(aes))",
3337 .cra_driver_name = "authenc-hmac-sha256-cbc-aes-iproc",
3338 .cra_blocksize = AES_BLOCK_SIZE,
3339 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3341 .setkey = aead_authenc_setkey,
3342 .ivsize = AES_BLOCK_SIZE,
3343 .maxauthsize = SHA256_DIGEST_SIZE,
3346 .alg = CIPHER_ALG_AES,
3347 .mode = CIPHER_MODE_CBC,
3350 .alg = HASH_ALG_SHA256,
3351 .mode = HASH_MODE_HMAC,
3356 .type = CRYPTO_ALG_TYPE_AEAD,
3359 .cra_name = "authenc(hmac(md5),cbc(des))",
3360 .cra_driver_name = "authenc-hmac-md5-cbc-des-iproc",
3361 .cra_blocksize = DES_BLOCK_SIZE,
3362 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3364 .setkey = aead_authenc_setkey,
3365 .ivsize = DES_BLOCK_SIZE,
3366 .maxauthsize = MD5_DIGEST_SIZE,
3369 .alg = CIPHER_ALG_DES,
3370 .mode = CIPHER_MODE_CBC,
3373 .alg = HASH_ALG_MD5,
3374 .mode = HASH_MODE_HMAC,
3379 .type = CRYPTO_ALG_TYPE_AEAD,
3382 .cra_name = "authenc(hmac(sha1),cbc(des))",
3383 .cra_driver_name = "authenc-hmac-sha1-cbc-des-iproc",
3384 .cra_blocksize = DES_BLOCK_SIZE,
3385 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3387 .setkey = aead_authenc_setkey,
3388 .ivsize = DES_BLOCK_SIZE,
3389 .maxauthsize = SHA1_DIGEST_SIZE,
3392 .alg = CIPHER_ALG_DES,
3393 .mode = CIPHER_MODE_CBC,
3396 .alg = HASH_ALG_SHA1,
3397 .mode = HASH_MODE_HMAC,
3402 .type = CRYPTO_ALG_TYPE_AEAD,
3405 .cra_name = "authenc(hmac(sha224),cbc(des))",
3406 .cra_driver_name = "authenc-hmac-sha224-cbc-des-iproc",
3407 .cra_blocksize = DES_BLOCK_SIZE,
3408 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3410 .setkey = aead_authenc_setkey,
3411 .ivsize = DES_BLOCK_SIZE,
3412 .maxauthsize = SHA224_DIGEST_SIZE,
3415 .alg = CIPHER_ALG_DES,
3416 .mode = CIPHER_MODE_CBC,
3419 .alg = HASH_ALG_SHA224,
3420 .mode = HASH_MODE_HMAC,
3425 .type = CRYPTO_ALG_TYPE_AEAD,
3428 .cra_name = "authenc(hmac(sha256),cbc(des))",
3429 .cra_driver_name = "authenc-hmac-sha256-cbc-des-iproc",
3430 .cra_blocksize = DES_BLOCK_SIZE,
3431 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3433 .setkey = aead_authenc_setkey,
3434 .ivsize = DES_BLOCK_SIZE,
3435 .maxauthsize = SHA256_DIGEST_SIZE,
3438 .alg = CIPHER_ALG_DES,
3439 .mode = CIPHER_MODE_CBC,
3442 .alg = HASH_ALG_SHA256,
3443 .mode = HASH_MODE_HMAC,
3448 .type = CRYPTO_ALG_TYPE_AEAD,
3451 .cra_name = "authenc(hmac(sha384),cbc(des))",
3452 .cra_driver_name = "authenc-hmac-sha384-cbc-des-iproc",
3453 .cra_blocksize = DES_BLOCK_SIZE,
3454 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3456 .setkey = aead_authenc_setkey,
3457 .ivsize = DES_BLOCK_SIZE,
3458 .maxauthsize = SHA384_DIGEST_SIZE,
3461 .alg = CIPHER_ALG_DES,
3462 .mode = CIPHER_MODE_CBC,
3465 .alg = HASH_ALG_SHA384,
3466 .mode = HASH_MODE_HMAC,
3471 .type = CRYPTO_ALG_TYPE_AEAD,
3474 .cra_name = "authenc(hmac(sha512),cbc(des))",
3475 .cra_driver_name = "authenc-hmac-sha512-cbc-des-iproc",
3476 .cra_blocksize = DES_BLOCK_SIZE,
3477 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3479 .setkey = aead_authenc_setkey,
3480 .ivsize = DES_BLOCK_SIZE,
3481 .maxauthsize = SHA512_DIGEST_SIZE,
3484 .alg = CIPHER_ALG_DES,
3485 .mode = CIPHER_MODE_CBC,
3488 .alg = HASH_ALG_SHA512,
3489 .mode = HASH_MODE_HMAC,
3494 .type = CRYPTO_ALG_TYPE_AEAD,
3497 .cra_name = "authenc(hmac(md5),cbc(des3_ede))",
3498 .cra_driver_name = "authenc-hmac-md5-cbc-des3-iproc",
3499 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3500 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3502 .setkey = aead_authenc_setkey,
3503 .ivsize = DES3_EDE_BLOCK_SIZE,
3504 .maxauthsize = MD5_DIGEST_SIZE,
3507 .alg = CIPHER_ALG_3DES,
3508 .mode = CIPHER_MODE_CBC,
3511 .alg = HASH_ALG_MD5,
3512 .mode = HASH_MODE_HMAC,
3517 .type = CRYPTO_ALG_TYPE_AEAD,
3520 .cra_name = "authenc(hmac(sha1),cbc(des3_ede))",
3521 .cra_driver_name = "authenc-hmac-sha1-cbc-des3-iproc",
3522 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3523 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3525 .setkey = aead_authenc_setkey,
3526 .ivsize = DES3_EDE_BLOCK_SIZE,
3527 .maxauthsize = SHA1_DIGEST_SIZE,
3530 .alg = CIPHER_ALG_3DES,
3531 .mode = CIPHER_MODE_CBC,
3534 .alg = HASH_ALG_SHA1,
3535 .mode = HASH_MODE_HMAC,
3540 .type = CRYPTO_ALG_TYPE_AEAD,
3543 .cra_name = "authenc(hmac(sha224),cbc(des3_ede))",
3544 .cra_driver_name = "authenc-hmac-sha224-cbc-des3-iproc",
3545 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3546 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3548 .setkey = aead_authenc_setkey,
3549 .ivsize = DES3_EDE_BLOCK_SIZE,
3550 .maxauthsize = SHA224_DIGEST_SIZE,
3553 .alg = CIPHER_ALG_3DES,
3554 .mode = CIPHER_MODE_CBC,
3557 .alg = HASH_ALG_SHA224,
3558 .mode = HASH_MODE_HMAC,
3563 .type = CRYPTO_ALG_TYPE_AEAD,
3566 .cra_name = "authenc(hmac(sha256),cbc(des3_ede))",
3567 .cra_driver_name = "authenc-hmac-sha256-cbc-des3-iproc",
3568 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3569 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3571 .setkey = aead_authenc_setkey,
3572 .ivsize = DES3_EDE_BLOCK_SIZE,
3573 .maxauthsize = SHA256_DIGEST_SIZE,
3576 .alg = CIPHER_ALG_3DES,
3577 .mode = CIPHER_MODE_CBC,
3580 .alg = HASH_ALG_SHA256,
3581 .mode = HASH_MODE_HMAC,
3586 .type = CRYPTO_ALG_TYPE_AEAD,
3589 .cra_name = "authenc(hmac(sha384),cbc(des3_ede))",
3590 .cra_driver_name = "authenc-hmac-sha384-cbc-des3-iproc",
3591 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3592 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3594 .setkey = aead_authenc_setkey,
3595 .ivsize = DES3_EDE_BLOCK_SIZE,
3596 .maxauthsize = SHA384_DIGEST_SIZE,
3599 .alg = CIPHER_ALG_3DES,
3600 .mode = CIPHER_MODE_CBC,
3603 .alg = HASH_ALG_SHA384,
3604 .mode = HASH_MODE_HMAC,
3609 .type = CRYPTO_ALG_TYPE_AEAD,
3612 .cra_name = "authenc(hmac(sha512),cbc(des3_ede))",
3613 .cra_driver_name = "authenc-hmac-sha512-cbc-des3-iproc",
3614 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3615 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3617 .setkey = aead_authenc_setkey,
3618 .ivsize = DES3_EDE_BLOCK_SIZE,
3619 .maxauthsize = SHA512_DIGEST_SIZE,
3622 .alg = CIPHER_ALG_3DES,
3623 .mode = CIPHER_MODE_CBC,
3626 .alg = HASH_ALG_SHA512,
3627 .mode = HASH_MODE_HMAC,
3632 /* ABLKCIPHER algorithms. */
3634 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3636 .cra_name = "ecb(arc4)",
3637 .cra_driver_name = "ecb-arc4-iproc",
3638 .cra_blocksize = ARC4_BLOCK_SIZE,
3640 .min_keysize = ARC4_MIN_KEY_SIZE,
3641 .max_keysize = ARC4_MAX_KEY_SIZE,
3646 .alg = CIPHER_ALG_RC4,
3647 .mode = CIPHER_MODE_NONE,
3650 .alg = HASH_ALG_NONE,
3651 .mode = HASH_MODE_NONE,
3655 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3657 .cra_name = "ofb(des)",
3658 .cra_driver_name = "ofb-des-iproc",
3659 .cra_blocksize = DES_BLOCK_SIZE,
3661 .min_keysize = DES_KEY_SIZE,
3662 .max_keysize = DES_KEY_SIZE,
3663 .ivsize = DES_BLOCK_SIZE,
3667 .alg = CIPHER_ALG_DES,
3668 .mode = CIPHER_MODE_OFB,
3671 .alg = HASH_ALG_NONE,
3672 .mode = HASH_MODE_NONE,
3676 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3678 .cra_name = "cbc(des)",
3679 .cra_driver_name = "cbc-des-iproc",
3680 .cra_blocksize = DES_BLOCK_SIZE,
3682 .min_keysize = DES_KEY_SIZE,
3683 .max_keysize = DES_KEY_SIZE,
3684 .ivsize = DES_BLOCK_SIZE,
3688 .alg = CIPHER_ALG_DES,
3689 .mode = CIPHER_MODE_CBC,
3692 .alg = HASH_ALG_NONE,
3693 .mode = HASH_MODE_NONE,
3697 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3699 .cra_name = "ecb(des)",
3700 .cra_driver_name = "ecb-des-iproc",
3701 .cra_blocksize = DES_BLOCK_SIZE,
3703 .min_keysize = DES_KEY_SIZE,
3704 .max_keysize = DES_KEY_SIZE,
3709 .alg = CIPHER_ALG_DES,
3710 .mode = CIPHER_MODE_ECB,
3713 .alg = HASH_ALG_NONE,
3714 .mode = HASH_MODE_NONE,
3718 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3720 .cra_name = "ofb(des3_ede)",
3721 .cra_driver_name = "ofb-des3-iproc",
3722 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3724 .min_keysize = DES3_EDE_KEY_SIZE,
3725 .max_keysize = DES3_EDE_KEY_SIZE,
3726 .ivsize = DES3_EDE_BLOCK_SIZE,
3730 .alg = CIPHER_ALG_3DES,
3731 .mode = CIPHER_MODE_OFB,
3734 .alg = HASH_ALG_NONE,
3735 .mode = HASH_MODE_NONE,
3739 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3741 .cra_name = "cbc(des3_ede)",
3742 .cra_driver_name = "cbc-des3-iproc",
3743 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3745 .min_keysize = DES3_EDE_KEY_SIZE,
3746 .max_keysize = DES3_EDE_KEY_SIZE,
3747 .ivsize = DES3_EDE_BLOCK_SIZE,
3751 .alg = CIPHER_ALG_3DES,
3752 .mode = CIPHER_MODE_CBC,
3755 .alg = HASH_ALG_NONE,
3756 .mode = HASH_MODE_NONE,
3760 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3762 .cra_name = "ecb(des3_ede)",
3763 .cra_driver_name = "ecb-des3-iproc",
3764 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3766 .min_keysize = DES3_EDE_KEY_SIZE,
3767 .max_keysize = DES3_EDE_KEY_SIZE,
3772 .alg = CIPHER_ALG_3DES,
3773 .mode = CIPHER_MODE_ECB,
3776 .alg = HASH_ALG_NONE,
3777 .mode = HASH_MODE_NONE,
3781 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3783 .cra_name = "ofb(aes)",
3784 .cra_driver_name = "ofb-aes-iproc",
3785 .cra_blocksize = AES_BLOCK_SIZE,
3787 .min_keysize = AES_MIN_KEY_SIZE,
3788 .max_keysize = AES_MAX_KEY_SIZE,
3789 .ivsize = AES_BLOCK_SIZE,
3793 .alg = CIPHER_ALG_AES,
3794 .mode = CIPHER_MODE_OFB,
3797 .alg = HASH_ALG_NONE,
3798 .mode = HASH_MODE_NONE,
3802 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3804 .cra_name = "cbc(aes)",
3805 .cra_driver_name = "cbc-aes-iproc",
3806 .cra_blocksize = AES_BLOCK_SIZE,
3808 .min_keysize = AES_MIN_KEY_SIZE,
3809 .max_keysize = AES_MAX_KEY_SIZE,
3810 .ivsize = AES_BLOCK_SIZE,
3814 .alg = CIPHER_ALG_AES,
3815 .mode = CIPHER_MODE_CBC,
3818 .alg = HASH_ALG_NONE,
3819 .mode = HASH_MODE_NONE,
3823 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3825 .cra_name = "ecb(aes)",
3826 .cra_driver_name = "ecb-aes-iproc",
3827 .cra_blocksize = AES_BLOCK_SIZE,
3829 .min_keysize = AES_MIN_KEY_SIZE,
3830 .max_keysize = AES_MAX_KEY_SIZE,
3835 .alg = CIPHER_ALG_AES,
3836 .mode = CIPHER_MODE_ECB,
3839 .alg = HASH_ALG_NONE,
3840 .mode = HASH_MODE_NONE,
3844 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3846 .cra_name = "ctr(aes)",
3847 .cra_driver_name = "ctr-aes-iproc",
3848 .cra_blocksize = AES_BLOCK_SIZE,
3850 .min_keysize = AES_MIN_KEY_SIZE,
3851 .max_keysize = AES_MAX_KEY_SIZE,
3852 .ivsize = AES_BLOCK_SIZE,
3856 .alg = CIPHER_ALG_AES,
3857 .mode = CIPHER_MODE_CTR,
3860 .alg = HASH_ALG_NONE,
3861 .mode = HASH_MODE_NONE,
3865 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3867 .cra_name = "xts(aes)",
3868 .cra_driver_name = "xts-aes-iproc",
3869 .cra_blocksize = AES_BLOCK_SIZE,
3871 .min_keysize = 2 * AES_MIN_KEY_SIZE,
3872 .max_keysize = 2 * AES_MAX_KEY_SIZE,
3873 .ivsize = AES_BLOCK_SIZE,
3877 .alg = CIPHER_ALG_AES,
3878 .mode = CIPHER_MODE_XTS,
3881 .alg = HASH_ALG_NONE,
3882 .mode = HASH_MODE_NONE,
3886 /* AHASH algorithms. */
3888 .type = CRYPTO_ALG_TYPE_AHASH,
3890 .halg.digestsize = MD5_DIGEST_SIZE,
3893 .cra_driver_name = "md5-iproc",
3894 .cra_blocksize = MD5_BLOCK_WORDS * 4,
3895 .cra_flags = CRYPTO_ALG_ASYNC,
3899 .alg = CIPHER_ALG_NONE,
3900 .mode = CIPHER_MODE_NONE,
3903 .alg = HASH_ALG_MD5,
3904 .mode = HASH_MODE_HASH,
3908 .type = CRYPTO_ALG_TYPE_AHASH,
3910 .halg.digestsize = MD5_DIGEST_SIZE,
3912 .cra_name = "hmac(md5)",
3913 .cra_driver_name = "hmac-md5-iproc",
3914 .cra_blocksize = MD5_BLOCK_WORDS * 4,
3918 .alg = CIPHER_ALG_NONE,
3919 .mode = CIPHER_MODE_NONE,
3922 .alg = HASH_ALG_MD5,
3923 .mode = HASH_MODE_HMAC,
3926 {.type = CRYPTO_ALG_TYPE_AHASH,
3928 .halg.digestsize = SHA1_DIGEST_SIZE,
3931 .cra_driver_name = "sha1-iproc",
3932 .cra_blocksize = SHA1_BLOCK_SIZE,
3936 .alg = CIPHER_ALG_NONE,
3937 .mode = CIPHER_MODE_NONE,
3940 .alg = HASH_ALG_SHA1,
3941 .mode = HASH_MODE_HASH,
3944 {.type = CRYPTO_ALG_TYPE_AHASH,
3946 .halg.digestsize = SHA1_DIGEST_SIZE,
3948 .cra_name = "hmac(sha1)",
3949 .cra_driver_name = "hmac-sha1-iproc",
3950 .cra_blocksize = SHA1_BLOCK_SIZE,
3954 .alg = CIPHER_ALG_NONE,
3955 .mode = CIPHER_MODE_NONE,
3958 .alg = HASH_ALG_SHA1,
3959 .mode = HASH_MODE_HMAC,
3962 {.type = CRYPTO_ALG_TYPE_AHASH,
3964 .halg.digestsize = SHA224_DIGEST_SIZE,
3966 .cra_name = "sha224",
3967 .cra_driver_name = "sha224-iproc",
3968 .cra_blocksize = SHA224_BLOCK_SIZE,
3972 .alg = CIPHER_ALG_NONE,
3973 .mode = CIPHER_MODE_NONE,
3976 .alg = HASH_ALG_SHA224,
3977 .mode = HASH_MODE_HASH,
3980 {.type = CRYPTO_ALG_TYPE_AHASH,
3982 .halg.digestsize = SHA224_DIGEST_SIZE,
3984 .cra_name = "hmac(sha224)",
3985 .cra_driver_name = "hmac-sha224-iproc",
3986 .cra_blocksize = SHA224_BLOCK_SIZE,
3990 .alg = CIPHER_ALG_NONE,
3991 .mode = CIPHER_MODE_NONE,
3994 .alg = HASH_ALG_SHA224,
3995 .mode = HASH_MODE_HMAC,
3998 {.type = CRYPTO_ALG_TYPE_AHASH,
4000 .halg.digestsize = SHA256_DIGEST_SIZE,
4002 .cra_name = "sha256",
4003 .cra_driver_name = "sha256-iproc",
4004 .cra_blocksize = SHA256_BLOCK_SIZE,
4008 .alg = CIPHER_ALG_NONE,
4009 .mode = CIPHER_MODE_NONE,
4012 .alg = HASH_ALG_SHA256,
4013 .mode = HASH_MODE_HASH,
4016 {.type = CRYPTO_ALG_TYPE_AHASH,
4018 .halg.digestsize = SHA256_DIGEST_SIZE,
4020 .cra_name = "hmac(sha256)",
4021 .cra_driver_name = "hmac-sha256-iproc",
4022 .cra_blocksize = SHA256_BLOCK_SIZE,
4026 .alg = CIPHER_ALG_NONE,
4027 .mode = CIPHER_MODE_NONE,
4030 .alg = HASH_ALG_SHA256,
4031 .mode = HASH_MODE_HMAC,
4035 .type = CRYPTO_ALG_TYPE_AHASH,
4037 .halg.digestsize = SHA384_DIGEST_SIZE,
4039 .cra_name = "sha384",
4040 .cra_driver_name = "sha384-iproc",
4041 .cra_blocksize = SHA384_BLOCK_SIZE,
4045 .alg = CIPHER_ALG_NONE,
4046 .mode = CIPHER_MODE_NONE,
4049 .alg = HASH_ALG_SHA384,
4050 .mode = HASH_MODE_HASH,
4054 .type = CRYPTO_ALG_TYPE_AHASH,
4056 .halg.digestsize = SHA384_DIGEST_SIZE,
4058 .cra_name = "hmac(sha384)",
4059 .cra_driver_name = "hmac-sha384-iproc",
4060 .cra_blocksize = SHA384_BLOCK_SIZE,
4064 .alg = CIPHER_ALG_NONE,
4065 .mode = CIPHER_MODE_NONE,
4068 .alg = HASH_ALG_SHA384,
4069 .mode = HASH_MODE_HMAC,
4073 .type = CRYPTO_ALG_TYPE_AHASH,
4075 .halg.digestsize = SHA512_DIGEST_SIZE,
4077 .cra_name = "sha512",
4078 .cra_driver_name = "sha512-iproc",
4079 .cra_blocksize = SHA512_BLOCK_SIZE,
4083 .alg = CIPHER_ALG_NONE,
4084 .mode = CIPHER_MODE_NONE,
4087 .alg = HASH_ALG_SHA512,
4088 .mode = HASH_MODE_HASH,
4092 .type = CRYPTO_ALG_TYPE_AHASH,
4094 .halg.digestsize = SHA512_DIGEST_SIZE,
4096 .cra_name = "hmac(sha512)",
4097 .cra_driver_name = "hmac-sha512-iproc",
4098 .cra_blocksize = SHA512_BLOCK_SIZE,
4102 .alg = CIPHER_ALG_NONE,
4103 .mode = CIPHER_MODE_NONE,
4106 .alg = HASH_ALG_SHA512,
4107 .mode = HASH_MODE_HMAC,
4111 .type = CRYPTO_ALG_TYPE_AHASH,
4113 .halg.digestsize = SHA3_224_DIGEST_SIZE,
4115 .cra_name = "sha3-224",
4116 .cra_driver_name = "sha3-224-iproc",
4117 .cra_blocksize = SHA3_224_BLOCK_SIZE,
4121 .alg = CIPHER_ALG_NONE,
4122 .mode = CIPHER_MODE_NONE,
4125 .alg = HASH_ALG_SHA3_224,
4126 .mode = HASH_MODE_HASH,
4130 .type = CRYPTO_ALG_TYPE_AHASH,
4132 .halg.digestsize = SHA3_224_DIGEST_SIZE,
4134 .cra_name = "hmac(sha3-224)",
4135 .cra_driver_name = "hmac-sha3-224-iproc",
4136 .cra_blocksize = SHA3_224_BLOCK_SIZE,
4140 .alg = CIPHER_ALG_NONE,
4141 .mode = CIPHER_MODE_NONE,
4144 .alg = HASH_ALG_SHA3_224,
4145 .mode = HASH_MODE_HMAC
4149 .type = CRYPTO_ALG_TYPE_AHASH,
4151 .halg.digestsize = SHA3_256_DIGEST_SIZE,
4153 .cra_name = "sha3-256",
4154 .cra_driver_name = "sha3-256-iproc",
4155 .cra_blocksize = SHA3_256_BLOCK_SIZE,
4159 .alg = CIPHER_ALG_NONE,
4160 .mode = CIPHER_MODE_NONE,
4163 .alg = HASH_ALG_SHA3_256,
4164 .mode = HASH_MODE_HASH,
4168 .type = CRYPTO_ALG_TYPE_AHASH,
4170 .halg.digestsize = SHA3_256_DIGEST_SIZE,
4172 .cra_name = "hmac(sha3-256)",
4173 .cra_driver_name = "hmac-sha3-256-iproc",
4174 .cra_blocksize = SHA3_256_BLOCK_SIZE,
4178 .alg = CIPHER_ALG_NONE,
4179 .mode = CIPHER_MODE_NONE,
4182 .alg = HASH_ALG_SHA3_256,
4183 .mode = HASH_MODE_HMAC,
4187 .type = CRYPTO_ALG_TYPE_AHASH,
4189 .halg.digestsize = SHA3_384_DIGEST_SIZE,
4191 .cra_name = "sha3-384",
4192 .cra_driver_name = "sha3-384-iproc",
4193 .cra_blocksize = SHA3_224_BLOCK_SIZE,
4197 .alg = CIPHER_ALG_NONE,
4198 .mode = CIPHER_MODE_NONE,
4201 .alg = HASH_ALG_SHA3_384,
4202 .mode = HASH_MODE_HASH,
4206 .type = CRYPTO_ALG_TYPE_AHASH,
4208 .halg.digestsize = SHA3_384_DIGEST_SIZE,
4210 .cra_name = "hmac(sha3-384)",
4211 .cra_driver_name = "hmac-sha3-384-iproc",
4212 .cra_blocksize = SHA3_384_BLOCK_SIZE,
4216 .alg = CIPHER_ALG_NONE,
4217 .mode = CIPHER_MODE_NONE,
4220 .alg = HASH_ALG_SHA3_384,
4221 .mode = HASH_MODE_HMAC,
4225 .type = CRYPTO_ALG_TYPE_AHASH,
4227 .halg.digestsize = SHA3_512_DIGEST_SIZE,
4229 .cra_name = "sha3-512",
4230 .cra_driver_name = "sha3-512-iproc",
4231 .cra_blocksize = SHA3_512_BLOCK_SIZE,
4235 .alg = CIPHER_ALG_NONE,
4236 .mode = CIPHER_MODE_NONE,
4239 .alg = HASH_ALG_SHA3_512,
4240 .mode = HASH_MODE_HASH,
4244 .type = CRYPTO_ALG_TYPE_AHASH,
4246 .halg.digestsize = SHA3_512_DIGEST_SIZE,
4248 .cra_name = "hmac(sha3-512)",
4249 .cra_driver_name = "hmac-sha3-512-iproc",
4250 .cra_blocksize = SHA3_512_BLOCK_SIZE,
4254 .alg = CIPHER_ALG_NONE,
4255 .mode = CIPHER_MODE_NONE,
4258 .alg = HASH_ALG_SHA3_512,
4259 .mode = HASH_MODE_HMAC,
4263 .type = CRYPTO_ALG_TYPE_AHASH,
4265 .halg.digestsize = AES_BLOCK_SIZE,
4267 .cra_name = "xcbc(aes)",
4268 .cra_driver_name = "xcbc-aes-iproc",
4269 .cra_blocksize = AES_BLOCK_SIZE,
4273 .alg = CIPHER_ALG_NONE,
4274 .mode = CIPHER_MODE_NONE,
4277 .alg = HASH_ALG_AES,
4278 .mode = HASH_MODE_XCBC,
4282 .type = CRYPTO_ALG_TYPE_AHASH,
4284 .halg.digestsize = AES_BLOCK_SIZE,
4286 .cra_name = "cmac(aes)",
4287 .cra_driver_name = "cmac-aes-iproc",
4288 .cra_blocksize = AES_BLOCK_SIZE,
4292 .alg = CIPHER_ALG_NONE,
4293 .mode = CIPHER_MODE_NONE,
4296 .alg = HASH_ALG_AES,
4297 .mode = HASH_MODE_CMAC,
4302 static int generic_cra_init(struct crypto_tfm *tfm,
4303 struct iproc_alg_s *cipher_alg)
4305 struct spu_hw *spu = &iproc_priv.spu;
4306 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
4307 unsigned int blocksize = crypto_tfm_alg_blocksize(tfm);
4309 flow_log("%s()\n", __func__);
4311 ctx->alg = cipher_alg;
4312 ctx->cipher = cipher_alg->cipher_info;
4313 ctx->auth = cipher_alg->auth_info;
4314 ctx->auth_first = cipher_alg->auth_first;
4315 ctx->max_payload = spu->spu_ctx_max_payload(ctx->cipher.alg,
4318 ctx->fallback_cipher = NULL;
4321 ctx->authkeylen = 0;
4323 atomic_inc(&iproc_priv.stream_count);
4324 atomic_inc(&iproc_priv.session_count);
4329 static int ablkcipher_cra_init(struct crypto_tfm *tfm)
4331 struct crypto_alg *alg = tfm->__crt_alg;
4332 struct iproc_alg_s *cipher_alg;
4334 flow_log("%s()\n", __func__);
4336 tfm->crt_ablkcipher.reqsize = sizeof(struct iproc_reqctx_s);
4338 cipher_alg = container_of(alg, struct iproc_alg_s, alg.crypto);
4339 return generic_cra_init(tfm, cipher_alg);
4342 static int ahash_cra_init(struct crypto_tfm *tfm)
4345 struct crypto_alg *alg = tfm->__crt_alg;
4346 struct iproc_alg_s *cipher_alg;
4348 cipher_alg = container_of(__crypto_ahash_alg(alg), struct iproc_alg_s,
4351 err = generic_cra_init(tfm, cipher_alg);
4352 flow_log("%s()\n", __func__);
4355 * export state size has to be < 512 bytes. So don't include msg bufs
4358 crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
4359 sizeof(struct iproc_reqctx_s));
4364 static int aead_cra_init(struct crypto_aead *aead)
4366 struct crypto_tfm *tfm = crypto_aead_tfm(aead);
4367 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
4368 struct crypto_alg *alg = tfm->__crt_alg;
4369 struct aead_alg *aalg = container_of(alg, struct aead_alg, base);
4370 struct iproc_alg_s *cipher_alg = container_of(aalg, struct iproc_alg_s,
4373 int err = generic_cra_init(tfm, cipher_alg);
4375 flow_log("%s()\n", __func__);
4377 crypto_aead_set_reqsize(aead, sizeof(struct iproc_reqctx_s));
4378 ctx->is_esp = false;
4380 ctx->salt_offset = 0;
4382 /* random first IV */
4383 get_random_bytes(ctx->iv, MAX_IV_SIZE);
4384 flow_dump(" iv: ", ctx->iv, MAX_IV_SIZE);
4387 if (alg->cra_flags & CRYPTO_ALG_NEED_FALLBACK) {
4388 flow_log("%s() creating fallback cipher\n", __func__);
4390 ctx->fallback_cipher =
4391 crypto_alloc_aead(alg->cra_name, 0,
4393 CRYPTO_ALG_NEED_FALLBACK);
4394 if (IS_ERR(ctx->fallback_cipher)) {
4395 pr_err("%s() Error: failed to allocate fallback for %s\n",
4396 __func__, alg->cra_name);
4397 return PTR_ERR(ctx->fallback_cipher);
4405 static void generic_cra_exit(struct crypto_tfm *tfm)
4407 atomic_dec(&iproc_priv.session_count);
4410 static void aead_cra_exit(struct crypto_aead *aead)
4412 struct crypto_tfm *tfm = crypto_aead_tfm(aead);
4413 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
4415 generic_cra_exit(tfm);
4417 if (ctx->fallback_cipher) {
4418 crypto_free_aead(ctx->fallback_cipher);
4419 ctx->fallback_cipher = NULL;
4424 * spu_functions_register() - Specify hardware-specific SPU functions based on
4425 * SPU type read from device tree.
4426 * @dev: device structure
4427 * @spu_type: SPU hardware generation
4428 * @spu_subtype: SPU hardware version
4430 static void spu_functions_register(struct device *dev,
4431 enum spu_spu_type spu_type,
4432 enum spu_spu_subtype spu_subtype)
4434 struct spu_hw *spu = &iproc_priv.spu;
4436 if (spu_type == SPU_TYPE_SPUM) {
4437 dev_dbg(dev, "Registering SPUM functions");
4438 spu->spu_dump_msg_hdr = spum_dump_msg_hdr;
4439 spu->spu_payload_length = spum_payload_length;
4440 spu->spu_response_hdr_len = spum_response_hdr_len;
4441 spu->spu_hash_pad_len = spum_hash_pad_len;
4442 spu->spu_gcm_ccm_pad_len = spum_gcm_ccm_pad_len;
4443 spu->spu_assoc_resp_len = spum_assoc_resp_len;
4444 spu->spu_aead_ivlen = spum_aead_ivlen;
4445 spu->spu_hash_type = spum_hash_type;
4446 spu->spu_digest_size = spum_digest_size;
4447 spu->spu_create_request = spum_create_request;
4448 spu->spu_cipher_req_init = spum_cipher_req_init;
4449 spu->spu_cipher_req_finish = spum_cipher_req_finish;
4450 spu->spu_request_pad = spum_request_pad;
4451 spu->spu_tx_status_len = spum_tx_status_len;
4452 spu->spu_rx_status_len = spum_rx_status_len;
4453 spu->spu_status_process = spum_status_process;
4454 spu->spu_xts_tweak_in_payload = spum_xts_tweak_in_payload;
4455 spu->spu_ccm_update_iv = spum_ccm_update_iv;
4456 spu->spu_wordalign_padlen = spum_wordalign_padlen;
4457 if (spu_subtype == SPU_SUBTYPE_SPUM_NS2)
4458 spu->spu_ctx_max_payload = spum_ns2_ctx_max_payload;
4460 spu->spu_ctx_max_payload = spum_nsp_ctx_max_payload;
4462 dev_dbg(dev, "Registering SPU2 functions");
4463 spu->spu_dump_msg_hdr = spu2_dump_msg_hdr;
4464 spu->spu_ctx_max_payload = spu2_ctx_max_payload;
4465 spu->spu_payload_length = spu2_payload_length;
4466 spu->spu_response_hdr_len = spu2_response_hdr_len;
4467 spu->spu_hash_pad_len = spu2_hash_pad_len;
4468 spu->spu_gcm_ccm_pad_len = spu2_gcm_ccm_pad_len;
4469 spu->spu_assoc_resp_len = spu2_assoc_resp_len;
4470 spu->spu_aead_ivlen = spu2_aead_ivlen;
4471 spu->spu_hash_type = spu2_hash_type;
4472 spu->spu_digest_size = spu2_digest_size;
4473 spu->spu_create_request = spu2_create_request;
4474 spu->spu_cipher_req_init = spu2_cipher_req_init;
4475 spu->spu_cipher_req_finish = spu2_cipher_req_finish;
4476 spu->spu_request_pad = spu2_request_pad;
4477 spu->spu_tx_status_len = spu2_tx_status_len;
4478 spu->spu_rx_status_len = spu2_rx_status_len;
4479 spu->spu_status_process = spu2_status_process;
4480 spu->spu_xts_tweak_in_payload = spu2_xts_tweak_in_payload;
4481 spu->spu_ccm_update_iv = spu2_ccm_update_iv;
4482 spu->spu_wordalign_padlen = spu2_wordalign_padlen;
4487 * spu_mb_init() - Initialize mailbox client. Request ownership of a mailbox
4488 * channel for the SPU being probed.
4489 * @dev: SPU driver device structure
4491 * Return: 0 if successful
4494 static int spu_mb_init(struct device *dev)
4496 struct mbox_client *mcl = &iproc_priv.mcl;
4499 iproc_priv.mbox = devm_kcalloc(dev, iproc_priv.spu.num_chan,
4500 sizeof(struct mbox_chan *), GFP_KERNEL);
4501 if (!iproc_priv.mbox)
4505 mcl->tx_block = false;
4507 mcl->knows_txdone = true;
4508 mcl->rx_callback = spu_rx_callback;
4509 mcl->tx_done = NULL;
4511 for (i = 0; i < iproc_priv.spu.num_chan; i++) {
4512 iproc_priv.mbox[i] = mbox_request_channel(mcl, i);
4513 if (IS_ERR(iproc_priv.mbox[i])) {
4514 err = (int)PTR_ERR(iproc_priv.mbox[i]);
4516 "Mbox channel %d request failed with err %d",
4518 iproc_priv.mbox[i] = NULL;
4525 for (i = 0; i < iproc_priv.spu.num_chan; i++) {
4526 if (iproc_priv.mbox[i])
4527 mbox_free_channel(iproc_priv.mbox[i]);
4533 static void spu_mb_release(struct platform_device *pdev)
4537 for (i = 0; i < iproc_priv.spu.num_chan; i++)
4538 mbox_free_channel(iproc_priv.mbox[i]);
4541 static void spu_counters_init(void)
4546 atomic_set(&iproc_priv.session_count, 0);
4547 atomic_set(&iproc_priv.stream_count, 0);
4548 atomic_set(&iproc_priv.next_chan, (int)iproc_priv.spu.num_chan);
4549 atomic64_set(&iproc_priv.bytes_in, 0);
4550 atomic64_set(&iproc_priv.bytes_out, 0);
4551 for (i = 0; i < SPU_OP_NUM; i++) {
4552 atomic_set(&iproc_priv.op_counts[i], 0);
4553 atomic_set(&iproc_priv.setkey_cnt[i], 0);
4555 for (i = 0; i < CIPHER_ALG_LAST; i++)
4556 for (j = 0; j < CIPHER_MODE_LAST; j++)
4557 atomic_set(&iproc_priv.cipher_cnt[i][j], 0);
4559 for (i = 0; i < HASH_ALG_LAST; i++) {
4560 atomic_set(&iproc_priv.hash_cnt[i], 0);
4561 atomic_set(&iproc_priv.hmac_cnt[i], 0);
4563 for (i = 0; i < AEAD_TYPE_LAST; i++)
4564 atomic_set(&iproc_priv.aead_cnt[i], 0);
4566 atomic_set(&iproc_priv.mb_no_spc, 0);
4567 atomic_set(&iproc_priv.mb_send_fail, 0);
4568 atomic_set(&iproc_priv.bad_icv, 0);
4571 static int spu_register_ablkcipher(struct iproc_alg_s *driver_alg)
4573 struct spu_hw *spu = &iproc_priv.spu;
4574 struct crypto_alg *crypto = &driver_alg->alg.crypto;
4577 /* SPU2 does not support RC4 */
4578 if ((driver_alg->cipher_info.alg == CIPHER_ALG_RC4) &&
4579 (spu->spu_type == SPU_TYPE_SPU2))
4582 crypto->cra_module = THIS_MODULE;
4583 crypto->cra_priority = cipher_pri;
4584 crypto->cra_alignmask = 0;
4585 crypto->cra_ctxsize = sizeof(struct iproc_ctx_s);
4587 crypto->cra_init = ablkcipher_cra_init;
4588 crypto->cra_exit = generic_cra_exit;
4589 crypto->cra_type = &crypto_ablkcipher_type;
4590 crypto->cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC |
4591 CRYPTO_ALG_KERN_DRIVER_ONLY;
4593 crypto->cra_ablkcipher.setkey = ablkcipher_setkey;
4594 crypto->cra_ablkcipher.encrypt = ablkcipher_encrypt;
4595 crypto->cra_ablkcipher.decrypt = ablkcipher_decrypt;
4597 err = crypto_register_alg(crypto);
4598 /* Mark alg as having been registered, if successful */
4600 driver_alg->registered = true;
4601 pr_debug(" registered ablkcipher %s\n", crypto->cra_driver_name);
4605 static int spu_register_ahash(struct iproc_alg_s *driver_alg)
4607 struct spu_hw *spu = &iproc_priv.spu;
4608 struct ahash_alg *hash = &driver_alg->alg.hash;
4611 /* AES-XCBC is the only AES hash type currently supported on SPU-M */
4612 if ((driver_alg->auth_info.alg == HASH_ALG_AES) &&
4613 (driver_alg->auth_info.mode != HASH_MODE_XCBC) &&
4614 (spu->spu_type == SPU_TYPE_SPUM))
4617 /* SHA3 algorithm variants are not registered for SPU-M or SPU2. */
4618 if ((driver_alg->auth_info.alg >= HASH_ALG_SHA3_224) &&
4619 (spu->spu_subtype != SPU_SUBTYPE_SPU2_V2))
4622 hash->halg.base.cra_module = THIS_MODULE;
4623 hash->halg.base.cra_priority = hash_pri;
4624 hash->halg.base.cra_alignmask = 0;
4625 hash->halg.base.cra_ctxsize = sizeof(struct iproc_ctx_s);
4626 hash->halg.base.cra_init = ahash_cra_init;
4627 hash->halg.base.cra_exit = generic_cra_exit;
4628 hash->halg.base.cra_flags = CRYPTO_ALG_ASYNC;
4629 hash->halg.statesize = sizeof(struct spu_hash_export_s);
4631 if (driver_alg->auth_info.mode != HASH_MODE_HMAC) {
4632 hash->init = ahash_init;
4633 hash->update = ahash_update;
4634 hash->final = ahash_final;
4635 hash->finup = ahash_finup;
4636 hash->digest = ahash_digest;
4637 if ((driver_alg->auth_info.alg == HASH_ALG_AES) &&
4638 ((driver_alg->auth_info.mode == HASH_MODE_XCBC) ||
4639 (driver_alg->auth_info.mode == HASH_MODE_CMAC))) {
4640 hash->setkey = ahash_setkey;
4643 hash->setkey = ahash_hmac_setkey;
4644 hash->init = ahash_hmac_init;
4645 hash->update = ahash_hmac_update;
4646 hash->final = ahash_hmac_final;
4647 hash->finup = ahash_hmac_finup;
4648 hash->digest = ahash_hmac_digest;
4650 hash->export = ahash_export;
4651 hash->import = ahash_import;
4653 err = crypto_register_ahash(hash);
4654 /* Mark alg as having been registered, if successful */
4656 driver_alg->registered = true;
4657 pr_debug(" registered ahash %s\n",
4658 hash->halg.base.cra_driver_name);
4662 static int spu_register_aead(struct iproc_alg_s *driver_alg)
4664 struct aead_alg *aead = &driver_alg->alg.aead;
4667 aead->base.cra_module = THIS_MODULE;
4668 aead->base.cra_priority = aead_pri;
4669 aead->base.cra_alignmask = 0;
4670 aead->base.cra_ctxsize = sizeof(struct iproc_ctx_s);
4672 aead->base.cra_flags |= CRYPTO_ALG_ASYNC;
4673 /* setkey set in alg initialization */
4674 aead->setauthsize = aead_setauthsize;
4675 aead->encrypt = aead_encrypt;
4676 aead->decrypt = aead_decrypt;
4677 aead->init = aead_cra_init;
4678 aead->exit = aead_cra_exit;
4680 err = crypto_register_aead(aead);
4681 /* Mark alg as having been registered, if successful */
4683 driver_alg->registered = true;
4684 pr_debug(" registered aead %s\n", aead->base.cra_driver_name);
4688 /* register crypto algorithms the device supports */
4689 static int spu_algs_register(struct device *dev)
4694 for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
4695 switch (driver_algs[i].type) {
4696 case CRYPTO_ALG_TYPE_ABLKCIPHER:
4697 err = spu_register_ablkcipher(&driver_algs[i]);
4699 case CRYPTO_ALG_TYPE_AHASH:
4700 err = spu_register_ahash(&driver_algs[i]);
4702 case CRYPTO_ALG_TYPE_AEAD:
4703 err = spu_register_aead(&driver_algs[i]);
4707 "iproc-crypto: unknown alg type: %d",
4708 driver_algs[i].type);
4713 dev_err(dev, "alg registration failed with error %d\n",
4722 for (j = 0; j < i; j++) {
4723 /* Skip any algorithm not registered */
4724 if (!driver_algs[j].registered)
4726 switch (driver_algs[j].type) {
4727 case CRYPTO_ALG_TYPE_ABLKCIPHER:
4728 crypto_unregister_alg(&driver_algs[j].alg.crypto);
4729 driver_algs[j].registered = false;
4731 case CRYPTO_ALG_TYPE_AHASH:
4732 crypto_unregister_ahash(&driver_algs[j].alg.hash);
4733 driver_algs[j].registered = false;
4735 case CRYPTO_ALG_TYPE_AEAD:
4736 crypto_unregister_aead(&driver_algs[j].alg.aead);
4737 driver_algs[j].registered = false;
4744 /* ==================== Kernel Platform API ==================== */
4746 static struct spu_type_subtype spum_ns2_types = {
4747 SPU_TYPE_SPUM, SPU_SUBTYPE_SPUM_NS2
4750 static struct spu_type_subtype spum_nsp_types = {
4751 SPU_TYPE_SPUM, SPU_SUBTYPE_SPUM_NSP
4754 static struct spu_type_subtype spu2_types = {
4755 SPU_TYPE_SPU2, SPU_SUBTYPE_SPU2_V1
4758 static struct spu_type_subtype spu2_v2_types = {
4759 SPU_TYPE_SPU2, SPU_SUBTYPE_SPU2_V2
4762 static const struct of_device_id bcm_spu_dt_ids[] = {
4764 .compatible = "brcm,spum-crypto",
4765 .data = &spum_ns2_types,
4768 .compatible = "brcm,spum-nsp-crypto",
4769 .data = &spum_nsp_types,
4772 .compatible = "brcm,spu2-crypto",
4773 .data = &spu2_types,
4776 .compatible = "brcm,spu2-v2-crypto",
4777 .data = &spu2_v2_types,
4782 MODULE_DEVICE_TABLE(of, bcm_spu_dt_ids);
4784 static int spu_dt_read(struct platform_device *pdev)
4786 struct device *dev = &pdev->dev;
4787 struct spu_hw *spu = &iproc_priv.spu;
4788 struct resource *spu_ctrl_regs;
4789 const struct spu_type_subtype *matched_spu_type;
4790 struct device_node *dn = pdev->dev.of_node;
4793 /* Count number of mailbox channels */
4794 spu->num_chan = of_count_phandle_with_args(dn, "mboxes", "#mbox-cells");
4796 matched_spu_type = of_device_get_match_data(dev);
4797 if (!matched_spu_type) {
4798 dev_err(&pdev->dev, "Failed to match device\n");
4802 spu->spu_type = matched_spu_type->type;
4803 spu->spu_subtype = matched_spu_type->subtype;
4806 for (i = 0; (i < MAX_SPUS) && ((spu_ctrl_regs =
4807 platform_get_resource(pdev, IORESOURCE_MEM, i)) != NULL); i++) {
4809 spu->reg_vbase[i] = devm_ioremap_resource(dev, spu_ctrl_regs);
4810 if (IS_ERR(spu->reg_vbase[i])) {
4811 err = PTR_ERR(spu->reg_vbase[i]);
4812 dev_err(&pdev->dev, "Failed to map registers: %d\n",
4814 spu->reg_vbase[i] = NULL;
4819 dev_dbg(dev, "Device has %d SPUs", spu->num_spu);
4824 int bcm_spu_probe(struct platform_device *pdev)
4826 struct device *dev = &pdev->dev;
4827 struct spu_hw *spu = &iproc_priv.spu;
4830 iproc_priv.pdev = pdev;
4831 platform_set_drvdata(iproc_priv.pdev,
4834 err = spu_dt_read(pdev);
4838 err = spu_mb_init(&pdev->dev);
4842 if (spu->spu_type == SPU_TYPE_SPUM)
4843 iproc_priv.bcm_hdr_len = 8;
4844 else if (spu->spu_type == SPU_TYPE_SPU2)
4845 iproc_priv.bcm_hdr_len = 0;
4847 spu_functions_register(&pdev->dev, spu->spu_type, spu->spu_subtype);
4849 spu_counters_init();
4851 spu_setup_debugfs();
4853 err = spu_algs_register(dev);
4862 spu_mb_release(pdev);
4863 dev_err(dev, "%s failed with error %d.\n", __func__, err);
4868 int bcm_spu_remove(struct platform_device *pdev)
4871 struct device *dev = &pdev->dev;
4874 for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
4876 * Not all algorithms were registered, depending on whether
4877 * hardware is SPU or SPU2. So here we make sure to skip
4878 * those algorithms that were not previously registered.
4880 if (!driver_algs[i].registered)
4883 switch (driver_algs[i].type) {
4884 case CRYPTO_ALG_TYPE_ABLKCIPHER:
4885 crypto_unregister_alg(&driver_algs[i].alg.crypto);
4886 dev_dbg(dev, " unregistered cipher %s\n",
4887 driver_algs[i].alg.crypto.cra_driver_name);
4888 driver_algs[i].registered = false;
4890 case CRYPTO_ALG_TYPE_AHASH:
4891 crypto_unregister_ahash(&driver_algs[i].alg.hash);
4892 cdn = driver_algs[i].alg.hash.halg.base.cra_driver_name;
4893 dev_dbg(dev, " unregistered hash %s\n", cdn);
4894 driver_algs[i].registered = false;
4896 case CRYPTO_ALG_TYPE_AEAD:
4897 crypto_unregister_aead(&driver_algs[i].alg.aead);
4898 dev_dbg(dev, " unregistered aead %s\n",
4899 driver_algs[i].alg.aead.base.cra_driver_name);
4900 driver_algs[i].registered = false;
4905 spu_mb_release(pdev);
4909 /* ===== Kernel Module API ===== */
4911 static struct platform_driver bcm_spu_pdriver = {
4913 .name = "brcm-spu-crypto",
4914 .of_match_table = of_match_ptr(bcm_spu_dt_ids),
4916 .probe = bcm_spu_probe,
4917 .remove = bcm_spu_remove,
4919 module_platform_driver(bcm_spu_pdriver);
4921 MODULE_AUTHOR("Rob Rice <rob.rice@broadcom.com>");
4922 MODULE_DESCRIPTION("Broadcom symmetric crypto offload driver");
4923 MODULE_LICENSE("GPL v2");